Le 26/05/2019 à 16:47, Antonio Ospite a écrit :
> From: Antonio Ospite
>
> The configure script breaks when the qemu source directory is in a path
> containing white spaces, in particular the list of targets is not
> correctly generated when calling "./configure --help" because of how the
> defau
Le 26/05/2019 à 16:47, Antonio Ospite a écrit :
> From: Antonio Ospite
>
> Since commit 79d77bcd36 (configure: Remove --source-path option,
> 2019-04-29) source_path cannot be overridden anymore, move it out of the
> "default parameters" block since the word "default" may suggest that the
> value
On 26/06/19 17:50, Laurent Vivier wrote:
Le 26/06/2019 à 17:16, Antonio Ospite a écrit :
On 26/05/19 16:47, Antonio Ospite wrote:
Hi,
Here is a v3 set to address
https://bugs.launchpad.net/qemu/+bug/1817345
CCing Laurent Vivier as the patch is going through the trivial-patches
branch.
Ping
On 6/26/19 10:16 AM, Antonio Ospite wrote:
> On 26/05/19 16:47, Antonio Ospite wrote:
>> Hi,
>>
>> Here is a v3 set to address
>> https://bugs.launchpad.net/qemu/+bug/1817345
>>
>> CCing Laurent Vivier as the patch is going through the trivial-patches
>> branch.
>>
>
> Ping.
>
> I cannot see this
Le 26/06/2019 à 17:16, Antonio Ospite a écrit :
> On 26/05/19 16:47, Antonio Ospite wrote:
>> Hi,
>>
>> Here is a v3 set to address
>> https://bugs.launchpad.net/qemu/+bug/1817345
>>
>> CCing Laurent Vivier as the patch is going through the trivial-patches
>> branch.
>>
>
> Ping.
>
> I cannot see
Patchew URL: https://patchew.org/QEMU/20190626152703.4871-1-dinec...@redhat.com/
Hi,
This series failed build test on s390x host. Please find the details below.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked under the git checkout with
# HEAD pointing to a commit that h
> On 24 Jun 2019, at 14:38, Alex Bennée wrote:
>
> Commit 2d384d7c8 broken the build when built with:
>
> configure --without-default-devices --disable-user
>
> The reason was the conversion of cpu->hyperv_synic to
> cpu->hyperv_synic_kvm_only although the rest of the patch introduces a
> f
In commit 2d384d7c8 "i386/kvm: convert hyperv enlightenments
properties from bools to bits", the hyperv_synic member was removed
from struct X86CPU. The change was not applied to hyperv-stub.c,
breaking the build for specific "lightweight" configurations.
Signed-off-by: Christophe de Dinechin
---
SnowRidge CPU supports Accelerator Infrastrcture Architecture (MOVDIRI,
MOVDIR64B), CLDEMOTE and SPLIT_LOCK_DISABLE.
MOVDIRI, MOVDIR64B, and CLDEMOTE are found via CPUID.
The availability of SPLIT_LOCK_DISABLE is check via msr access
References can be found in either:
https://software.intel.com/
On 26/05/19 16:47, Antonio Ospite wrote:
Hi,
Here is a v3 set to address
https://bugs.launchpad.net/qemu/+bug/1817345
CCing Laurent Vivier as the patch is going through the trivial-patches
branch.
Ping.
I cannot see this in the trivial-patches repository nor in mainline qemu.
Thanks,
An
Patchew URL: https://patchew.org/QEMU/20190626150855.27446-1-laur...@vivier.eu/
Hi,
This series failed build test on s390x host. Please find the details below.
The full log is available at
http://patchew.org/logs/20190626150855.27446-1-laur...@vivier.eu/testing.s390x/?type=message.
---
Em
QEMU_IFLA_BR_MULTI_BOOLOPT has been added to the wrong function
host_to_target_slave_data_bridge_nlattr(). Move it to
host_to_target_data_bridge_nlattr().
This fixes following error:
Unknown QEMU_IFLA_BR type 46
Fixes: 61b463fbf6cb ("linux-user: add new netlink types")
Signed-off-by: Laurent Vi
Hi Drew,
On 6/21/19 6:34 PM, Andrew Jones wrote:
> Introduce cpu properties to give fine control over SVE vector lengths.
> We introduce a property for each valid length up to the current
> maximum supported, which is 2048-bits. The properties are named, e.g.
> sve128, sve256, sve512, ..., where t
On 26.06.19 16:22, Collin Walling wrote:
> On 6/26/19 8:14 AM, Cornelia Huck wrote:
>> On Wed, 26 Jun 2019 11:12:04 +0200
>> Christian Borntraeger wrote:
>>
>>> On 25.06.19 17:17, Collin Walling wrote:
index a606547..4c26754 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
>
On Tue, 25 Jun 2019 21:48:07 +0800
gengdongjiu wrote:
> On 2019/6/24 20:27, Igor Mammedov wrote:
> > On Tue, 14 May 2019 04:18:20 -0700
> > Dongjiu Geng wrote:
> >
> >> This implements APEI GHES Table generation via fw_cfg blobs.
> >> Now it only support GPIO-Signal and ARMv8 SEA two types of
On 6/26/19 8:14 AM, Cornelia Huck wrote:
On Wed, 26 Jun 2019 11:12:04 +0200
Christian Borntraeger wrote:
On 25.06.19 17:17, Collin Walling wrote:
index a606547..4c26754 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -39,7 +39,13 @@
#define MMU_USER_IDX 0
-#define S390_MAX
On 6/26/19 8:33 AM, Cornelia Huck wrote:
On Tue, 25 Jun 2019 11:17:09 -0400
Collin Walling wrote:
DIAGNOSE 0x318 (diag318) is a privileged s390x instruction that must
be intercepted by SIE and handled via KVM. Let's introduce some
functions to communicate between QEMU and KVM via ioctls. These
Hi,
On 6/26/19 3:58 PM, Andrew Jones wrote:
> On Wed, Jun 26, 2019 at 03:40:11PM +0200, Auger Eric wrote:
>> Hi,
>>
>> On 6/26/19 3:28 PM, Andrew Jones wrote:
>>> On Wed, Jun 26, 2019 at 12:01:10PM +0200, Auger Eric wrote:
Hi Drew,
On 6/21/19 6:34 PM, Andrew Jones wrote:
> Sugge
On Wed, Jun 26, 2019 at 03:40:11PM +0200, Auger Eric wrote:
> Hi,
>
> On 6/26/19 3:28 PM, Andrew Jones wrote:
> > On Wed, Jun 26, 2019 at 12:01:10PM +0200, Auger Eric wrote:
> >> Hi Drew,
> >>
> >> On 6/21/19 6:34 PM, Andrew Jones wrote:
> >>> Suggested-by: Dave Martin
> >>> Signed-off-by: Andrew
On Wed, Jun 26, 2019 at 12:20:29PM +0200, Richard Henderson wrote:
> On 6/21/19 6:34 PM, Andrew Jones wrote:
> > Since 97a28b0eeac14 ("target/arm: Allow VFP and Neon to be disabled via
> > a CPU property") we can disable the 'max' cpu model's VFP and neon
> > features, but there's no way to disable
Hi,
On 6/26/19 3:28 PM, Andrew Jones wrote:
> On Wed, Jun 26, 2019 at 12:01:10PM +0200, Auger Eric wrote:
>> Hi Drew,
>>
>> On 6/21/19 6:34 PM, Andrew Jones wrote:
>>> Suggested-by: Dave Martin
>>> Signed-off-by: Andrew Jones
>>> ---
>>> target/arm/helper.c | 1 +
>>> 1 file changed, 1 insertio
On Wed, Jun 26, 2019 at 12:00:54PM +0200, Auger Eric wrote:
> Hi Drew,
>
> On 6/21/19 6:34 PM, Andrew Jones wrote:
> > Since 97a28b0eeac14 ("target/arm: Allow VFP and Neon to be disabled via
> > a CPU property") we can disable the 'max' cpu model's VFP and neon
> > features, but there's no way to
On Wed, Jun 26, 2019 at 12:01:10PM +0200, Auger Eric wrote:
> Hi Drew,
>
> On 6/21/19 6:34 PM, Andrew Jones wrote:
> > Suggested-by: Dave Martin
> > Signed-off-by: Andrew Jones
> > ---
> > target/arm/helper.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/target/arm/helper.c b/
On Wed, Jun 26, 2019 at 09:43:09AM +0200, Auger Eric wrote:
> Hi Drew,
>
> On 6/21/19 6:34 PM, Andrew Jones wrote:
> > Add support for the query-cpu-model-expansion QMP command to Arm. We
> > do this selectively, only exposing CPU properties which represent
> > optional CPU features which the user
On Wed, Jun 26, 2019 at 11:49:03AM +0200, Richard Henderson wrote:
> On 6/21/19 6:34 PM, Andrew Jones wrote:
> > We first convert the pmu property from a static property to one with
> > its own accessors. Then we use the set accessor to check if the PMU is
> > supported when using KVM. Indeed a 32-
Acked-by: Christian Borntraeger
On 26.06.19 15:08, Cornelia Huck wrote:
> The cpu features/models are not only relevant for TCG, but
> also for KVM. Make sure that the KVM maintainers are cc:ed
> on patches as well.
>
> Signed-off-by: Cornelia Huck
> ---
> MAINTAINERS | 2 ++
> 1 file changed
The cpu features/models are not only relevant for TCG, but
also for KVM. Make sure that the KVM maintainers are cc:ed
on patches as well.
Signed-off-by: Cornelia Huck
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index cad58b948791..d9b6c129076a
Add QTest tests to check the logical geometry override option.
The tests in hd-geo-test are out of date - they only test IDE and do not
test interesting MBRs.
I added a few helper functions which will make adding more tests easier.
QTest's fw_cfg helper functions support only legacy fw_cfg, so I
Using fw_cfg, supply logical CHS values directly from QEMU to the BIOS.
Non-standard logical geometries break under QEMU.
A virtual disk which contains an operating system which depends on
logical geometries (consistent values being reported from BIOS INT13
AH=08) will most likely break under QEM
Relevant devices are:
* ide-hd (and ide-cd, ide-drive)
* scsi-hd (and scsi-cd, scsi-disk, scsi-block)
* virtio-blk-pci
We do not call del_boot_device_lchs() for ide-* since we don't need to -
IDE block devices do not support unplugging.
Reviewed-by: Karl Heubaum
Reviewed-by: Arbel Mo
Add logical geometry variables to BlockConf.
A user can now supply "lcyls", "lheads" & "lsecs" for any HD device
that supports CHS ("cyls", "heads", "secs").
These devices include:
* ide-hd
* scsi-hd
* virtio-blk-pci
In future commits we will use the provided LCHS and pass it to the
Move device name construction to a separate function.
We will reuse this function in the following commit to pass logical CHS
parameters through fw_cfg much like we currently pass bootindex.
Reviewed-by: Karl Heubaum
Reviewed-by: Arbel Moshe
Signed-off-by: Sam Eiderman
---
bootdevice.c | 61 +
v1:
Non-standard logical geometries break under QEMU.
A virtual disk which contains an operating system which depends on
logical geometries (consistent values being reported from BIOS INT13
AH=08) will most likely break under QEMU/SeaBIOS if it has non-standard
logical geometries - for example 56
We will need to add LCHS removal logic to scsi-hd's unrealize() in the
next commit.
Reviewed-by: Karl Heubaum
Reviewed-by: Arbel Moshe
Signed-off-by: Sam Eiderman
---
hw/scsi/scsi-bus.c | 15 +++
include/hw/scsi/scsi.h | 1 +
2 files changed, 16 insertions(+)
diff --git a/hw/
Boot devices which use overriden LCHS values are:
* ata
* ahci
* scsi
* esp
* lsi
* megasas
* mpt
* pvscsi
* virtio
* virtio-blk
We use these values in get_translation() and setup_translation() by
introducing a new translation type:
Add an interface to provide direct logical CHS values for boot devices.
We will use this interface in the next commits.
Reviewed-by: Karl Heubaum
Reviewed-by: Arbel Moshe
Signed-off-by: Sam Eiderman
---
bootdevice.c| 55 +
include/sys
On Wed, Jun 26, 2019 at 11:48:20AM +0200, Marc-André Lureau wrote:
> Hi
>
> On Wed, Jun 26, 2019 at 3:56 AM Eduardo Habkost wrote:
> >
> > On Wed, Jun 26, 2019 at 01:23:33AM +0200, Marc-André Lureau wrote:
> > > Since commit a4ee4c8baa37154 ("virtio: Helper for registering virtio
> > > device typ
Adding the following utility functions:
* boot_lchs_find_pci_device
* boot_lchs_find_scsi_device
* boot_lchs_find_ata_device
These will be used to apply LCHS values received through fw_cfg.
Reviewed-by: Karl Heubaum
Reviewed-by: Arbel Moshe
Signed-off-by: Sam Eiderman
---
src/Kco
Read bios geometry for boot devices from fw_cfg.
By receiving LCHS values directly from QEMU through fw_cfg we will be
able to support logical geometries which can not be inferred by SeaBIOS
itself.
(For instance: A 8GB virtio-blk hard drive which was originally created
as an IDE and must report L
Fixing tabbing in block related macros.
Reviewed-by: Karl Heubaum
Reviewed-by: Arbel Moshe
Signed-off-by: Sam Eiderman
---
hw/ide/qdev.c| 2 +-
include/hw/block/block.h | 16
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/hw/ide/qdev.c b/hw/ide/qde
Currently glob_prefix() and build_pci_path() are under the "Boot
priority ordering" section.
Move them to a new "Helper search functions" section since we will reuse
them in the next commits.
Reviewed-by: Karl Heubaum
Reviewed-by: Arbel Moshe
Signed-off-by: Sam Eiderman
---
src/boot.c | 94 +++
Introduce build_scsi_path() and build_ata_path().
We will reuse these functions in the next commit.
Reviewed-by: Karl Heubaum
Reviewed-by: Arbel Moshe
Signed-off-by: Sam Eiderman
---
src/boot.c | 36
1 file changed, 28 insertions(+), 8 deletions(-)
diff --
v1:
Non-standard logical geometries break under QEMU.
A virtual disk which contains an operating system which depends on
logical geometries (consistent values being reported from BIOS INT13
AH=08) will most likely break under QEMU/SeaBIOS if it has non-standard
logical geometries - for example 56
On Tue, 25 Jun 2019 11:17:09 -0400
Collin Walling wrote:
> DIAGNOSE 0x318 (diag318) is a privileged s390x instruction that must
> be intercepted by SIE and handled via KVM. Let's introduce some
> functions to communicate between QEMU and KVM via ioctls. These
> will be used to get/set the diag318
On Wed, Jun 26, 2019 at 01:57:43PM +0200, Philippe Mathieu-Daudé wrote:
> [I forgot to Cc the list, resending]
>
> Hi Stefan, Lluís,
>
> When trying to add a trace event to report a float value, I get:
>
> trace-events:11: Argument type 'float' is not in whitelist. Only
> standard C types and fi
Another trivial cleanup series.
Philippe Mathieu-Daudé (2):
MAINTAINERS: Add missing m48t59 files to the PReP section
hw/timer/m48t59: Convert debug printf()s to trace events
MAINTAINERS| 2 ++
hw/timer/m48t59-internal.h | 5 -
hw/timer/m48t59.c | 11 +-
On Wed, 26 Jun 2019 11:12:04 +0200
Christian Borntraeger wrote:
> On 25.06.19 17:17, Collin Walling wrote:
> > index a606547..4c26754 100644
> > --- a/target/s390x/cpu.h
> > +++ b/target/s390x/cpu.h
> > @@ -39,7 +39,13 @@
> >
> > #define MMU_USER_IDX 0
> >
> > -#define S390_MAX_CPUS 248
> >
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index cad58b9487..fbe89c0812 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1047,6 +1047,8 @@ F: hw/pci-host/prep.[hc]
F: hw/isa/i82378.c
F: hw/isa/pc87312.c
F:
Signed-off-by: Philippe Mathieu-Daudé
---
hw/timer/m48t59-internal.h | 5 -
hw/timer/m48t59.c | 11 +--
hw/timer/trace-events | 6 ++
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/hw/timer/m48t59-internal.h b/hw/timer/m48t59-internal.h
index 4d4f
From: Neng Chen
Add support for the option IPV6__MEMBERSHIP of the syscall
setsockopt(). This option controls membership in multicast groups.
Argument is a pointer to a struct ipv6_mreq.
The glibc header defines the ipv6_mreq structure,
which includes the following members:
struct in6_addr
When we have updated kernel headers to 5.2-rc1 we have introduced
new syscall numbers that can be not supported by older kernels
and fail with ENOSYS while the guest emulation succeeded before
because the syscalls were emulated with ipc().
This patch fixes the problem by using ipc() if the new sys
Philippe Mathieu-Daudé writes:
> [I forgot to Cc the list, resending]
>
> Hi Stefan, Lluís,
>
> When trying to add a trace event to report a float value, I get:
>
> trace-events:11: Argument type 'float' is not in whitelist. Only
> standard C types and fixed size integer types should be used. s
From: Yunqiang Su
Add support for options SOL_ALG of the syscall setsockopt(). This
option is used in relation to Linux kernel Crypto API, and allows
a user to set additional information for the cipher operation via
syscall setsockopt(). The field "optname" must be one of the
following:
- ALG_
The following changes since commit 474f3938d79ab36b9231c9ad3b5a9314c2aeacde:
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-21-2019'
into staging (2019-06-21 15:40:50 +0100)
are available in the Git repository at:
git://github.com/vivier/qemu.git tags/linux-user-for-4.1
QEMU_PPC_FEATURE2_VEC_CRYPTO enables the use
of VSX instructions in libcrypto that are accelerated
by the TCG vector instructions now.
QEMU_PPC_FEATURE2_DARN allows to use the new builtin
qemu_guest_getrandom() function.
Signed-off-by: Laurent Vivier
Message-Id: <20190609143521.19374-1-laur...@v
From: Richard Henderson
If one uses -L $PATH to point to a full chroot, the startup time
is significant. In addition, the existing probing algorithm fails
to handle symlink loops.
Instead, probe individual paths on demand. Cache both positive
and negative results within $PATH, so that any one
The default CPU for pseries has been set to POWER9 by default.
We can use the same default for linux-user
Signed-off-by: Laurent Vivier
Message-Id: <20190609143521.19374-2-laur...@vivier.eu>
Signed-off-by: Laurent Vivier
---
linux-user/ppc/target_elf.h | 2 +-
1 file changed, 1 insertion(+), 1
From: Aleksandar Markovic
Add files for MSA MIPS32R6 target testings (copiling and running).
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1561543629-20327-7-git-send-email-aleksandar.marko...@rt-rk.com>
---
.../mips/user/ase/msa/test_msa_compile_32r6eb.sh |
From: Aleksandar Markovic
Fix certian test cases for MSA pack instructions.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1561543629-20327-8-git-send-email-aleksandar.marko...@rt-rk.com>
---
.../tcg/mips/user/ase/msa/pack/test_msa_pckev_b.c | 64 +++--
From: Aleksandar Markovic
Add tests for MSA move instructions.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1561543629-20327-3-git-send-email-aleksandar.marko...@rt-rk.com>
---
tests/tcg/mips/include/wrappers_msa.h | 8 ++
tests/tcg/mips/user/a
[I forgot to Cc the list, resending]
Hi Stefan, Lluís,
When trying to add a trace event to report a float value, I get:
trace-events:11: Argument type 'float' is not in whitelist. Only
standard C types and fixed size integer types should be used. struct,
union, and other complex pointer types sh
From: Aleksandar Markovic
Add tests for instructions whose result depends on the value in destination
register (prior to instruction execution).
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1561543629-20327-4-git-send-email-aleksandar.marko...@rt-rk.com>
---
From: Aleksandar Markovic
The following changes since commit 474f3938d79ab36b9231c9ad3b5a9314c2aeacde:
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-21-2019'
into staging (2019-06-21 15:40:50 +0100)
are available in the git repository at:
https://github.com/AMarkovic
From: Aleksandar Markovic
Amend tests for MSA int multiply instructions.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1561543629-20327-5-git-send-email-aleksandar.marko...@rt-rk.com>
---
tests/tcg/mips/include/wrappers_msa.h | 16 ++
.../user/as
From: Aleksandar Markovic
Fix big endian host behavior for interleave MSA instructions. Previous
fix used TARGET_WORDS_BIGENDIAN instead of HOST_WORDS_BIGENDIAN, which
was a mistake.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1561543629-20327-9-git-send-emai
From: Aleksandar Markovic
Add tests for MSA bit move instructions.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1561543629-20327-2-git-send-email-aleksandar.marko...@rt-rk.com>
---
tests/tcg/mips/include/wrappers_msa.h | 32 ++-
.../mips/user/as
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
Message-Id: <20190624222844.26584-6-f4...@amsat.org>
---
hw/mips/gt64xxx_pci.c | 48 +---
1 file changed, 37 insertions(+), 11 deletions(-)
diff --gi
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
Message-Id: <20190624222844.26584-7-f4...@amsat.org>
---
Makefile.objs | 1 +
hw/mips/gt64xxx_pci.c | 29 ++---
hw/mips/trace-events | 4
3 files changed,
From: Aleksandar Markovic
The size is one byte less than it should be:
address-space: rc4030-dma
-fffe (prio 0, i/o): rc4030.dma
rc4030 is used in MIPS Jazz board context.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Reviewed-by: Philippe Ma
From: Aleksandar Markovic
Fix some simple checkpatch.pl warnings in rc4030.c.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <1561472838-32272-3-git-send-email-aleksandar.marko...@rt-rk.com>
---
hw/dma/rc4030.c | 18 +
From: Philippe Mathieu-Daudé
Since commit 8c06fbdf36b checkpatch.pl enforce a new multiline
comment syntax. Since we'll move this code around, fix its style
first.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
Message-Id: <20190624222844.26584-2-f4...@amsat.org>
---
h
From: Philippe Mathieu-Daudé
Since we'll move this code around, fix its style first:
ERROR: space prohibited between function name and open parenthesis
ERROR: line over 90 characters
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
Message-Id: <20190624222844.26584-5
From: Philippe Mathieu-Daudé
One byte is missing, use an aligned size.
(qemu) info mtree
memory-region: pci0-mem
-fffe (prio 0, i/o): pci0-mem
^
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovi
From: Philippe Mathieu-Daudé
Since we'll move this code around, fix its style first:
ERROR: braces {} are necessary for all arms of this statement
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
Message-Id: <20190624222844.26584-4-f4...@amsat.org>
---
hw/mips/gt64xxx
From: Philippe Mathieu-Daudé
Since we'll move this code around, fix its style first:
ERROR: code indent should never use tabs
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
Message-Id: <20190624222844.26584-3-f4...@amsat.org>
---
hw/mips/gt64xxx_pci.c | 312
Le 26/06/2019 à 13:24, Lucien Anti-Spam a écrit :
> Hi Richard/Laurent,
>
> Great catch, I also just stumbled on this problem as well which I didnt
> see with my other application code.
>
> But I have another problem after applying the changes from your email,
> "RTE" and breakpoints around a MOV
Kevin,
Rethinking this change (where we construct the device path from outside and
call boot_prio_find()),
this is pretty tricky to implement since we need to take care of
csm_bootprio_ata() and
csm_bootprio_pci() which do not work with device path.
In addition,
bootprio_find_fdc_device
Hi Richard/Laurent,
Great catch, I also just stumbled on this problem as well which I didnt see
with my other application code.
But I have another problem after applying the changes from your email, "RTE"
and breakpoints around a MOV/BusException/RTE behave oddly.
I would like to test with the s
Alex Bennée writes:
> Vanderson Martins do Rosario writes:
>
>> When the tb_flush removes a block and it's recreated, this shouldn't
>> be creating a new block but using the one that is found by:
>>
>> lookup_result = g_list_find_custom(tb_ctx.tb_statistics, new_stats,
>> statistics_cmp);
>>
>
On 26/06/2019 04:31, elohi...@gmail.com wrote:
> From: Xie Yongji
Could you use the same address to send the series?
Or may be you need to add a Signed-off-by with your name and this address?
I don't know what is the rule when someone send a patch with a different
address than the author one but
On 6/21/19 6:34 PM, Andrew Jones wrote:
> Move the getting/putting of the fpsimd registers out of
> kvm_arch_get/put_registers() into their own helper functions
> to prepare for alternatively getting/putting SVE registers.
>
> No functional change.
>
> Signed-off-by: Andrew Jones
> Reviewed-by:
On 6/25/19 11:19 PM, Max Reitz wrote:
> Without this argument, qemu will print an angry message about not being
> able to connect to a display server if $DISPLAY is not set. For me,
> that breaks iotests.supported_formats() because it thus only sees
> ["Could", "not", "connect"] as the supported f
g
On Tue, Jun 25, 2019 at 05:56:42PM +0200, Richard Henderson wrote:
> On 6/25/19 5:37 PM, Mark Cave-Ayland wrote:
> > The problem is that in tcg/tcg-op.h we define "DEF(dup2_vec, 1, 2, 0,
> > IMPLVEC |
> > IMPL(TCG_TARGET_REG_BITS == 32))" and in the last patchset dup2_vec isn't
> > introduced
On 6/26/19 9:42 AM, Igor Mammedov wrote:
> Fallback might affect guest or worse whole host performance
> or functionality if backing file were used to share guest RAM
> with another process.
>
> Patch deprecates fallback so that we could remove it in future
> and ensure that QEMU will provide expe
On Wed, 26 Jun 2019 10:31:26 +0800
elohi...@gmail.com wrote:
> From: Xie Yongji
>
> In order to avoid migration issues, we introduce a "use-started"
> property to the base virtio device to indicate whether use
> "started" flag or not. This property will be true by default and
> set to false when
On 26/06/19 06:46, Markus Armbruster wrote:
>> I'm not sure how to wire it together without the bus abstraction? So
>> I'll stick with the bus for now. It *is* extremely convenient!
>
> As far as I can tell offhand, a common use of bus-less connections
> between devices is wiring together composit
On 6/21/19 6:34 PM, Andrew Jones wrote:
> Since 97a28b0eeac14 ("target/arm: Allow VFP and Neon to be disabled via
> a CPU property") we can disable the 'max' cpu model's VFP and neon
> features, but there's no way to disable SVE. Add the 'sve=on|off'
> property to give it that flexibility. We also
> From: Aleksandar Markovic
> Sent: Wednesday, June 26, 2019 12:07 PM
> To: qemu-devel@nongnu.org
> Cc: Aleksandar Markovic; Aleksandar Rikalo
> Subject: [PATCH v6 7/8] tests/tcg: target/mips: Fix some test cases for pack
> MSA instructions
>
> From: Aleksandar Markovic
>
> Fix certian test case
Le 26/06/2019 à 10:57, Philippe Mathieu-Daudé a écrit :
> On 6/25/19 7:09 PM, Laurent Vivier wrote:
>> Le 25/06/2019 à 17:57, Philippe Mathieu-Daudé a écrit :
>>> On 6/24/19 10:07 PM, Laurent Vivier wrote:
Hi,
Jason, Can I have an Acked-by from you (as network devices maintainer)?
>>
> From: Aleksandar Markovic
> Sent: Wednesday, June 26, 2019 12:07 PM
> To: qemu-devel@nongnu.org
> Cc: Aleksandar Markovic; Aleksandar Rikalo
> Subject: [PATCH v6 8/8] target/mips: Fix big endian host behavior for
> interleave MSA instructions
>
> From: Aleksandar Markovic
>
> Fix big endian ho
From: Aleksandar Markovic
Add tests for instructions whose result depends on the value in destination
register (prior to instruction execution).
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
---
tests/tcg/mips/include/wrappers_msa.h | 40
.../ase/msa/int
From: Aleksandar Markovic
Amend tests for MSA int multiply instructions.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
---
tests/tcg/mips/include/wrappers_msa.h | 16 ++
.../user/ase/msa/int-multiply/test_msa_maddv_b.c | 214 +
.../user/
From: Aleksandar Markovic
Add files for MSA MIPS32R6 target testings (copiling and running).
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
---
.../mips/user/ase/msa/test_msa_compile_32r6eb.sh | 627 +
.../mips/user/ase/msa/test_msa_compile_32r6el.sh
From: Aleksandar Markovic
Add tests for MSA move instructions.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
---
tests/tcg/mips/include/wrappers_msa.h | 8 ++
tests/tcg/mips/user/ase/msa/move/test_msa_move_v.c | 149 +
tests/tcg/mips/user
From: Aleksandar Markovic
Add tests for MSA bit move instructions.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
---
tests/tcg/mips/include/wrappers_msa.h | 32 ++-
.../mips/user/ase/msa/bit-move/test_msa_binsl_b.c | 214 +
.../mips/user/
On 6/21/19 6:34 PM, Andrew Jones wrote:
> Suggested-by: Dave Martin
> Signed-off-by: Andrew Jones
> ---
> target/arm/helper.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Richard Henderson
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index df4276f5f6ca..edba94004e0b 1006
From: Aleksandar Markovic
Fix certian test cases for MSA pack instructions.
Signed-off-by: Aleksandar Markovic
---
.../tcg/mips/user/ase/msa/pack/test_msa_pckev_b.c | 64 +++---
.../tcg/mips/user/ase/msa/pack/test_msa_pckev_d.c | 64 +++---
.../tcg/mips/user/a
From: Aleksandar Markovic
This series contains various improvements and additions of MSA ASE
TCG tests.
v5->v6:
- fixed bad values for some test cases of pack instructions
- fixex big endian host behavior for interleave instructions
v4->v5:
- added patch on MIPS32R6 support
- amended
From: Aleksandar Markovic
Fix big endian host behavior for interleave MSA instructions. Previous
fix used TARGET_WORDS_BIGENDIAN instead of HOST_WORDS_BIGENDIAN, which
was a mistake.
Signed-off-by: Aleksandar Markovic
---
target/mips/msa_helper.c | 24
1 file changed,
Hi Drew,
On 6/21/19 6:34 PM, Andrew Jones wrote:
> Since 97a28b0eeac14 ("target/arm: Allow VFP and Neon to be disabled via
> a CPU property") we can disable the 'max' cpu model's VFP and neon
> features, but there's no way to disable SVE. Add the 'sve=on|off'
> property to give it that flexibility
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