Patchew URL: https://patchew.org/QEMU/20190701144705.102615-1-...@redhat.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
make
On Mon, Jul 1, 2019 at 5:37 AM Philippe Mathieu-Daudé wrote:
>
> Commit ba1ba5cca introduce the ARM_CPU_TYPE_NAME() macro.
> Unify the code base by use it in all places.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/arm/allwinner-a10.c | 3 ++-
>
From: Hongbo Zhang
For AArch64, the existing "virt" machine is primarily meant to
run on KVM and execute virtualization workloads, but we need an
environment as faithful as possible to physical hardware, for supporting
firmware and OS development for physical Aarch64 machines.
This patch
On Thu, 27 Jun 2019 at 13:48, wrote:
>
> I believe we are not in softfreeze yet, and this is the only real
> fix I have for IPMI at the moment.
>
> This was posted Nov 2018 with little commentary.
>
> The following changes since commit 474f3938d79ab36b9231c9ad3b5a9314c2aeacde:
>
> Merge
Peter Maydell writes:
> On Mon, 24 Jun 2019 at 14:43, Alex Bennée wrote:
>>
>> The following changes since commit 474f3938d79ab36b9231c9ad3b5a9314c2aeacde:
>>
>> Merge remote-tracking branch
>> 'remotes/amarkovic/tags/mips-queue-jun-21-2019' into staging (2019-06-21
>> 15:40:50 +0100)
>
Philippe Mathieu-Daudé writes:
> We removed the PCMachineState access, we can now let the fw_cfg_init()
> function to take a generic MachineState object.
to take -> take
>
> Suggested-by: Samuel Ortiz
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/i386/pc.c | 5 +++--
> 1 file changed,
On 28/06/2019 01:32, Max Reitz wrote:
> The commit and the mirror block job must be able to drop their filter
> node at any point. However, this will not be possible if any of the
> BdrvChild links to them is frozen. Therefore, we need to prevent them
> from ever becoming frozen.
>
>
These routines are TCG specific.
Signed-off-by: Philippe Mathieu-Daudé
---
v4: get_phys_page_attrs_debug is not TCG specific (Peter)
---
target/arm/Makefile.objs | 2 +-
target/arm/cpu.c | 9 +-
target/arm/debug_helper.c | 311 ++
Richard Henderson writes:
> On 6/14/19 10:11 AM, Alex Bennée wrote:
>> @@ -95,6 +103,10 @@ void translator_loop(const TranslatorOps *ops,
>> DisasContextBase *db,
>> ops->translate_insn(db, cpu);
>> }
>>
>> +if (plugin_enabled) {
>> +
From: Andrew Jeffery
>From the datasheet:
This register stores the current status of counter #N. When timer
enable bit TMC30[N * b] is disabled, the reload register will be
loaded into this counter. When timer bit TMC30[N * b] is set, the
counter will start to decrement. CPU can update
On Mon, 2019-07-01 at 17:54 +0100, Peter Maydell wrote:
> On Thu, 27 Jun 2019 at 16:24, Palmer Dabbelt
> wrote:
> > From: Alistair Francis
> >
> > Add OpenSBI version 0.3 as a git submodule and as a prebult binary.
> >
> > Signed-off-by: Alistair Francis
> > Reviewed-by: Bin Meng
> >
On Mon, 2019-07-01 at 19:13 +0100, Peter Maydell wrote:
> On Mon, 1 Jul 2019 at 19:09, Alistair Francis <
> alistair.fran...@wdc.com> wrote:
> > On Mon, 2019-07-01 at 19:01 +0100, Peter Maydell wrote:
> > > On Mon, 1 Jul 2019 at 18:50, Alistair Francis <
> > > alistair.fran...@wdc.com> wrote:
> >
On Sun, Jun 30, 2019 at 01:39:33PM -0400, Cleber Rosa wrote:
> On Fri, Jun 28, 2019 at 05:18:46PM -0300, Eduardo Habkost wrote:
> > On Fri, Jun 28, 2019 at 11:02:17AM -0400, Wainer dos Santos Moschetta wrote:
> > > Until now the suite of acceptance tests doesn't exercise
> > > QEMU with kvm
On Mon, Jul 01, 2019 at 03:34:51PM -0300, Eduardo Habkost wrote:
>
> Agreed that kvm:tcg fallback I suggested isn't a good idea.
> However, do we really want to require a separate test method to
> be written just because we want to use a different accelerator or
> other QEMU option?
>
No, in the
On Mon, Jul 01, 2019 at 05:34:35PM +0200, Philippe Mathieu-Daudé wrote:
> Add a test of the NeXTcube framebuffer using the Tesseract OCR
> engine on a screenshot of the framebuffer device.
>
> The test is very quick:
>
> $ avocado --show=app,ocr run tests/acceptance/machine_m68k_nextcube.py
Hi Peter,
On 7/1/19 5:55 PM, Auger Eric wrote:
> Hi Peter,
>
> On 7/1/19 3:52 PM, Peter Maydell wrote:
>> On Tue, 25 Jun 2019 at 13:15, Shameer Kolothum
>> wrote:
>>>
>>> This series is an attempt to provide device memory hotplug support
>>> on ARM virt platform. This is based on Eric's recent
On Wed, 26 Jun 2019 at 13:18, Laurent Vivier wrote:
>
> The following changes since commit 474f3938d79ab36b9231c9ad3b5a9314c2aeacde:
>
> Merge remote-tracking branch
> 'remotes/amarkovic/tags/mips-queue-jun-21-2019' into staging (2019-06-21
> 15:40:50 +0100)
>
> are available in the Git
On Mon, Jul 01, 2019 at 05:44:58PM +0200, Philippe Mathieu-Daudé wrote:
> On 7/1/19 5:41 PM, Peter Maydell wrote:
> > On Mon, 1 Jul 2019 at 14:25, Philippe Mathieu-Daudé
> > wrote:
> >>
> >> Paolo motived me to salvage this (other!) previous series fromi
> >> Samuel Ortiz (NEMU project).
> >>
>
Hi Peter,
On 7/1/19 3:52 PM, Peter Maydell wrote:
> On Tue, 25 Jun 2019 at 13:15, Shameer Kolothum
> wrote:
>>
>> This series is an attempt to provide device memory hotplug support
>> on ARM virt platform. This is based on Eric's recent works here[1]
>> and carries some of the pc-dimm related
From: Jonathan Behrens
QEMU currently always triggers an illegal instruction exception when
code attempts to read the time CSR. This is valid behavor, but only if
the TM bit in mcounteren is hardwired to zero. This change also
corrects mcounteren and scounteren CSRs to be 32-bits on both 32-bit
P J P 于2019年7月1日周一 下午8:38写道：
> From: Prasad J Pandit
>
> Refactor 'net_bridge_run_helper' routine to avoid buffer
> formatting to prepare 'helper_cmd' and using shell to invoke
> helper command. Instead directly execute helper program with
> due arguments.
>
> Signed-off-by: Prasad J Pandit
>
On 7/1/19 5:41 PM, Peter Maydell wrote:
> On Mon, 1 Jul 2019 at 14:25, Philippe Mathieu-Daudé wrote:
>>
>> Paolo motived me to salvage this (other!) previous series fromi
>> Samuel Ortiz (NEMU project).
>>
>> v1 cover from Samuel [1]:
>>
>> This patchset allows for building and running ARM
On Mon, 1 Jul 2019 at 14:25, Philippe Mathieu-Daudé wrote:
>
> Paolo motived me to salvage this (other!) previous series fromi
> Samuel Ortiz (NEMU project).
>
> v1 cover from Samuel [1]:
>
> This patchset allows for building and running ARM targets with TCG
> disabled. It splits the
Add a test of the NeXTcube framebuffer using the Tesseract OCR
engine on a screenshot of the framebuffer device.
The test is very quick:
$ avocado --show=app,ocr run tests/acceptance/machine_m68k_nextcube.py
JOB ID : f7d3c27976047036dc568183baf64c04863d9985
JOB LOG:
On 7/1/19 5:25 PM, Peter Maydell wrote:
> On Mon, 1 Jul 2019 at 14:26, Philippe Mathieu-Daudé wrote:
>>
>> Per Peter Maydell:
>>
>> Semihosting hooks either SVC or HLT instructions, and inside KVM
>> both of those go to EL1, ie to the guest, and can't be trapped to
>> KVM.
>>
>> Let
On Mon, 1 Jul 2019 at 14:26, Philippe Mathieu-Daudé wrote:
>
> Per Peter Maydell:
>
> Semihosting hooks either SVC or HLT instructions, and inside KVM
> both of those go to EL1, ie to the guest, and can't be trapped to
> KVM.
>
> Let check_for_semihosting() return False when not running on
Hi,
I was looking at Thomas' last series [*] where he adds the
NeXTcube machine, thinking about enforcing a new rule "new
machines must have tests". Then I realized the UART is not
yet implemented, so our current sample tests are not helpful.
Since the framebuffer is working, I gave a try at
Signed-off-by: Philippe Mathieu-Daudé
---
v2:
- install tesseract English package (Thomas)
- install PIL
---
.travis.yml | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/.travis.yml b/.travis.yml
index aeb9b211cd..0980f65ec5 100644
--- a/.travis.yml
+++ b/.travis.yml
@@
On Mon, Jul 01, 2019 at 05:03:33PM +0200, Aleksandar Markovic wrote:
> On Jul 1, 2019 4:22 PM, "Philippe Mathieu-Daudé" wrote:
> >
> > ping?
> >
> > On 6/7/19 7:49 PM, Philippe Mathieu-Daudé wrote:
> > > In commit f6e501a28ef9, Eduardo started to use "check_" as a
> > > prefix for methods of
On Jul 1, 2019 4:22 PM, "Philippe Mathieu-Daudé" wrote:
>
> ping?
>
> On 6/7/19 7:49 PM, Philippe Mathieu-Daudé wrote:
> > In commit f6e501a28ef9, Eduardo started to use "check_" as a
> > prefix for methods of similar purpose. Follow this prior art,
> > since it might become the conventions when
On Wed, 26 Jun 2019 at 12:45, Aleksandar Markovic
wrote:
>
> From: Aleksandar Markovic
>
> The following changes since commit 474f3938d79ab36b9231c9ad3b5a9314c2aeacde:
>
> Merge remote-tracking branch
> 'remotes/amarkovic/tags/mips-queue-jun-21-2019' into staging (2019-06-21
> 15:40:50
P J P 于2019年7月1日周一 下午8:38写道：
> From: Prasad J Pandit
>
> Move repeating error handling sequence in parse_acl_file routine
> to an 'err' label.
>
> Signed-off-by: Prasad J Pandit
>
Reviewed-by: Li Qiang
> ---
> qemu-bridge-helper.c | 19 +--
> 1 file changed, 9
P J P 于2019年7月1日周一 下午8:38写道：
> From: Prasad J Pandit
>
> The network interface name in Linux is defined to be of size
> IFNAMSIZ(=16), including the terminating null('\0') byte.
> The same is applied to interface names read from 'bridge.conf'
> file to form ACL rules. If user supplied
On Sun, 30 Jun 2019 at 11:21, Hongbo Zhang wrote:
>
> For the Aarch64, there is one machine 'virt', it is primarily meant to
> run on KVM and execute virtualization workloads, but we need an
> environment as faithful as possible to physical hardware, to support
> firmware and OS development for
On Mon, 1 Jul 2019 at 14:26, Philippe Mathieu-Daudé wrote:
>
> These routines are TCG specific.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> target/arm/Makefile.objs | 2 +-
> target/arm/cpu.c | 11 +-
> target/arm/debug_helper.c | 334 ++
>
Microvm is a machine type inspired by both NEMU and Firecracker, and
constructed after the machine model implemented by the latter.
It's main purpose is providing users a KVM-only machine type with fast
boot times, minimal attack surface (measured as the number of IO ports
and MMIO regions
Put QOM and main struct definition in a separate header file, so it
can be accesed from other components.
This is needed for the microvm machine type implementation.
Signed-off-by: Sergio Lopez
---
hw/virtio/virtio-mmio.c | 35 +---
hw/virtio/virtio-mmio.h | 60
Microvm is a machine type inspired by both NEMU and Firecracker, and
constructed after the machine model implemented by the latter.
It's main purpose is providing users a KVM-only machine type with fast
boot times, minimal attack surface (measured as the number of IO ports
and MMIO regions
Peter Maydell writes:
> On Mon, 24 Jun 2019 at 14:43, Alex Bennée wrote:
>>
>> The following changes since commit 474f3938d79ab36b9231c9ad3b5a9314c2aeacde:
>>
>> Merge remote-tracking branch
>> 'remotes/amarkovic/tags/mips-queue-jun-21-2019' into staging (2019-06-21
>> 15:40:50 +0100)
>>
On Sun, 30 Jun 2019 at 11:21, Hongbo Zhang wrote:
>
> For the Aarch64, there is one machine 'virt', it is primarily meant to
> run on KVM and execute virtualization workloads, but we need an
> environment as faithful as possible to physical hardware, for supporting
> firmware and OS development
Aaron Lindsay OS writes:
> On Jun 28 21:52, Alex Bennée wrote:
>> Aaron Lindsay OS writes:
>> > To make sure I understand - you're implying that one such query will
>> > return the PA from the guest's perspective, right?
>>
>> Yes - although it will be two queries:
>>
>> struct
Extract PVH related functions from pc.c, and put them in pvh.c, so
they can be shared with other components.
Signed-off-by: Sergio Lopez
---
hw/i386/Makefile.objs | 1 +
hw/i386/pc.c | 120 +-
hw/i386/pvh.c | 113
Hi Paolo,
On 12/6/18 10:50 PM, Paolo Bonzini wrote:
> gtester is deprecated by upstream glib (see for example the announcement
> at https://blog.gtk.org/2018/07/11/news-from-glib-2-58/) and it does
> not support tests that call g_test_skip in some glib stable releases.
>
> glib suggests instead
On Jul 1, 2019 4:45 PM, "Philippe Mathieu-Daudé" wrote:
>
> The MIPS I7200 got added in commit d45942d908e, and the I6500
> in commit ca1ffd14ed8.
> Extend the coverage on the little-endian machines.
> The 4Kc and 20Kc are still covered by the big-endian machines.
>
> Signed-off-by: Philippe
On Jun 28 21:52, Alex Bennée wrote:
> Aaron Lindsay OS writes:
> > To make sure I understand - you're implying that one such query will
> > return the PA from the guest's perspective, right?
>
> Yes - although it will be two queries:
>
> struct qemu_plugin_hwaddr *hw =
On Fri, Jun 14, 2019 at 12:07:09PM +0200, Philippe Mathieu-Daudé wrote:
> Hi,
>
> Apparently QEMU static linking is slowly bitroting. Obviously it
> depends the libraries an user has installed, anyway it seems there
> are not much testing done.
Bitrotting implies that it actually worked in the
Add a helper function (mptable_generate) for generating an Intel
MPTable according to version 1.4 of the specification.
This is needed for the microvm machine type implementation.
Signed-off-by: Sergio Lopez
---
hw/i386/mptable.c | 156 +
Pranith Kumar writes:
> Minor nits.
>
> On Fri, Jun 14, 2019 at 11:41 AM Alex Bennée wrote:
>>
>> From: "Emilio G. Cota"
>>
>> Signed-off-by: Emilio G. Cota
>> ---
>> bsd-user/syscall.c | 9 +
>> linux-user/syscall.c | 3 +++
>> 2 files changed, 12 insertions(+)
>>
>> diff --git
The MIPS I7200 got added in commit d45942d908e, and the I6500
in commit ca1ffd14ed8.
Extend the coverage on the little-endian machines.
The 4Kc and 20Kc are still covered by the big-endian machines.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/machine-none-test.c | 4 ++--
1 file changed, 2
On Sun, 30 Jun 2019 at 11:21, Hongbo Zhang wrote:
>
> For the Aarch64, there is one machine 'virt', it is primarily meant to
> run on KVM and execute virtualization workloads, but we need an
> environment as faithful as possible to physical hardware, for supporting
> firmware and OS development
On 7/1/19 4:36 PM, Daniel P. Berrangé wrote:
> On Fri, Jun 14, 2019 at 12:07:09PM +0200, Philippe Mathieu-Daudé wrote:
>> Hi,
>>
>> Apparently QEMU static linking is slowly bitroting. Obviously it
>> depends the libraries an user has installed, anyway it seems there
>> are not much testing done.
>
Michael S. Tsirkin writes:
> Rename function arguments to make intent clearer.
> Better documentation for slot control logic.
>
> Suggested-by: Igor Mammedov
> Signed-off-by: Michael S. Tsirkin
> ---
>
>
> include/hw/pci/pcie.h | 3 ++-
> hw/pci/pcie.c | 17 +++--
> 2
On Sun, 30 Jun 2019 at 11:21, Hongbo Zhang wrote:
>
> For the Aarch64, there is one machine 'virt', it is primarily meant to
> run on KVM and execute virtualization workloads, but we need an
> environment as faithful as possible to physical hardware, to support
> firmware and OS development for
On 01/07/2019 15:06, Peter Maydell wrote:
> On Tue, 18 Jun 2019 at 17:55, Cédric Le Goater wrote:
>>
>> The FMC controller on the Aspeed SoCs support DMA to access the flash
>> modules. It can operate in a normal mode, to copy to or from the flash
>> module mapping window, or in a checksum
Justin Hibbits writes:
> On Wed, 26 Jun 2019 18:16:36 +0200
> Laurent Vivier wrote:
>
>> Le 26/06/2019 à 18:14, Laurent Vivier a écrit :
>> > Le 07/06/2019 à 20:56, Justin Hibbits a écrit :
>> >> The attached very trivial patch fixes a startup bug that prevents
>> >> at least Qemu 3.1 and
On Tue, 25 Jun 2019 at 14:07, Bastian Koppelmann
wrote:
>
> The following changes since commit 474f3938d79ab36b9231c9ad3b5a9314c2aeacde:
>
> Merge remote-tracking branch
> 'remotes/amarkovic/tags/mips-queue-jun-21-2019' into staging (2019-06-21
> 15:40:50 +0100)
>
> are available in the Git
On Tue, 25 Jun 2019 at 13:15, Shameer Kolothum
wrote:
>
> This series is an attempt to provide device memory hotplug support
> on ARM virt platform. This is based on Eric's recent works here[1]
> and carries some of the pc-dimm related patches dropped from his
> series.
>
> The kernel support for
On Fri, Jun 14, 2019 at 12:07:10PM +0200, Philippe Mathieu-Daudé wrote:
> It is pointless and confusing to have GLUSTERFS variables
> in config-host.mak when glusterfs is not usable.
>
> Reviewed-by: Niels de Vos
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> configure | 36
On 01/07/2019 14:59, Peter Maydell wrote:
> On Tue, 18 Jun 2019 at 17:54, Cédric Le Goater wrote:
>>
>> From: Andrew Jeffery
>>
>> First up: This is not the way the hardware behaves.
>>
>> However, it helps resolve real-world problems with short periods being
>> used under Linux. Commit
On Sun, 30 Jun 2019 at 11:21, Hongbo Zhang wrote:
>
> For the Aarch64, there is one machine 'virt', it is primarily meant to
> run on KVM and execute virtualization workloads, but we need an
> environment as faithful as possible to physical hardware, for supporting
> firmware and OS development
On Tue, 25 Jun 2019 at 13:15, Shameer Kolothum
wrote:
>
> From: Eric Auger
>
> This patch adds the memory hot-plug/hot-unplug infrastructure
> in machvirt. The device memory is not yet exposed to the Guest
> either through DT or ACPI and hence both cold/hot plug of memory
> is explicitly
On Mon, Jul 01, 2019 at 02:33:11PM +0100, Alex Bennée wrote:
>
> Edgar E. Iglesias writes:
>
> > On Fri, Jun 28, 2019 at 02:16:41PM +0200, Richard Henderson wrote:
> >> On 6/28/19 1:39 PM, Luc Michel wrote:
> >> > Add a TCG trace at the begining of a translation block recording the
> >> > first
Extract all the functions that are not PC-machine specific into
the (arch-specific) fw_cfg.c file. This will allow other X86-machine
to reuse these functions.
Suggested-by: Samuel Ortiz
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/fw_cfg.c | 137
On Fri, 14 Jun 2019 23:56:18 +0800
Tao Xu wrote:
> This series of patches will build Heterogeneous Memory Attribute Table (HMAT)
> according to the command line. The ACPI HMAT describes the memory attributes,
> such as memory side cache attributes and bandwidth and latency details,
> related to
should I use *-avr-cpu* suffix or can I do without it. i.e. *xyz* instead
of *xyz-avr-cpu*
On Mon, Jul 1, 2019 at 2:08 AM Igor Mammedov wrote:
> On Fri, 28 Jun 2019 18:54:27 +0300
> Michael Rolnik wrote:
>
> > Igor.
> >
> > so avr6 instead of a6-avr-cpu, xmega2 instead of xmega2-avr-cpu and so
On 6/14/19 12:07 PM, Philippe Mathieu-Daudé wrote:
> Hi,
>
> Apparently QEMU static linking is slowly bitroting. Obviously it
> depends the libraries an user has installed, anyway it seems there
> are not much testing done.
>
> This series fixes few issues, enough to build QEMU on a Ubuntu
>
Now that the pc_build_smbios() function has been refactored to not
depend of PC specific types, rename it to a more generic name.
Suggested-by: Samuel Ortiz
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
ping?
On 6/7/19 7:49 PM, Philippe Mathieu-Daudé wrote:
> In commit f6e501a28ef9, Eduardo started to use "check_" as a
> prefix for methods of similar purpose. Follow this prior art,
> since it might become the conventions when writting Avocado
> tests.
>
> Suggested-by: Cleber Rosa
>
Let the pc_build_smbios() function take a generic MachineState
argument.
Suggested-by: Samuel Ortiz
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 2b6502a38c..1195394694 100644
Let the pc_build_feature_control_file() function take a generic MachineState
argument.
Suggested-by: Samuel Ortiz
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index
Now that the pc_build_feature_control_file() function has been
refactored to not depend of PC specific types, rename it to a
more generic name.
Suggested-by: Samuel Ortiz
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff
On 6/21/19 8:12 PM, BALATON Zoltan wrote:
> Incremental patch to squash into last series
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/display/ati_dbg.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/hw/display/ati_dbg.c b/hw/display/ati_dbg.c
> index b045f81d06..88b3a11315 100644
>
Edgar E. Iglesias writes:
> On Fri, Jun 28, 2019 at 02:16:41PM +0200, Richard Henderson wrote:
>> On 6/28/19 1:39 PM, Luc Michel wrote:
>> > Add a TCG trace at the begining of a translation block recording the
>> > first and last (past-the-end) PC values.
>> >
>> > Signed-off-by: Luc Michel
Pass the FWCfgState object by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
Pass the FWCfgState object by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index
We removed the PCMachineState access, we can now let the fw_cfg_init()
function to take a generic MachineState object.
Suggested-by: Samuel Ortiz
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc.c
Pass the CPUArchIdList array by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/hw/i386/pc.c
Pass the apic_id_limit value by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index
The address_space_memory variable is used once.
Use it in place and remove the argument.
Suggested-by: Samuel Ortiz
Reviewed-by: Li Qiang
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c
On Fri, 21 Jun 2019 at 07:52, Joel Stanley wrote:
>
> The ast2500 uses the watchdog to reset the SDRAM controller. This
> operation is usually performed by u-boot's memory training procedure,
> and it is enabled by setting a bit in the SCU and then causing the
> watchdog to expire. Therefore, we
A KVM-only build won't be able to run A or M-profile cpus,
disable them.
If KVM is not enabled, they are enabled by default.
Signed-off-by: Philippe Mathieu-Daudé
---
Sadly this does not work with --enable-tcg --enable-kvm dual config.
---
default-configs/arm-softmmu.mak | 14 ++
The boot_cpus is used once. Pass it by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c
The bochs_bios_init() function is not restricted to the Bochs
BIOS and is useful to other BIOS.
Since it is not specific to the PC machine, and can be reused
by other machines of the X86 architecture, rename it as
fw_cfg_arch_create().
Suggested-by: Samuel Ortiz
Reviewed-by: Li Qiang
To be able to extract the e820* code out of this file (in the next
patch), access e820_entries with its correct helper.
Reviewed-by: Li Qiang
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
Hi,
This is my take at salvaging some NEMU good work.
Samuel worked in adding the fw_cfg device to the x86-virt NEMU machine.
This series is inspired by NEMU's commit 3cb92d080835 [0] and adapted
to upstream style. The result makes the upstream codebase more
modularizable.
There are very little
This code is specific to the SoftFloat floating-point
implementation, which is only used by TCG.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/vfp_helper.c | 26 +++---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/target/arm/vfp_helper.c
Suggested-by: Samuel Ortiz
Reviewed-by: Li Qiang
Signed-off-by: Philippe Mathieu-Daudé
---
v3: KISS, do not use unsigned, do not add broken documentation
---
hw/i386/Makefile.objs| 2 +-
hw/i386/e820_memory_layout.c | 59 ++
hw/i386/e820_memory_layout.h
On Tue, 18 Jun 2019 at 17:53, Cédric Le Goater wrote:
>
> Hello,
>
> This series improves the current models of the Aspeed machines in QEMU
> and adds new ones. It also prepares ground for the future Aspeed SoC.
> You will find patches for :
>
> - per SoC mappings of the memory space and the
In few commits we will split the M-profile functions from this
file, and this function will also be called in the new file.
Declare it in the "internals.h" header.
Since it is in the middle of a block of M profile functions,
move it previous to this block to ease the later refactor.
A KVM-only build won't be able to run pre-ARMv7 cpus, disable them.
If KVM is not enabled, they are enabled by default.
Signed-off-by: Philippe Mathieu-Daudé
---
Sadly this does not work with --enable-tcg --enable-kvm dual config.
---
default-configs/arm-softmmu.mak | 33
We can now safely turn all TCG dependent build off when CONFIG_TCG is
off. This allows building ARM binaries with --disable-tcg.
Signed-off-by: Samuel Ortiz
Signed-off-by: Philippe Mathieu-Daudé
---
v3: complete rewrite of patch content, removed R-b tags
---
target/arm/Makefile.objs | 4
Per Peter Maydell:
Semihosting hooks either SVC or HLT instructions, and inside KVM
both of those go to EL1, ie to the guest, and can't be trapped to
KVM.
Let check_for_semihosting() return False when not running on TCG.
Signed-off-by: Philippe Mathieu-Daudé
---
v3: inline call to
To ease the review of the next commit,
move the vfp_exceptbits_to_host() function directly after
vfp_exceptbits_from_host(). Amusingly the diff shows we
are moving vfp_get_fpscr().
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/vfp_helper.c | 52 -
KVM is only able to run A profile cpus.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpu.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index d0376f46f7..b21d0fb891 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
Under KVM, the kernel gets the HVC call and handle the PSCI requests.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/internals.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 46a1313d69..57e0253ef4 100644
---
Suggested-by: Samuel Ortiz
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpu.c | 226 +
target/arm/cpu.h | 2 -
target/arm/translate-a64.c | 128 -
target/arm/translate.c | 88 ---
The vfp_set_fpscr() helper contains code specific to the host
floating point implementation (here the SoftFloat library).
Extract this code to vfp_set_fpscr_to_host().
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/vfp_helper.c | 127 +---
1 file
KVM requires at least a ARMv7 cpu.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpu.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 37afb12b2d..d0376f46f7 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1643,6
These routines are TCG specific.
The arm_deliver_fault() function is only used within the new
helper. Make it static.
Suggested-by: Alex Bennée
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/Makefile.objs | 1 +
target/arm/cpu.c | 6 +-
target/arm/helper.c | 53
These routines are TCG specific.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/Makefile.objs | 2 +-
target/arm/cpu.c | 11 +-
target/arm/debug_helper.c | 334 ++
target/arm/helper.c | 23 ---
target/arm/op_helper.c| 295
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