> -Original Message-
> From: Eduardo Habkost
> Sent: 11 December 2020 22:05
> To: qemu-devel@nongnu.org
> Cc: Markus Armbruster ; Igor Mammedov
> ; Stefan Berger
> ; Marc-André Lureau ;
> Daniel P. Berrange
> ; Philippe Mathieu-Daudé ; John Snow
> ; Kevin
> Wolf ; Eric Blake ; Paolo
> -Original Message-
> From: Eduardo Habkost
> Sent: 11 December 2020 22:05
> To: qemu-devel@nongnu.org
> Cc: Markus Armbruster ; Igor Mammedov
> ; Stefan Berger
> ; Marc-André Lureau ;
> Daniel P. Berrange
> ; Philippe Mathieu-Daudé ; John Snow
> ; Kevin
> Wolf ; Eric Blake ; Paolo
> -Original Message-
> From: Eduardo Habkost
> Sent: 11 December 2020 22:05
> To: qemu-devel@nongnu.org
> Cc: Markus Armbruster ; Igor Mammedov
> ; Stefan Berger
> ; Marc-André Lureau ;
> Daniel P. Berrange
> ; Philippe Mathieu-Daudé ; John Snow
> ; Kevin
> Wolf ; Eric Blake ; Paolo
On 12.12.2020 17:31, Richard Henderson wrote:
On 12/12/20 12:22 AM, Pavel Dovgalyuk wrote:
However, we can't cache them directly, because hash table can include only one
block with the specific pc.
That's not true at all.
Thanks, I missed, that icount is used for TB comparison in hash
Sorry, please write bug reports in proper English.
** Changed in: qemu
Status: New => Invalid
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https://bugs.launchpad.net/bugs/1907953
Title:
pkg install qemu-system-x86_64
On 13/12/2020 22.16, Philippe Mathieu-Daudé wrote:
> Include the 'ccache' package to speed up compilation.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> tests/docker/dockerfiles/debian10.docker | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
From: Elena Ufimtseva
Perform device reset in the remote process when QEMU performs
device reset. This is required to reset the internal state
(like registers, etc...) of emulated devices
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Hello,
This is the v13 of the patchset. Thank you very much for reviewing v12 and
sharing your feedback.
We have addressed all the comments from the v12 review except for the
following two items, which we will be addressing in subsequent patches:
- Prefix log messages with PID in the logging
From: Elena Ufimtseva
Defines MPQemuMsg, which is the message that is sent to the remote
process. This message is sent over QIOChannel and is used to
command the remote process to perform various tasks.
Define transmission functions used by proxy and by remote.
Signed-off-by: Jagannathan Raman
Proxy device object implements handler for PCI BAR writes and reads.
The handler uses BAR_WRITE/BAR_READ message to communicate to the
remote process with the BAR address and value to be written/read.
The remote process implements handler for BAR_WRITE/BAR_READ
message.
Signed-off-by: Jagannathan
x-remote-machine object sets up various subsystems of the remote
device process. Instantiate PCI host bridge object and initialize RAM, IO &
PCI memory regions.
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
Reviewed-by: Stefan Hajnoczi
---
Associate the file descriptor for a PCIDevice in remote process with
DeviceState object.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
hw/remote/remote-obj.c | 206
Initializes the message handler function in the remote process. It is
called whenever there's an event pending on QIOChannel that registers
this function.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
From: Elena Ufimtseva
Adds documentation explaining the command-line arguments needed
to use multi-process.
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
---
docs/multi-process.rst | 64
From: Elena Ufimtseva
Defines a PCI Device proxy object as a child of TYPE_PCI_DEVICE.
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
---
include/hw/remote/proxy.h | 36 +++
hw/remote/proxy.c
IOHUB object is added to manage PCI IRQs. It uses KVM_IRQFD
ioctl to create irqfd to injecting PCI interrupts to the guest.
IOHUB object forwards the irqfd to the remote process. Remote process
uses this fd to directly send interrupts to the guest, bypassing QEMU.
Signed-off-by: John G Johnson
PCI host bridge is setup for the remote device process. It is
implemented using remote-pcihost object. It is an extension of the PCI
host bridge setup by QEMU.
Remote-pcihost configures a PCI bus which could be used by the remote
PCI device to latch on to.
Signed-off-by: Jagannathan Raman
From: John G Johnson
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
docs/devel/index.rst | 1 +
docs/devel/multi-process.rst | 966 +++
MAINTAINERS
From: Elena Ufimtseva
The Proxy Object sends the PCI config space accesses as messages
to the remote process over the communication channel
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
---
SyncSysMemMsg message format is defined. It is used to send
file descriptors of the RAM regions to remote device.
RAM on the remote device is configured with a set of file descriptors.
Old RAM regions are deleted and new regions, each with an fd, is
added to the RAM.
Signed-off-by: Jagannathan
On Fri, Dec 11, 2020 at 12:48:05PM +, Peter Maydell wrote:
> On Fri, 11 Dec 2020 at 12:35, Philippe Mathieu-Daudé
> wrote:
> >
> > On 12/11/20 5:14 AM, David Gibson wrote:
> > > LemonBoy (5):
> > > ppc/translate: Fix unordered f64/f128 comparisons
> > > ppc/translate: Turn the
From: Elena Ufimtseva
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
---
include/hw/remote/mpqemu-link.h | 4
hw/remote/mpqemu-link.c | 34 ++
2 files changed, 38
Add ProxyMemoryListener object which is used to keep the view of the RAM
in sync between QEMU and remote process.
A MemoryListener is registered for system-memory AddressSpace. The
listener sends SYNC_SYSMEM message to the remote process when memory
listener commits the changes to memory, the
Add a configuration option to separate multi-process code
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
Reviewed-by: Stefan Hajnoczi
---
accel/Kconfig | 1 +
hw/Kconfig| 1 +
hw/remote/Kconfig | 3 +++
3 files changed, 5
Retrieve PCI configuration info about the remote device and
configure the Proxy PCI object based on the returned information
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
hw/remote/proxy.c | 84
From: Daniel Henrique Barboza
spapr_kvm_type() is considering 'vm_type=NULL' as a valid input, where
the function returns 0. This is relying on the current QEMU machine
options handling logic, where the absence of the 'kvm-type' option
will be reflected as 'vm_type=NULL' in this function.
This
From: Greg Kurz
spapr_phb_realize() passes the sPAPR machine state as opaque data
for the I/O callbacks:
memory_region_init_io(>msiwindow, OBJECT(sphb), _msi_ops, spapr,
^
"msi", msi_window_size);
Allow RAM MemoryRegion to be created from an offset in a file, instead
of allocating at offset of 0 by default. This is needed to synchronize
RAM between QEMU & remote process.
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
Reviewed-by: Stefan
From: Greg Kurz
Some functions in hw/ppc/spapr_events.c get a pointer to the machine
state using qdev_get_machine(). Convert them to get it from their
caller when possible.
Signed-off-by: Greg Kurz
Message-Id: <20201209170052.1431440-6-gr...@kaod.org>
Signed-off-by: David Gibson
---
From: Elena Ufimtseva
Adds QIO channel functions that transmit and receive iovs along with fds.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
include/io/channel.h | 50 +
From: Greg Kurz
This allows to drop a user of qdev_get_machine().
Signed-off-by: Greg Kurz
Message-Id: <20201209170052.1431440-4-gr...@kaod.org>
Signed-off-by: David Gibson
---
hw/ppc/spapr_hcall.c | 7 ---
hw/ppc/spapr_pci.c | 3 +--
include/hw/ppc/spapr.h | 2 +-
3 files changed,
From: Greg Kurz
This property has been deprecated since QEMU 5.0 by commit 22062e54bb68.
We only kept a legacy hack that internally converts "compat" into the
official "max-cpu-compat" property of the pseries machine type.
According to our deprecation policy, we could have removed it for QEMU
From: Cédric Le Goater
I have been keeping those logging messages in an ugly form for
while. Make them clean !
Beware not to activate all of them, this is really verbose.
Signed-off-by: Cédric Le Goater
Message-Id: <20201123163717.1368450-1-...@kaod.org>
Signed-off-by: David Gibson
---
From: Stephane Duverger
The ppc_tr_init_disas_context() function currently checks whether the
MMU is 64-bit by ANDing its model type with POWERPC_MMU_64B. This is
wrong : POWERPC_MMU_64B isn't a mask, it is the generic MMU model for
pre-PowerISA-2.03 64-bit CPUs (ie. PowerPC 970 in QEMU).
Use
Greg has agreed to be co-maintainer of the ppc target and machines.
This should avoid repeats of the problem we had in qemu-5.2 where a
last minute fix was needed while I was on holiday.
Signed-off-by: David Gibson
Acked-by: Greg Kurz
---
MAINTAINERS | 17 -
1 file changed, 16
From: Philippe Mathieu-Daudé
The '%u' conversion specifier is for decimal notation.
When prefixing a format with '0x', we want the hexadecimal
specifier ('%x').
Inspired-by: Dov Murik
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201103112558.2554390-4-phi...@redhat.com>
Reviewed-by:
From: Greg Kurz
This hack registers dummy VMState entries of ICPs in order to
support migration of old pseries machine types that used to
create all smp.max_cpus possible ICPs at machine init.
Part of the work is to unregister the dummy entries when plugging
an actual vCPU core, and to register
From: Greg Kurz
Callers don't really need to know how 64-bit MMU model enums are
computed. Hide this in a helper.
Signed-off-by: Greg Kurz
Message-Id: <20201209173536.1437351-3-gr...@kaod.org>
Signed-off-by: David Gibson
---
target/ppc/cpu-qom.h| 5 +
From: Greg Kurz
spapr_core_pre_plug() already guarantees that the slot for the given core
ID is available. It is thus safe to assume that spapr_find_cpu_slot()
returns a slot during plug. Turn the error path into an assertion.
It is also safe to assume that no device is attached to the
From: Giuseppe Musacchio
Suggested-by: Richard Henderson
Signed-off-by: Giuseppe Musacchio
Reviewed-by: Richard Henderson
Message-Id: <20201112230130.65262-3-thatle...@gmail.com>
Signed-off-by: David Gibson
---
target/ppc/fpu_helper.c | 228 ++--
1 file
From: Gan Qixin
When running qom-test, a memory leak occurred in the ppce500_init function,
this patch free irqs array to fix it.
ASAN shows memory leak stack:
Direct leak of 40 byte(s) in 1 object(s) allocated from:
#0 0xfffc5ceee1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0)
From: Greg Kurz
All users are passing _abort already. Document the fact
that spapr_drc_attach() should only be passed a free DRC, which
is supposedly the case if appropriate checking is done earlier.
Signed-off-by: Greg Kurz
Message-Id: <20201201113728.885700-5-gr...@kaod.org>
Signed-off-by:
From: Giuseppe Musacchio
The PowerISA reference states that the comparison operators update the
FPCC, CR and FPSCR and, if VE=1, jump to the exception handler.
Moving the exception-triggering code after the CC update sequence solves
the problem.
Signed-off-by: Giuseppe Musacchio
Reviewed-by:
From: Greg Kurz
When a CPU is hot-plugged, we set its compat mode to match the boot
CPU, which was either set by machine reset or by CAS. This is currently
handled in the plug handler after the core got realized. Potential errors
of ppc_set_compat() are propagated to the hot-plug logic.
From: Greg Kurz
Pre-plug of a memory device, be it an NVDIMM or a PC-DIMM, ensures
that the memory slot is available and that addresses don't overlap
with existing memory regions. The corresponding DRCs in the LMB
and PMEM namespaces are thus necessarily attachable at plug time.
Pass _abort to
From: Greg Kurz
A guest with enough RAM, eg. 128G, is likely to detect savevm downtime
and to complain about stalled CPUs. This happens because we re-read
the timebase just before migrating it and we thus don't account for
all the time between VM stop and pre-save.
A very similar situation was
From: Giuseppe Musacchio
Make the implementation match the lxvwsx one.
The code is now shorter smaller and potentially faster as the
translation will use the host SIMD capabilities if available.
No functional change.
Signed-off-by: Giuseppe Musacchio
Message-Id:
Reviewed-by: Richard
From: Greg Kurz
We currently detect that a PHB index is already in use at plug time.
But this can be decteted at pre-plug in order to error out earlier.
This allows to pass _abort to spapr_drc_attach() and to end
up with a plug handler that doesn't need to report errors anymore.
Signed-off-by:
From: Chen Qun
When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning:
target/ppc/mmu_helper.c: In function ‘dump_mmu’:
target/ppc/mmu_helper.c:1351:12: warning: this statement may fall through
[-Wimplicit-fallthrough=]
1351 | if (ppc64_v3_radix(env_archcpu(env)))
From: Giuseppe Musacchio
According to the PowerISA v3.1 reference, Table 68 "Actions for xscmpudp
- Part 1: Compare Unordered", whenever one of the two operands is a NaN
the SO bit is set while the other three bits are cleared.
Apply the same change to xscmpuqp.
The respective ordered
The following changes since commit 17584289af1aaa72c932e7e47c25d583b329dc45:
Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-6.0-pull-request'
into staging (2020-12-12 18:33:46 +)
are available in the Git repository at:
https://gitlab.com/dgibson/qemu.git
From: Chen Qun
When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning:
hw/ppc/ppc.c: In function ‘ppc6xx_set_irq’:
hw/ppc/ppc.c:118:16: warning: this statement may fall through
[-Wimplicit-fallthrough=]
118 | if (level) {
|^
From: Greg Kurz
There can be only one TPM proxy at a time. This is currently
checked at plug time. But this can be detected at pre-plug in
order to error out earlier.
This allows to get rid of error handling in the plug handler.
Signed-off-by: Greg Kurz
Message-Id:
From: Greg Kurz
Never used from the start.
Signed-off-by: Greg Kurz
Message-Id: <20201120174646.619395-6-gr...@kaod.org>
Reviewed-by: Cédric Le Goater
Signed-off-by: David Gibson
---
hw/intc/xics_kvm.c | 2 +-
hw/ppc/spapr_irq.c | 2 +-
include/hw/ppc/xics_spapr.h | 2 +-
From: Greg Kurz
The PHB acts as the hotplug handler for PCI devices. It does some
sanity checks on DR enablement, PCI bridge chassis numbers and
multifunction. These checks are currently performed at plug time,
but they would best sit in a pre-plug handler in order to error
out as early as
From: Greg Kurz
The sPAPR XIVE device is created by the machine in spapr_irq_init().
The latter overrides any value provided by the user with -global for
the "nr-irqs" and "nr-ends" properties with strictly positive values.
It seems reasonable to assume these properties should never be 0,
which
From: Giuseppe Musacchio
Since we always perform a comparison between the two operands avoid
checking for NaN unless the result states they're unordered.
Suggested-by: Richard Henderson
Signed-off-by: Giuseppe Musacchio
Reviewed-by: Richard Henderson
Message-Id:
From: Greg Kurz
Read documentation in "qapi/error.h" and changelog of commit
e3fe3988d785 ("error: Document Error API usage rules") for
rationale.
Signed-off-by: Greg Kurz
Message-Id: <20201120234208.683521-7-gr...@kaod.org>
Signed-off-by: David Gibson
---
hw/ppc/spapr.c | 40
** Changed in: qemu
Status: Incomplete => Invalid
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https://bugs.launchpad.net/bugs/1892581
Title:
QEMU 5.1 no longer says anything about inaccessible devices
Status in QEMU:
I no longer need this (it's no longer an issue for me), feel free to
reopen if this issue affects you.
** Changed in: qemu
Status: New => Incomplete
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Kindly ping!
Hi all,
It's a bug, though it's trivial.
Could you review it and add your queues or add trivial queues?
Thanks,
Chen Qun
> -Original Message-
> From: Chenqun (kuhn)
> Sent: Friday, October 23, 2020 2:12 PM
> To: qemu-devel@nongnu.org; qemu-triv...@nongnu.org
> Cc:
Hi, Philippe,
On Mon, Dec 14, 2020 at 7:09 AM Philippe Mathieu-Daudé wrote:
>
> On 12/13/20 11:17 PM, Philippe Mathieu-Daudé wrote:
> > On 12/11/20 12:32 PM, Philippe Mathieu-Daudé wrote:
> >> On 12/11/20 3:46 AM, Huacai Chen wrote:
> >>> Hi, Rechard and Peter,
> >>>
> >>> On Wed, Dec 2, 2020 at
> -Original Message-
> From: Laurent Vivier [mailto:laur...@vivier.eu]
> Sent: Monday, December 14, 2020 1:44 AM
> To: Chenqun (kuhn) ; qemu-devel@nongnu.org;
> qemu-triv...@nongnu.org
> Cc: lviv...@redhat.com; Zhanghailiang ;
> Viktor Prutyanov ; Li Qiang
> ; Pannengyuan ; ganqixin
> ;
On 2020/12/11 23:25, Peter Xu wrote:
> On Fri, Dec 11, 2020 at 09:13:10AM +0800, zhukeqian wrote:
>>
>> On 2020/12/10 22:50, Peter Xu wrote:
>>> On Thu, Dec 10, 2020 at 10:53:23AM +0800, zhukeqian wrote:
On 2020/12/10 10:08, Peter Xu wrote:
> Keqian,
>
> On Thu, Dec
Kindly ping!
Hi Michael,
It's a bug, though it's trivial.
Could you review it and add your queues or add trivial queues?
Thanks,
Chen Qun
> -Original Message-
> From: Chenqun (kuhn)
> Sent: Friday, October 23, 2020 2:12 PM
> To: qemu-devel@nongnu.org; qemu-triv...@nongnu.org
> Cc:
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
linux-user/elfload.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 8f943f93ba7..0836e72b5ac 100644
--- a/linux-user/elfload.c
+++
ISA features are usually denoted in read-only bits from
CPU registers. Add the GET_FEATURE_REG_EQU() macro which
checks if a CPU register has bits set to a specific value.
Use the macro to check the 'Architecture Revision' level
of the Config0 register, which is '2' when the Release 6
ISA is
We want to add macros similar to GET_FEATURE().
As this one use the 'insn_flags' field, rename it
GET_FEATURE_INSN().
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
linux-user/elfload.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
ISA features are usually denoted in read-only bits from
CPU registers. Add the GET_FEATURE_REG_SET() macro which
checks if a CPU register has bits set.
Use the macro to check for MSA (which sets the MSAP bit of
the Config3 register when the ASE implementation is present).
Reviewed-by: Richard
As we are going to add more macros, keep the function body clear.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
linux-user/elfload.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index
Series now fully reviewed.
Since v5:
- Dropped MAINTAINERS patch =)
Since v4:
- Fixed yet another typo...
Since v3:
- Add CP0C0_AR_LENGTH definition (Richard)
- Fixed 3E -> 3A, Longsoon -> Loongson typos (Huacai)
Since v2:
- Use extract32() in GET_FEATURE_REG_EQU (rth)
Introduce the
ISA features are usually denoted in read-only bits from
CPU registers. Add the GET_FEATURE_REG_SET() macro which
checks if a CPU register has bits set.
Use the macro to check for MSA (which sets the MSAP bit of
the Config3 register when the ASE implementation is present).
Reviewed-by: Richard
Userland ELF binaries using Loongson SIMD instructions have the
HWCAP_LOONGSON_MMI bit set [1].
Binaries compiled for Loongson 3A [2] have the HWCAP_LOONGSON_EXT
bit set for the LQ / SQ instructions.
[1] commit 8e2d5831e4b ("target/mips: Legalize Loongson insn flags")
[2] commit af868995e1b
We want to add macros similar to GET_FEATURE().
As this one use the 'insn_flags' field, rename it
GET_FEATURE_INSN().
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
linux-user/elfload.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
On Mon, Dec 14, 2020 at 1:29 AM Philippe Mathieu-Daudé wrote:
>
> From: Huacai Chen
>
> Use @kernel.org address as the main communications end point. Update the
> corresponding M-entries and .mailmap (for git shortlog translation).
>
> Signed-off-by: Huacai Chen
> Tested-by: Philippe
As we are going to add more macros, keep the function body clear.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
linux-user/elfload.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index
From: Huacai Chen
Use @kernel.org address as the main communications end point. Update the
corresponding M-entries and .mailmap (for git shortlog translation).
Signed-off-by: Huacai Chen
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
Series now fully reviewed.
Since v4:
- Fixed yet another typo...
Since v3:
- Add CP0C0_AR_LENGTH definition (Richard)
- Fixed 3E -> 3A, Longsoon -> Loongson typos (Huacai)
Since v2:
- Use extract32() in GET_FEATURE_REG_EQU (rth)
Introduce the GET_FEATURE_REG_SET() and GET_FEATURE_REG_EQU()
This is the QEMU equivalent of this Linux commit (but 7 years later):
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f7025a43a9da2
The MTD subsystem has its own small museum of ancient NANDs
in a form of the CONFIG_MTD_NAND_MUSEUM_IDS configuration option.
On 12/14/20 1:11 AM, Philippe Mathieu-Daudé wrote:
> On 10/19/20 6:05 PM, Peter Maydell wrote:
>> On Tue, 15 Sep 2020 at 18:52, Philippe Mathieu-Daudé wrote:
>>>
>>> This is the QEMU equivalent of this Linux commit (but 7 years later):
>>>
On 12/7/20 11:43 PM, Philippe Mathieu-Daudé wrote:
> Userland ELF binaries using Loongson SIMD instructions have the
> HWCAP_LOONGSON_MMI bit set [1].
> Binaries compiled for LLoongson 3A [2] have the HWCAP_LOONGSON_EXT
Bah... Yet another typo "LLoongson" -> "Loongson".
> bit set for the LQ / SQ
On 10/19/20 6:05 PM, Peter Maydell wrote:
> On Tue, 15 Sep 2020 at 18:52, Philippe Mathieu-Daudé wrote:
>>
>> This is the QEMU equivalent of this Linux commit (but 7 years later):
>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f7025a43a9da2
>>
>> The MTD
On 11/6/20 5:21 AM, Huacai Chen wrote:
> Preparing to add Loongson-3 machine support, add Loongson-3's LEFI (a
> UEFI-like interface for BIOS-Kernel boot parameters) helpers first.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Huacai Chen
> Co-developed-by: Jiaxun Yang
>
On 12/13/20 11:17 PM, Philippe Mathieu-Daudé wrote:
> On 12/11/20 12:32 PM, Philippe Mathieu-Daudé wrote:
>> On 12/11/20 3:46 AM, Huacai Chen wrote:
>>> Hi, Rechard and Peter,
>>>
>>> On Wed, Dec 2, 2020 at 5:32 PM Philippe Mathieu-Daudé
>>> wrote:
On 12/2/20 2:14 AM, Huacai Chen
Le 13/12/2020 à 20:04, Peter Maydell a écrit :
> On Sun, 13 Dec 2020 at 17:22, Laurent Vivier wrote:
>>
>> Le 12/10/2020 à 11:47, Thomas Huth a écrit :
>>> On 25/08/2020 22.27, Roman Bolshakov wrote:
QEMU build fails with cryptic messages if make is too old:
Makefile.ninja:2655:
On 7/28/20 4:31 PM, Marc-André Lureau wrote:
> We are having issues debugging and bisecting this issue that happen
> mostly on patchew. Let's make it abort where it failed to gather some
> new informations.
"good" news, this started to fail on Gitlab (centos7):
Running test test-char
Unexpected
On Sat, Dec 12, 2020 at 1:28 PM Diego Viola wrote:
>
> Hi,
>
> I'm experiencing a lot of choppiness in the video output when I pass
> through my USB webcam to the guest using qemu-xhci as follows:
>
> qemu-system-x86_64 -enable-kvm -hda arch-zoom.qcow2 -m 4G -vga virtio
> -device
Le 13/12/2020 à 20:01, Peter Maydell a écrit :
> On Sun, 13 Dec 2020 at 17:21, Laurent Vivier wrote:
>>
>> Le 16/10/2020 à 18:52, Philippe Mathieu-Daudé a écrit :
>>> Cc'ing qemu-trivial@ since this patch is reviewed.
>>>
>>> On 10/15/20 8:12 PM, Philippe Mathieu-Daudé wrote:
ping^2...
On 12/11/20 12:32 PM, Philippe Mathieu-Daudé wrote:
> On 12/11/20 3:46 AM, Huacai Chen wrote:
>> Hi, Rechard and Peter,
>>
>> On Wed, Dec 2, 2020 at 5:32 PM Philippe Mathieu-Daudé
>> wrote:
>>>
>>> On 12/2/20 2:14 AM, Huacai Chen wrote:
Hi, Phillippe,
On Tue, Nov 24, 2020 at 6:25
Patchew URL:
https://patchew.org/QEMU/20201213213016.457350-1-fontaine.fabr...@gmail.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20201213213016.457350-1-fontaine.fabr...@gmail.com
Subject: [PATCH v2]
USBDEVFS_GET_SPEED is used since version 5.2.0 and
https://gitlab.com/qemu-project/qemu/-/commit/202d69a715a4b1824dcd7ec1683d027ed2bae6d3
resulting in the following build failure with kernel < 5.0:
../hw/usb/host-libusb.c: In function 'usb_host_open':
../hw/usb/host-libusb.c:953:32: error:
Include the 'ccache' package to speed up compilation.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/docker/dockerfiles/debian10.docker | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/docker/dockerfiles/debian10.docker
b/tests/docker/dockerfiles/debian10.docker
index
Patchew URL:
https://patchew.org/QEMU/20201213210455.299668-1-fontaine.fabr...@gmail.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20201213210455.299668-1-fontaine.fabr...@gmail.com
Subject: [PATCH]
USBDEVFS_GET_SPEED is used since version 5.2.0 and
https://gitlab.com/qemu-project/qemu/-/commit/202d69a715a4b1824dcd7ec1683d027ed2bae6d3
resulting in the following build failure with kernel < 5.0:
../hw/usb/host-libusb.c: In function 'usb_host_open':
../hw/usb/host-libusb.c:953:32: error:
Sort .inc files along with the extension including them.
Signed-off-by: Philippe Mathieu-Daudé
---
scripts/git.orderfile | 3 +++
1 file changed, 3 insertions(+)
diff --git a/scripts/git.orderfile b/scripts/git.orderfile
index 3736c1d6aff..b32203b7106 100644
--- a/scripts/git.orderfile
+++
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20201206233949.3783184-4-f4...@amsat.org>
---
target/mips/fpu_helper.c | 4
1 file changed, 4 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 020b768e87b..956e3417d0f
Nothing TCG specific there, move to common cpu code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20201206233949.3783184-16-f4...@amsat.org>
---
target/mips/internal.h | 4 -
target/mips/cpu.c | 243
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20201206233949.3783184-10-f4...@amsat.org>
---
target/mips/cpu.c| 33 +
target/mips/helper.c | 33 -
2 files changed, 33 insertions(+), 33
On 04/12/2020 23:31, Brijesh Singh wrote:
The SEV FW >= 0.23 added a new command that can be used to query the
attestation report containing the SHA-256 digest of the guest memory
and VMSA encrypted with the LAUNCH_UPDATE and sign it with the PEK.
Note, we already have a command
Do not initialize MT-related config registers if the MT ASE
is not present. As some functions access the 'mvp' structure,
we still zero-allocate it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20201204222622.2743175-4-f4...@amsat.org>
---
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