From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-17-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 4
target/arm/tcg/translate-a64.c | 43
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-36-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 10 +++
target/arm/tcg/translate-a64.c | 144
From: Richard Henderson
These are the last instructions within handle_simd_3same_pair
so remove it.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-34-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h|
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-13-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 11
target/arm/tcg/translate-a64.c | 97
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-18-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 13 +
target/arm/tcg/translate-a64.c | 426
From: Richard Henderson
All of these insns have "if sz == '1' then UNDEFINED" in their pseudocode.
Fixes a RISU miscompare for invalid insn 0x5ef0c87a.
Fixes: 5c36d89567c ("arm/translate-a64: add all FP16 ops in
simd_scalar_pairwise")
Signed-off-by: Richard Henderson
Reviewed-by: Peter
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-15-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 8 ++
target/arm/tcg/translate-a64.c | 132
From: Alexandra Diupina
Add xlnx_dpdma_read_descriptor() and
xlnx_dpdma_write_descriptor() functions.
xlnx_dpdma_read_descriptor() combines reading a
descriptor from desc_addr by calling dma_memory_read()
and swapping the desc fields from guest memory order
to host memory order.
From: Dorjoy Chowdhury
The value of the mp-affinity property being set in npcm7xx_realize is
always the same as the default value it would have when arm_cpu_realizefn
is called if the property is not set here. So there is no need to set
the property value in npcm7xx_realize function.
From: Richard Henderson
These are the last instructions within disas_simd_three_reg_same_fp16,
so remove it.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-30-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-11-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 11 +
target/arm/tcg/translate-a64.c | 78
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-21-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h| 4 +
target/arm/tcg/a64.decode | 17
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-29-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h| 4 ++
target/arm/tcg/a64.decode | 12 +
From: Richard Henderson
The decode of FMOV (vector, immediate, half-precision) vs
invalid cases of MOVI are incorrect.
Fixes RISU mismatch for invalid insn 0x2f01fd31.
Fixes: 70b4e6a4457 ("arm/translate-a64: add FP16 FMOV to simd_mod_imm")
Signed-off-by: Richard Henderson
Reviewed-by: Peter
From: Philippe Mathieu-Daudé
Check the function index is in range and use an unsigned
variable to avoid the following warning with GCC 13.2.0:
[666/5358] Compiling C object libcommon.fa.p/hw_input_tsc2005.c.o
hw/input/tsc2005.c: In function 'tsc2005_timer_tick':
hw/input/tsc2005.c:416:26:
From: Richard Henderson
Load and zero-extend float16 into a TCGv_i32 before
all scalar operations.
Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
Message-id: 20240524232121.284515-22-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/translate-vfp.c |
From: Inès Varhol
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
Message-id: 20240505141613.387508-1-ines.var...@telecom-paris.fr
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/char/stm32l4x5_usart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Richard Henderson
Split some routines out of translate-a64.c and translate-sve.c
that are used by both.
Reviewed-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-9-richard.hender...@linaro.org
Signed-off-by: Peter
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-20-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/helper-a64.h| 4 +
target/arm/tcg/translate.h | 5 +
target/arm/tcg/a64.decode
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-35-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/translate-neon.c | 78 ++---
1 file changed, 4 insertions(+), 74
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-23-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h| 6
target/arm/tcg/translate.h | 30 +++
From: Richard Henderson
Convert all forms (scalar, vector, scalar indexed, vector indexed),
which allows us to remove switch table entries elsewhere.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-19-richard.hender...@linaro.org
Signed-off-by:
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-25-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h| 2 +
target/arm/tcg/a64.decode | 22 +++
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-32-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h| 5 ++
target/arm/tcg/translate.h | 3 +
target/arm/tcg/a64.decode
From: Tanmay Patil
Some of the source files for older devices use hardcoded tabs
instead of our current coding standard's required spaces.
Fix these in the following files:
- hw/arm/boot.c
- hw/char/omap_uart.c
- hw/gpio/zaurus.c
- hw/input/tsc2005.c
This commit
From: Richard Henderson
This includes AND, ORR, EOR, BIC, ORN, BSF, BIT, BIF.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-37-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 10 +
From: Richard Henderson
Fixes RISU mismatch for "fcvtzs h31, h0, #14".
Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
Message-id: 20240524232121.284515-5-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/translate-a64.c | 3 +++
1 file changed, 3
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-33-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h | 2 --
target/arm/tcg/neon_helper.c| 5 -
in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20240528
for you to fetch changes up to f240df3c31b40e4cf1af1f156a88efc1a1df406c:
target/arm: Convert disas_simd_3same_logic to decodetree (2024-05-28 14:29:01
+0100
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-27-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h| 1 +
target/arm/tcg/a64.decode | 6
From: Richard Henderson
This fixes a bug in that neither PLI nor PLDW are present in ARMv6T2,
but are introduced with ARMv7 and ARMv7MP respectively.
For clarity, do not use NOP for PLD.
Note that there is no PLDW (literal). Architecturally in the
T1 encoding of "PLD (literal)" bit 5 is "(0)",
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-14-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 5
target/arm/tcg/translate-a64.c | 50
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-26-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h| 5 +
target/arm/tcg/a64.decode | 30 ++
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-12-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 6
target/arm/tcg/translate-a64.c | 54
From: Rayhan Faizel
None of the RPi boards have ADC on-board. In real life, an external ADC chip
is required to operate on analog signals.
Signed-off-by: Rayhan Faizel
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 20240512085716.222326-1-rayhan.fai...@gmail.com
Signed-off-by: Peter Maydell
From: Richard Henderson
This is the last instruction within disas_fp_2src,
so remove that and its subroutines.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-24-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-16-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/tcg/a64.decode | 10
target/arm/tcg/translate-a64.c | 43
From: Richard Henderson
These are the last instructions within handle_3same_float
and disas_simd_scalar_three_reg_same_fp16 so remove them.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20240524232121.284515-28-richard.hender...@linaro.org
Signed-off-by: Peter
On Mon, 20 May 2024 at 23:24, Cord Amfmgm wrote:
> On Mon, May 20, 2024 at 12:05 PM Peter Maydell
> wrote:
>> For the "zero length buffer" case, do you have a more detailed
>> pointer to the bit of the spec that says that "cbp = be + 1" is a
>> valid way to specify a zero length buffer? Table
The following changes since commit ad10b4badc1dd5b28305f9b9f1168cf0aa3ae946:
Merge tag 'pull-error-2024-05-27' of https://repo.or.cz/qemu/armbru into
staging (2024-05-27 06:40:42 -0700)
are available in the Git repository at:
https://gitlab.com/vsementsov/qemu.git
We want to have similar QMP objects in different tests. Reworking these
objects to make common parts by calling some helper functions doesn't
seem good. It's a lot more comfortable to see the whole QAPI request in
one place.
So, let's increase the limit, to unblock further commit
"iotests: add
On Tue, May 28, 2024 at 12:35 PM Thomas Huth wrote:
> > diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig
> > index 84bc7fbe36cd..c4a6ea5a687f 100644
> > --- a/hw/usb/Kconfig
> > +++ b/hw/usb/Kconfig
> > @@ -17,7 +17,6 @@ config USB_OHCI_SYSBUS
> >
> > config USB_OHCI_PCI
> > bool
> > -
Nicholas Piggin writes:
> There is no need to use /dev/shm for file-backed memory devices, and
> it is too small to be usable in gitlab CI. Switch to using a regular
> file in /tmp/ which will usually have more space available.
>
> Signed-off-by: Nicholas Piggin
> ---
> Am I missing something?
On Tue, May 28, 2024 at 08:07:57AM GMT, Chao Du wrote:
> This patch implements insert/remove software breakpoint process.
>
> For RISC-V, GDB treats single-step similarly to breakpoint: add a
> breakpoint at the next step address, then continue. So this also
> works for single-step debugging.
>
> -Original Message-
> From: Peter Xu
> Sent: Tuesday, May 28, 2024 4:51 AM
> To: Liu, Yuan1
> Cc: faro...@suse.de; qemu-devel@nongnu.org; Zou, Nanhai
>
> Subject: Re: [PATCH v6 2/7] migration/multifd: put IOV initialization into
> compression method
>
> On Mon, May 06, 2024 at
On Tue, May 28, 2024 at 02:27:57PM +1000, Nicholas Piggin wrote:
> There is no need to use /dev/shm for file-backed memory devices, and
> it is too small to be usable in gitlab CI. Switch to using a regular
> file in /tmp/ which will usually have more space available.
>
> Signed-off-by: Nicholas
On 5/28/24 12:35, Thomas Huth wrote:
On 28/05/2024 11.54, Gerd Hoffmann wrote:
The xhci host adapter is the much better choice.
Signed-off-by: Gerd Hoffmann
---
hw/usb/hcd-ohci-pci.c | 1 +
hw/usb/Kconfig | 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git
On Sat, 25 May 2024 at 00:25, Richard Henderson
wrote:
>
> For all, rm == 15 is invalid.
> Prior to v8, thumb with rm == 13 is invalid.
> For PLDW, rn == 15 is invalid.
> Fixes a RISU mismatch for the HINTSPACE pattern in t32.risu
> compared to a neoverse-n1 host.
These are UNPREDICTABLE cases,
On Sat, 25 May 2024 at 00:23, Richard Henderson
wrote:
>
> This fixes a bug in that neither PLI nor PLDW are present in ARMv6T2,
> but are introduced with ARMv7 and ARMv7MP respectively.
> For clarity, do not use NOP for PLD.
>
> Note that there is no PLDW (literal) -- bit 5 of the first word
>
On Tue, May 28, 2024 at 02:48:42PM +0800, Zhao Liu wrote:
> Hi Stefan,
>
> On Mon, May 27, 2024 at 03:59:44PM -0400, Stefan Hajnoczi wrote:
> > Date: Mon, 27 May 2024 15:59:44 -0400
> > From: Stefan Hajnoczi
> > Subject: Re: [RFC 0/6] scripts: Rewrite simpletrace printer in Rust
> >
> > On Mon,
- According to RISC-V crypto spec, Zvkb extension is a proper subset of the
Zvbb extension.
- Reference:
https://github.com/riscv/riscv-crypto/blob/1769c2609bf4535632e0c0fd715778f212bb272e/doc/vector/riscv-crypto-vector-zvkb.adoc?plain=1#L10
Signed-off-by: Jerry Zhang Jian
---
在 2024/5/28 上午9:07, maobibo 写道:
Hi Philippe,
Thanks for reviewing my patch.
I reply inline.
On 2024/5/27 下午6:37, Philippe Mathieu-Daudé wrote:
Hi Bibo,
On 27/5/24 10:35, Bibo Mao wrote:
Loongson Binary Translation (LBT) is used to accelerate binary
translation, which contains 4 scratch
Philippe Mathieu-Daudé writes:
> Hi Alex,
>
> On 21/5/24 14:53, Alex Bennée wrote:
>> There are a few more bits referencing centos8 in the tree which needed
>> cleaning up. After this we can remove the dedicated runner from the
>> gitlab registration. If we want to keep a dedicated Centos runner
On 30.04.24 12:13, Vladimir Sementsov-Ogievskiy wrote:
We want to have similar QMP objects in different tests. Reworking these
objects to make common parts by calling some helper functions doesn't
seem good. It's a lot more comfortable to see the whole QAPI request in
one place.
So, let's
On Sat, 25 May 2024 at 00:23, Richard Henderson
wrote:
>
> Fixes RISU mismatch for "fcvtzs h31, h0, #14".
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/tcg/translate-a64.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/target/arm/tcg/translate-a64.c
On 28/5/24 12:38, Stefano Garzarella wrote:
`memory-backend-shm` can be used with vhost-user devices, so let's
add a new test case for it.
Acked-by: Thomas Huth
Acked-by: Stefan Hajnoczi
Reviewed-by: David Hildenbrand
Signed-off-by: Stefano Garzarella
---
tests/qtest/vhost-user-test.c |
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On Sat, 25 May 2024 at 00:30, Richard Henderson
wrote:
>
> The decode of FMOV (vector, immediate, half-precision) vs
> invalid cases of MOVI are incorrect.
>
> Fixes RISU mismatch for invalid insn 0x2f01fd31.
>
> Fixes: 70b4e6a4457 ("arm/translate-a64: add FP16 FMOV to simd_mod_imm")
>
On Sat, 25 May 2024 at 00:22, Richard Henderson
wrote:
>
> All of these insns have "if sz == '1' then UNDEFINED" in their pseudocode.
> Fixes a RISU miscompare for invalid insn 0x5ef0c87a.
>
> Fixes: 5c36d89567c ("arm/translate-a64: add all FP16 ops in
> simd_scalar_pairwise")
> Signed-off-by:
Sorry, I had the bad mail client setting. Please ignore the previous email,
and I will resubmit the patch.
--
Jerry
Jerry ZJ 於 2024年5月28日 週二 下午8:12寫道：
>
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On Sat, 25 May 2024 at 00:23, Richard Henderson
wrote:
>
> Load and zero-extend float16 into a TCGv_i32 before
> all scalar operations.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
Based-on:
https://lore.kernel.org/qemu-devel/20240429115157.2260885-1-vsement...@yandex-team.ru/
Discussion for v1:
https://lore.kernel.org/qemu-devel/20240308155158.830258-1-f.eb...@proxmox.com/
Changes in v2:
* Use 'size' type in QAPI.
* Remove option in cbw_parse_options(), i.e. before
In the context of backup fleecing, discarding the source will not work
when the fleecing image has a larger granularity than the one used for
block-copy operations (can happen if the backup target has smaller
cluster size), because cbw_co_pdiscard_snapshot() will align down the
discard requests
In the context of backup fleecing, discarding the source will not work
when the fleecing image has a larger granularity than the one used for
block-copy operations (can happen if the backup target has smaller
cluster size), because cbw_co_pdiscard_snapshot() will align down the
discard requests
Akihiko Odaki writes:
> -fsanitize=undefined complains if function pointers are casted. It
> also prevents enabling teh strict mode of CFI which is currently
Typo: the
> disabled with -fsanitize-cfi-icall-generalize-pointers.
The above describes the problem the patch solves. Good! Two
On 28/05/2024 11.54, Gerd Hoffmann wrote:
Signed-off-by: Gerd Hoffmann
---
hw/usb/Kconfig | 10 ++
hw/usb/meson.build | 4 ++--
2 files changed, 12 insertions(+), 2 deletions(-)
Reviewed-by: Thomas Huth
`memory-backend-memfd` is available only on Linux while the new
`memory-backend-shm` can be used on any POSIX-compliant operating
system. Let's use it so we can run the test in multiple environments.
Since we are here, let`s remove `share=on` which is the default for shm
(and also for memfd).
`memory-backend-shm` can be used with vhost-user devices, so let's
add a new test case for it.
Acked-by: Thomas Huth
Acked-by: Stefan Hajnoczi
Reviewed-by: David Hildenbrand
Signed-off-by: Stefano Garzarella
---
tests/qtest/vhost-user-test.c | 23 +++
1 file changed, 23
shm_open() creates and opens a new POSIX shared memory object.
A POSIX shared memory object allows creating memory backend with an
associated file descriptor that can be shared with external processes
(e.g. vhost-user).
The new `memory-backend-shm` can be used as an alternative when
Let's make the code more portable by adding defines from
block/file-posix.c to support O_DIRECT in other systems (e.g. macOS).
vhost-user-server.c is a dependency, let's enable it for any POSIX
system.
Acked-by: Stefan Hajnoczi
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe
libvhost-user will panic when receiving VHOST_USER_GET_INFLIGHT_FD
message if MFD_ALLOW_SEALING is not defined, since it's not able
to create a memfd.
VHOST_USER_GET_INFLIGHT_FD is used only if
VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD is negotiated. So, let's mask
that feature if the backend is not
The vhost-user protocol is not really Linux-specific so let's enable
libvhost-user for any POSIX system.
Compiling it on macOS and FreeBSD some problems came up:
- avoid to include linux/vhost.h which is available only on Linux
(vhost_types.h contains many of the things we need)
- macOS doesn't
In vu_message_write() we use sendmsg() to send the message header,
then a write() to send the payload.
If sendmsg() fails we should avoid sending the payload, since we
were unable to send the header.
Discovered before fixing the issue with the previous patch, where
sendmsg() failed on macOS due
Let's replace the calls to le*toh() and htole*() with qemu/bswap.h
helpers to make the code more portable.
Suggested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Acked-by: Stefan Hajnoczi
Reviewed-by: David Hildenbrand
Signed-off-by:
In vhost-user-server we set all fd received from the other peer
in non-blocking mode. For some of them (e.g. memfd, shm_open, etc.)
it's not really needed, because we don't use these fd with blocking
operations, but only to map memory.
In addition, in some systems this operation can fail (e.g. in
v1: https://patchew.org/QEMU/20240228114759.44758-1-sgarz...@redhat.com/
v2: https://patchew.org/QEMU/20240326133936.125332-1-sgarz...@redhat.com/
v3: https://patchew.org/QEMU/20240404122330.92710-1-sgarz...@redhat.com/
v4: https://patchew.org/QEMU/20240508074457.12367-1-sgarz...@redhat.com/
v5:
The vhost-user protocol is not really Linux-specific so let's enable
vhost-user frontends for any POSIX system.
In vhost_net.c we use VHOST_FILE_UNBIND which is defined in a Linux
specific header, let's define it for other systems as well.
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe
On some OS (e.g. macOS) sendmsg() returns -1 (errno EINVAL) if
the `struct msghdr` has the field `msg_controllen` set to 0, but
`msg_control` is not NULL.
Reviewed-by: Eric Blake
Reviewed-by: David Hildenbrand
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Acked-by:
On macOS passing `-s /tmp/vhost.socket` parameter to the vhost-user-blk
application, the bind was done on `/tmp/vhost.socke` pathname,
missing the last character.
This sounds like one of the portability problems described in the
unix(7) manpage:
Pathname sockets
When binding a socket
On 28/05/2024 11.54, Gerd Hoffmann wrote:
The xhci host adapter is the much better choice.
Signed-off-by: Gerd Hoffmann
---
hw/usb/hcd-ohci-pci.c | 1 +
hw/usb/Kconfig| 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/usb/hcd-ohci-pci.c b/hw/usb/hcd-ohci-pci.c
Issue #2294: Machine microvm doesn't run under Xen accel for
qemu-system-x86_64.
Solution: microvm is now not build if only Xen is available.
Signed-off-by: Will Gyda
---
configs/devices/i386-softmmu/default.mak | 2 +-
hw/i386/Kconfig | 2 ++
2 files changed, 3
On 5/28/24 12:02, Jamin Lin wrote:
Hi Cedric,
-Original Message-
From: Cédric Le Goater
Sent: Tuesday, May 28, 2024 5:56 PM
To: Jamin Lin ; Peter Maydell
; Andrew Jeffery ;
Joel Stanley ; Alistair Francis ; Cleber
Rosa ; Philippe Mathieu-Daudé ;
Wainer dos Santos Moschetta ; Beraldo
在 2024/5/24 23:15, Shiyang Ruan 写道:
在 2024/5/22 14:45, Dan Williams 写道:
Shiyang Ruan wrote:
[..]
My expectation is MF_ACTION_REQUIRED is not appropriate for CXL event
reported errors since action is only required for direct consumption
events and those need not be reported through the
Hi Cedric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Tuesday, May 28, 2024 5:56 PM
> To: Jamin Lin ; Peter Maydell
> ; Andrew Jeffery ;
> Joel Stanley ; Alistair Francis ;
> Cleber
> Rosa ; Philippe Mathieu-Daudé ;
> Wainer dos Santos Moschetta ; Beraldo Leal
> ; open
Hi,
> > virtio-snd
> > -M: Gerd Hoffmann
> > -R: Manos Pitsidianakis
> > +M: Manos Pitsidianakis
> > +R: Matias Ezequiel Vara Larsen
> > S: Supported
> > F: hw/audio/virtio-snd.c
> > F: hw/audio/virtio-snd-pci.c
>
> While extra reviewers are always helpful, someone like Volker would
>
Jamin,
I think you should add your self as a Reviewer to the ASPEED BMCs
machine in the MAINTAINERS files. Would you agree ?
Thanks,
C.
On 5/27/24 10:02, Jamin Lin wrote:
Changes from v1:
The patch series supports WDT, SDMC, SMC, SCU, SLI and INTC for AST2700 SoC.
Changes from v2:
-
The hub supports only USB 1.1. When running out of usb ports it is in
almost all cases the much better choice to add another usb host adapter
(or increase the number of root ports when using xhci) instead of using
the usb hub.
Signed-off-by: Gerd Hoffmann
---
hw/usb/dev-hub.c | 1 +
Put some infrastructure in place to allow tagging objects (including
devices) as deprected. Use it to mark the ohci pci host adapter and
the usb hub as deprecated.
Gerd Hoffmann (4):
qom: allow to mark objects (including devices) as deprecated.
usb: add config options for the hub and hid
Hi Cedric,
> From: Cédric Le Goater
> [ ... ]
>
> >> I don't think this is necessary to do so now. Possibly, increase the
> >> version number in the vmstate when resending a v5.
> >>
> > If I understand your request, do you mean to change as following in this
> patch?
> >
> > static const
Add deprecation_note field (string) to ObjectClass.
Add deprecated bool to ObjectTypeInfo, report in 'qom-list-types'.
Print the note when listing devices via '-device help'.
Signed-off-by: Gerd Hoffmann
---
include/qom/object.h | 1 +
qom/qom-qmp-cmds.c| 4
system/qdev-monitor.c | 5
The xhci host adapter is the much better choice.
Signed-off-by: Gerd Hoffmann
---
hw/usb/hcd-ohci-pci.c | 1 +
hw/usb/Kconfig| 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/usb/hcd-ohci-pci.c b/hw/usb/hcd-ohci-pci.c
index 33ed9b6f5a52..88de657def71 100644
---
Signed-off-by: Gerd Hoffmann
---
hw/usb/Kconfig | 10 ++
hw/usb/meson.build | 4 ++--
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig
index f569ed7eeaa1..84bc7fbe36cd 100644
--- a/hw/usb/Kconfig
+++ b/hw/usb/Kconfig
@@ -65,6 +65,16 @@
[ ... ]
I don't think this is necessary to do so now. Possibly, increase the version
number in the vmstate when resending a v5.
If I understand your request, do you mean to change as following in this patch?
static const VMStateDescription vmstate_aspeed_sdmc = {
.name = "aspeed.sdmc",
Hi Cedric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Tuesday, May 28, 2024 2:34 PM
> To: Jamin Lin ; Philippe Mathieu-Daudé
> ; Peter Maydell ; Andrew
> Jeffery ; Joel Stanley ;
> Alistair Francis ; Cleber Rosa ;
> Wainer dos Santos Moschetta ; Beraldo Leal
> ; open
On Fri, 24 May 2024 13:00:14 -0700
Zide Chen wrote:
> Currently, if running "-overcommit cpu-pm=on" on hosts that don't
> have MWAIT support, the MWAIT/MONITOR feature is advertised to the
> guest and executing MWAIT/MONITOR on the guest triggers #UD.
this is missing proper description how do
On 5/26/24 17:56, Nicholas Piggin wrote:
Add helpers for TCG code to determine if there are SMT siblings
sharing per-core and per-lpar registers. This simplifies the
callers and makes SMT register topology simpler to modify with
later changes.
Signed-off-by: Nicholas Piggin
---
> > +fn read_trace_records(
> > +events: ,
> > +fobj: ,
> > +analyzer: Formatter,
> > +read_header: bool,
> > +) -> Result>
> > +{
> > +/* backtrace::Backtrace needs this env variable. */
> > +env::set_var("RUST_BACKTRACE", "1");
> > +let bt = Backtrace::new();
> > +
Hi Gonglei,
On Tue, May 28, 2024 at 11:06 AM Gonglei (Arei) wrote:
>
> Hi Peter,
>
> > -Original Message-
> > From: Peter Xu [mailto:pet...@redhat.com]
> > Sent: Wednesday, May 22, 2024 6:15 AM
> > To: Yu Zhang
> > Cc: Michael Galaxy ; Jinpu Wang
> > ; Elmar Gerdes ;
> > zhengchuan ;
Hi Peter,
> -Original Message-
> From: Peter Xu [mailto:pet...@redhat.com]
> Sent: Wednesday, May 22, 2024 6:15 AM
> To: Yu Zhang
> Cc: Michael Galaxy ; Jinpu Wang
> ; Elmar Gerdes ;
> zhengchuan ; Gonglei (Arei)
> ; Daniel P. Berrangé ;
> Markus Armbruster ; Zhijian Li (Fujitsu)
> ;
On Tue, 28 May 2024 at 11:39, Gerd Hoffmann wrote:
>
> Remove myself from audio (both devices and backend) entries.
> Flip status to "Orphan" for entries which have nobody else listed.
> Signed-off-by: Gerd Hoffmann
> ---
> MAINTAINERS | 30 ++
> 1 file changed, 10
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