On Wed, Sep 09, 2020 at 04:53:02PM +0100, Peter Maydell wrote:
> On Wed, 9 Sep 2020 at 16:48, Andrew Jones wrote:
> > We either need a KVM cap or a new CPU feature probing interface to avoid
> > making userspace try features one at a time. It's too bad that VCPU_INIT
> &
On Wed, Sep 09, 2020 at 05:04:15PM +0100, Steven Price wrote:
> On 09/09/2020 16:25, Andrew Jones wrote:
> > On Fri, Sep 04, 2020 at 05:00:16PM +0100, Steven Price wrote:
> > > 2. Automatically promotes (normal host) memory given to the guest to be
> > > tag
On Wed, Sep 09, 2020 at 06:45:33PM -0700, Richard Henderson wrote:
> On 9/9/20 8:25 AM, Andrew Jones wrote:
> >> * Provide a KVM-specific method to extract the tags from guest memory.
> >>This might also have benefits in terms of providing an easy way to
> >>
On Fri, Sep 04, 2020 at 05:00:18PM +0100, Steven Price wrote:
> Add a new VCPU features 'KVM_ARM_VCPU_MTE' which enables memory tagging
> on a VCPU. When enabled on any VCPU in the virtual machine this causes
> all pages that are faulted into the VM to have the PG_mte_tagged flag
> set (and the
On Fri, Sep 04, 2020 at 05:00:16PM +0100, Steven Price wrote:
> Arm's Memory Tagging Extension (MTE) adds 4 bits of tag data to every 16
> bytes of memory in the system. This along with stashing a tag within the
> high bit of virtual addresses allows runtime checking of memory
> accesses.
>
>
On Wed, Sep 09, 2020 at 03:51:14PM +0800, Haibo Xu wrote:
> > > +
> > > +if (spe) {
> > > +assert(ARM_CPU(cpu)->has_spe == ON_OFF_AUTO_ON);
> > > +if (kvm_irqchip_in_kernel()) {
> > > +kvm_arm_spe_set_irq(cpu, PPI(VIRTUAL_SPE_IRQ));
>
576,16 @@ static void test_query_cpu_model_expansion_kvm(const
> void *data)
> } else {
> g_assert(vls == 0);
> }
> +
> +if (kvm_supports_spe) {
> +assert_set_feature(qts, "host", "spe", false);
> +assert_set_feature(qts, "host", "spe", true);
> +}
> } else {
> assert_has_not_feature(qts, "host", "aarch64");
> assert_has_not_feature(qts, "host", "pmu");
> assert_has_not_feature(qts, "host", "sve");
> +assert_has_not_feature(qts, "host", "spe");
> }
>
> qtest_quit(qts);
> --
> 2.17.1
>
Otherwise
Reviewed-by: Andrew Jones
_ARM_DEV_SPE));
> +switched_level &= ~KVM_ARM_DEV_SPE;
> +}
> if (switched_level) {
> qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ
> %x\n",
>__func__, switched_level);
> --
> 2.17.1
>
Otherwise
Reviewed-by: Andrew Jones
On Tue, Sep 08, 2020 at 08:13:28AM +, Haibo Xu wrote:
> Turn on the spe cpu property by default if host cpu
> support it, i.e. we can now do '-cpu max|host' to add
> the vSPE, and '-cpu max|host,spe=off' to remove it.
>
> Signed-off-by: Haibo Xu
> ---
> target/arm/cpu.c | 3 +++
>
;, 1);
> qdev_init_gpio_out_named(DEVICE(cpu), >pmu_interrupt,
> "pmu-interrupt", 1);
> +qdev_init_gpio_out_named(DEVICE(cpu), >spe_interrupt,
> + "spe-interrupt", 1);
> #endif
>
> /* DTB consumers generally don't in fact care what the 'compatible'
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index baf2bbcee8..395a1e5df8 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -800,6 +800,8 @@ struct ARMCPU {
> qemu_irq gicv3_maintenance_interrupt;
> /* GPIO output for the PMU interrupt */
> qemu_irq pmu_interrupt;
> +/* GPIO output for the SPE interrupt */
> +qemu_irq spe_interrupt;
>
> /* MemoryRegion to use for secure physical accesses */
> MemoryRegion *secure_memory;
> --
> 2.17.1
>
>
Otherwise
Reviewed-by: Andrew Jones
On Tue, Sep 08, 2020 at 08:13:26AM +, Haibo Xu wrote:
> From: Andrew Jones
>
> Move the KVM PMU setup part of fdt_add_pmu_nodes() to
> virt_cpu_post_init(), which is a more appropriate location. Now
> fdt_add_pmu_nodes() is also named more appropriately, because it
> no lo
On Tue, Sep 08, 2020 at 08:13:25AM +, Haibo Xu wrote:
> From: Andrew Jones
>
> We'll add more to this new function in coming patches so we also
> state the gic must be created and call it below create_gic().
>
> No functional change intended.
>
> Sig
On Tue, Sep 08, 2020 at 08:13:24AM +, Haibo Xu wrote:
> Signed-off-by: Haibo Xu
> ---
> target/arm/kvm64.c | 33 +
> target/arm/kvm_arm.h | 5 +
> 2 files changed, 38 insertions(+)
>
Reviewed-by: Andrew Jones
On Tue, Sep 08, 2020 at 08:13:23AM +, Haibo Xu wrote:
> From: Andrew Jones
>
> Rename kvm_arm_pmu_set_attr() to kvm_arm_set_device_attr(),
> So both the vPMU and vSPE device can share the same API.
>
> Signed-off-by: Andrew Jones
Looks like a faithful port of what
5 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -126,6 +126,7 @@ typedef struct {
> bool no_ged; /* Machines < 4.2 has no support for ACPI GED device */
> bool kvm_no_adjvtime;
> bool acpi_expose_flash;
> +bool no_spe;
> } VirtMachineClass;
>
> typedef struct {
> --
> 2.17.1
>
Reviewed-by: Andrew Jones
target/arm/cpu64.c | 52 ++
> 3 files changed, 71 insertions(+)
>
Reviewed-by: Andrew Jones
kvm.c b/target/arm/kvm.c
> index 8bb7318378..58f991e890 100644
> --- a/target/arm/kvm.c
> +++ b/target/arm/kvm.c
> @@ -214,6 +214,11 @@ bool kvm_arm_pmu_supported(void)
> return kvm_check_extension(kvm_state, KVM_CAP_ARM_PMU_V3);
> }
>
Reviewed-by: Andrew Jones
FYI, the new KVM cap is on its way into the kernel and Peter has submit
patches to remove kvm32 from qemu. So I'll be refreshing this series to
incorporate both those changes.
Thanks,
drew
On Wed, Aug 05, 2020 at 11:16:35AM +0200, Andrew Jones wrote:
> v2:
> - Changed the introd
On Fri, Aug 14, 2020 at 12:28:25PM -0700, Richard Henderson wrote:
> On 8/11/20 9:49 AM, Andrew Jones wrote:
> > Yes, except you need to drop the ARM_FEATURE_SPE define and use the ID
> > register bit instead like "sve_supported" does.
>
> On a related not
On Sat, Aug 15, 2020 at 10:19:05AM +0800, Peng Liang wrote:
> On 8/13/2020 8:56 PM, Andrew Jones wrote:
> > On Thu, Aug 13, 2020 at 06:26:55PM +0800, Peng Liang wrote:
> >> Add CPU features to the result of query-cpu-model-expansion so that
> >> other applications
On Sat, Aug 15, 2020 at 10:19:27AM +0800, Peng Liang wrote:
> On 8/13/2020 8:48 PM, Andrew Jones wrote:
> > On Thu, Aug 13, 2020 at 06:26:53PM +0800, Peng Liang wrote:
> >> Some CPU features are dependent on other CPU features. For example,
> >> ID_AA64PFR0_EL1.F
On Sat, Aug 15, 2020 at 10:19:12AM +0800, Peng Liang wrote:
> On 8/13/2020 8:21 PM, Andrew Jones wrote:
> > On Thu, Aug 13, 2020 at 06:26:50PM +0800, Peng Liang wrote:
> >> The implementation of CPUClass::parse_features only supports CPU
> >> features in "feature=
criptions for each of the sve* properties
too.
> }
>
> aarch64_add_sve_properties(obj);
> diff --git a/target/arm/monitor.c b/target/arm/monitor.c
> index ba6e01abd0..2c7be32b33 100644
> --- a/target/arm/monitor.c
> +++ b/target/arm/monitor.c
> @@ -104,6 +104,7 @@ static co
erty_add(obj, "sve", "bool", cpu_arm_get_sve,
> - cpu_arm_set_sve, NULL, NULL);
> +object_property_add_bool(obj, "sve", cpu_arm_get_sve, cpu_arm_set_sve);
>
> for (vq = 1; vq <= ARM_MAX_VQ; ++vq) {
> char name[8];
> --
> 2.25.1
>
>
Reviewed-by: Andrew Jones
On Fri, Aug 14, 2020 at 11:17:30AM +0200, Andrew Jones wrote:
> On Thu, Aug 13, 2020 at 01:02:41PM -0700, Richard Henderson wrote:
> > The crypto overhead of emulating pauth can be significant for
> > some workloads. Add two boolean properties that allows the
> > fea
On Thu, Aug 13, 2020 at 01:02:42PM -0700, Richard Henderson wrote:
> Without hardware acceleration, a cryptographically strong
> algorithm is too expensive for pauth_computepac.
>
> Even with hardware accel, we are not currently expecting
> to link the linux-user binaries to any crypto libraries,
On Thu, Aug 13, 2020 at 06:26:48PM +0800, Peng Liang wrote:
> QEMU does not support disable/enable CPU features in AArch64 for now.
Yes, it does. We have a handful of CPU features implemented as CPU
properties and we have QMP support for probing those features and
testing whether they may be
On Thu, Aug 13, 2020 at 06:26:55PM +0800, Peng Liang wrote:
> Add CPU features to the result of query-cpu-model-expansion so that
> other applications (such as libvirt) can know the supported CPU
> features.
>
> Signed-off-by: zhanghailiang
> Signed-off-by: Peng Liang
> ---
> target/arm/cpu.c
On Thu, Aug 13, 2020 at 06:26:53PM +0800, Peng Liang wrote:
> Some CPU features are dependent on other CPU features. For example,
> ID_AA64PFR0_EL1.FP field and ID_AA64PFR0_EL1.AdvSIMD must have the same
> value, which means FP and ADVSIMD are dependent on each other, FPHP and
> ADVSIMDHP are
On Thu, Aug 13, 2020 at 06:26:51PM +0800, Peng Liang wrote:
> The Arm architecture specifies a number of ID registers that are
> characterized as comprising a set of 4-bit ID fields. Each ID field
> identifies the presence, and possibly the level of support for, a
> particular feature in an
On Thu, Aug 13, 2020 at 06:26:50PM +0800, Peng Liang wrote:
> The implementation of CPUClass::parse_features only supports CPU
> features in "feature=value" format. However, libvirt maybe send us a
> CPU feature string in "+feature/-feature" format.
Why would libvirt do that? If we have a
On Thu, Aug 13, 2020 at 10:05:04AM +0100, Mark Rutland wrote:
> On Thu, Aug 13, 2020 at 08:03:21AM +0200, Andrew Jones wrote:
> > Thinking about this some more, maybe we don't need pauth-arch.
> > If we don't, then it simplifies nicely to
> >
> > # Default (enabled
On Wed, Aug 12, 2020 at 06:31:11PM +0200, Andrew Jones wrote:
> On Wed, Aug 12, 2020 at 08:10:47AM -0700, Richard Henderson wrote:
> > On 8/12/20 4:00 AM, Andrew Jones wrote:
> > > On Tue, Aug 11, 2020 at 11:53:38PM -0700, Richard Henderson wrote:
> > >> The crypto o
On Wed, Aug 12, 2020 at 08:10:47AM -0700, Richard Henderson wrote:
> On 8/12/20 4:00 AM, Andrew Jones wrote:
> > On Tue, Aug 11, 2020 at 11:53:38PM -0700, Richard Henderson wrote:
> >> The crypto overhead of emulating pauth can be significant for
> >> some workloads.
On Tue, Aug 11, 2020 at 11:53:38PM -0700, Richard Henderson wrote:
> The crypto overhead of emulating pauth can be significant for
> some workloads. Add an enumeration property that allows the
> feature to be turned off, on with the architected algorithm,
> or on with an implementation defined
On Wed, Aug 12, 2020 at 12:16:31PM +0200, Auger Eric wrote:
> Hi Drew,
> On 8/5/20 11:16 AM, Andrew Jones wrote:
> > Move the KVM PMU setup part of fdt_add_pmu_nodes() to
> > virt_cpu_post_init(), which is a more appropriate location. Now
> > fdt_add_pmu_nodes() is also
On Wed, Aug 12, 2020 at 12:16:43PM +0200, Auger Eric wrote:
> Hi Drew,
>
> On 8/5/20 11:16 AM, Andrew Jones wrote:
> > When we compile without KVM support !defined(CONFIG_KVM) we generate
> > stubs for functions that the linker will still encounter. Sometimes
> >
On Tue, Aug 11, 2020 at 11:15:42AM +0800, Haibo Xu wrote:
> > > +if (!cpu->has_spe || !kvm_enabled()) {
> > > +unset_feature(env, ARM_FEATURE_SPE);
> > > +}
> >
> > I don't think this should be necessary.
> >
>
> Yes, I have tried to remove this check, and the vSPE can still work
On Tue, Aug 11, 2020 at 10:38:02AM +0800, Haibo Xu wrote:
> On Mon, 10 Aug 2020 at 19:05, Andrew Jones wrote:
> >
> > On Fri, Aug 07, 2020 at 08:10:36AM +, Haibo Xu wrote:
> > > Add a virtual SPE device for virt machine while using PPI
> > > 5 for SPE overf
On Fri, Aug 07, 2020 at 08:10:37AM +, Haibo Xu wrote:
> Turn on the spe cpu property by default when working with host
> cpu type in KVM mode, i.e. we can now do '-cpu host' to add the
> vSPE, and '-cpu host,spe=off' to remove it.
-cpu max with KVM should also enable it by default
>
>
On Fri, Aug 07, 2020 at 08:10:36AM +, Haibo Xu wrote:
> Add a virtual SPE device for virt machine while using PPI
> 5 for SPE overflow interrupt number.
Any reason PPI 5 was selected?
>
> Signed-off-by: Haibo Xu
> ---
> hw/arm/virt-acpi-build.c| 3 +++
> hw/arm/virt.c
On Fri, Aug 07, 2020 at 08:10:33AM +, Haibo Xu wrote:
> Adds a spe=[on/off] option to enable/disable vSPE support in
> guest vCPU. Note this option is only available for "-cpu host"
> with KVM mode, and default value is on.
>
> Signed-off-by: Haibo Xu
> ---
> target/arm/cpu.c | 28
On Fri, Aug 07, 2020 at 08:10:30AM +, Haibo Xu wrote:
> This series add support for SPE(Statistical Profiling Extension)[1]
> in KVM guest. It's based on Andrew Murray's kernel KVM patches V2[2],
> and has been tested to ensure that guest can use SPE with valid data.
> E.g.
>
> In host:
> $
On Mon, Aug 10, 2020 at 10:48:41AM +0800, Haibo Xu wrote:
> On Fri, 7 Aug 2020 at 16:19, Philippe Mathieu-Daudé wrote:
> >
> > On 8/7/20 10:10 AM, Haibo Xu wrote:
> > > Rename kvm_arm_pmu_set_attr() to kvm_arm_dev_set_attr(),
> >
> > Maybe rename kvm_arm_device_set_attr() to match the structure
/put_virtual_time(), as they aren't
necessary at all - the only caller is in kvm.c
Signed-off-by: Andrew Jones
---
target/arm/kvm_arm.h | 44 +++-
1 file changed, 27 insertions(+), 17 deletions(-)
diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
index
We'll add more to this new function in coming patches so we also
state the gic must be created and call it below create_gic().
No functional change intended.
Signed-off-by: Andrew Jones
Reviewed-by: Peter Maydell
---
hw/arm/virt.c | 43 +++
1 file
We add the kvm-steal-time CPU property and implement it for machvirt.
A tiny bit of refactoring was also done to allow pmu and pvtime to
use the same vcpu device helper functions.
Signed-off-by: Andrew Jones
---
docs/system/arm/cpu-features.rst | 11 +
hw/arm/virt.c| 43
From: Cornelia Huck
Add 5.2 machine types for arm/i440fx/q35/s390x/spapr.
Signed-off-by: Cornelia Huck
---
hw/arm/virt.c | 9 -
hw/core/machine.c | 3 +++
hw/i386/pc.c | 6 --
hw/i386/pc_piix.c | 14 +-
hw/i386/pc_q35.c
ipermail/kvmarm/2020-August/041823.html
Thanks,
drew
Andrew Jones (4):
target/arm/kvm: Make uncalled stubs explicitly unreachable
hw/arm/virt: Move post cpu realize check into its own function
hw/arm/virt: Move kvm pmu setup to virt_cpu_post_init
hw/arm/virt: Implement kvm-steal-time
Cor
Move the KVM PMU setup part of fdt_add_pmu_nodes() to
virt_cpu_post_init(), which is a more appropriate location. Now
fdt_add_pmu_nodes() is also named more appropriately, because it
no longer does anything but fdt node creation.
No functional change intended.
Signed-off-by: Andrew Jones
On Wed, Jul 29, 2020 at 04:40:54PM +0200, Andrew Jones wrote:
> > > +static inline void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error
> > > **errp) {}
> >
> > Does this stub need to report an error to the caller via errp,
> > or is it a "never called
On Sat, Aug 01, 2020 at 02:00:34PM +0200, Andrew Jones wrote:
> > > if (kvm_enabled()) {
> > > +hwaddr pvtime_base = vms->memmap[VIRT_PVTIME].base;
> > > +hwaddr pvtime_size = vms->memmap[VIRT_PVTIME].size;
>
On Fri, Jul 31, 2020 at 03:54:07PM +0100, Peter Maydell wrote:
> On Sat, 11 Jul 2020 at 11:10, Andrew Jones wrote:
> > We add the kvm-steal-time CPU property and implement it for machvirt.
> > A tiny bit of refactoring was also done to allow pmu and pvtime to
> > use the sa
On Tue, Jul 21, 2020 at 11:46:12AM +0100, Peter Maydell wrote:
> > +if (!probed) {
> > +probed = true;
> > +if (kvm_check_extension(kvm_state, KVM_CAP_VCPU_ATTRIBUTES)) {
> > +if (!kvm_arm_create_scratch_host_vcpu(NULL, fdarray, NULL)) {
> > +
On Tue, Jul 21, 2020 at 11:02:30AM +0100, Peter Maydell wrote:
> On Sat, 11 Jul 2020 at 11:10, Andrew Jones wrote:
> >
> > Move the KVM PMU setup part of fdt_add_pmu_nodes() to
> > virt_cpu_post_init(), which is a more appropriate location. Now
> > fdt_add_pmu
(mc->compat_props, hw_compat_5_1, hw_compat_5_1_len);
> }
> -DEFINE_VIRT_MACHINE_AS_LATEST(5, 1)
> +DEFINE_VIRT_MACHINE(5, 1)
>
> static void virt_machine_5_0_options(MachineClass *mc)
> {
For the above hw/arm/virt.c part
Reviewed-by: Andrew Jones
On Mon, Jul 20, 2020 at 11:16:41AM +0100, Peter Maydell wrote:
> On Sat, 11 Jul 2020 at 11:10, Andrew Jones wrote:
> >
> > KVM supports the ability to publish the amount of time that VCPUs
> > were runnable, but not running due to other host threads running
> > inste
On Wed, Jul 15, 2020 at 02:26:19PM +0200, Laszlo Ersek wrote:
> Hi Drew,
>
> On 07/15/20 08:36, Andrew Jones wrote:
>
> > So it sounds to me like we have some flexibility in our versioned machine
> > maintenance. We can choose to forgo the usual compat code when the risk
On Wed, Jul 15, 2020 at 08:36:48AM +0200, Andrew Jones wrote:
> On Tue, Jul 14, 2020 at 04:41:41PM +0200, Igor Mammedov wrote:
> >
> > In this particular case I'd drop versioning.
> >
>
> So it sounds to me like we have some flexibility in our versioned machine
&
On Tue, Jul 14, 2020 at 04:41:41PM +0200, Igor Mammedov wrote:
> On Tue, 14 Jul 2020 11:23:25 +0200
> Andrew Jones wrote:
>
> > On Tue, Jul 14, 2020 at 04:57:50AM -0400, Michael S. Tsirkin wrote:
> > > On Tue, Jul 14, 2020 at 07:51:09AM +0200, Andrew Jones wrote:
>
On Tue, Jul 14, 2020 at 04:57:50AM -0400, Michael S. Tsirkin wrote:
> On Tue, Jul 14, 2020 at 07:51:09AM +0200, Andrew Jones wrote:
> > On Mon, Jul 13, 2020 at 10:49:07AM +0200, Igor Mammedov wrote:
> > > On Mon, 29 Jun 2020 16:09:37 +0200
> > > Andrew Jones wrote:
>
On Mon, Jul 13, 2020 at 10:49:07AM +0200, Igor Mammedov wrote:
> On Mon, 29 Jun 2020 16:09:37 +0200
> Andrew Jones wrote:
>
> > The flash device is exclusively for the host-controlled firmware, so
> > we should not expose it to the OS. Exposing it risks the OS messing
>
fail when migrating
to a host that does not support steal-time
[*] https://lists.cs.columbia.edu/pipermail/kvmarm/2020-July/041538.html
Thanks,
drew
Andrew Jones (3):
hw/arm/virt: Move post cpu realize check into its own function
hw/arm/virt: Move kvm pmu setup to virt_cpu_post_init
hw/arm/virt:
We add the kvm-steal-time CPU property and implement it for machvirt.
A tiny bit of refactoring was also done to allow pmu and pvtime to
use the same vcpu device helper functions.
Signed-off-by: Andrew Jones
---
docs/system/arm/cpu-features.rst | 11 +
hw/arm/virt.c| 33
We'll add more to this new function in coming patches so we also
state the gic must be created and call it below create_gic().
No functional change intended.
Signed-off-by: Andrew Jones
---
hw/arm/virt.c | 43 +++
1 file changed, 27 insertions(+), 16
Move the KVM PMU setup part of fdt_add_pmu_nodes() to
virt_cpu_post_init(), which is a more appropriate location. Now
fdt_add_pmu_nodes() is also named more appropriately, because it
no longer does anything but fdt node creation.
No functional change intended.
Signed-off-by: Andrew Jones
On Tue, Jul 07, 2020 at 11:15:30AM +0100, Peter Maydell wrote:
> On Tue, 7 Jul 2020 at 11:04, Andrew Jones wrote:
> > This seems a bit messy to me. With an EL3 firmware, the DTB is provided
> > by the EL3 firmware. I guess that's why when I look at the DTB generation
> &g
nd it
> should
> + * use SMC as PSCI conduit.
> +case QEMU_PSCI_CONDUIT_DISABLED:
> case QEMU_PSCI_CONDUIT_SMC:
> fadt.arm_boot_arch = ACPI_FADT_ARM_PSCI_COMPLIANT;
> break;
> --
> 2.7.4
>
>
Otherwise
Reviewed-by: Andrew Jones
On Fri, Jul 03, 2020 at 03:41:05PM +0100, Peter Maydell wrote:
> On Fri, 3 Jul 2020 at 15:36, Heyi Guo wrote:
> >
> >
> > 在 2020/7/3 下午6:37, Peter Maydell 写道:
> > > On Fri, 3 Jul 2020 at 10:44, Heyi Guo wrote:
> > >> vms->psci_conduit being disabled only means PSCI is not implemented by
> > >>
Signed-off-by: Andrew Jones
---
tests/qtest/bios-tables-test-allowed-diff.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8bf4..32a401ae35fa 100644
--- a/tests/qtest/bios-tables-test
Fixes: 93dd625f8bf7 ("tests/acpi: update expected data files")
Signed-off-by: Andrew Jones
---
tests/qtest/bios-tables-test-allowed-diff.h | 18 --
1 file changed, 18 deletions(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-te
0x0400, // Address Length
-)
-})
-}
-
Device (FWCF)
{
Name (_HID, "QEMU0002") // _HID: Hardware ID
The other two binaries have the same changes (the removal of the
flash devices).
Signed-off-by: Andrew Jones
---
tests/da
and Laszlo.
Patch 3/4 is the meat. The other patches deal with updating qtest.
Thanks,
drew
Andrew Jones (4):
tests/acpi: remove stale allowed tables
tests/acpi: virt: allow DSDT acpi table changes
hw/arm/virt-acpi-build: Only expose flash on older machine types
tests/acpi: virt: update golden
adding the tables for quite some time and don't want to change the
default hardware exposed to versioned machines, then we only stop
exposing the flash device tables for 5.1 and later machine types.
Suggested-by: Ard Biesheuvel
Suggested-by: Laszlo Ersek
Signed-off-by: Andrew Jones
---
hw/arm
On Fri, Jun 19, 2020 at 11:19:05AM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
> ---
> tests/data/acpi/pc/DSDT | Bin 5014 -> 4934 bytes
> tests/data/acpi/pc/DSDT.acpihmat | Bin 6338 -> 6258 bytes
> tests/data/acpi/pc/DSDT.bridge| Bin 6873 -> 6793 bytes
>
oo, despite some comments needing
rework. Anyway, here's this tag again.
Acked-by: Andrew Jones
> ---
> target/arm/cpu.h | 2 ++
> target/arm/kvm.c | 30 +-
> target/arm/kvm32.c | 34 ++
> target/arm/kvm64.c | 49
*/
> +ret = kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss,
> + run->arm_nisv.fault_ipa);
> +break;
> + default:
An extra space got added in front of 'default:'
> qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
>__func__, run->exit_reason);
> break;
> --
> 2.7.4
>
>
Besides the format changes
Reviewed-by: Andrew Jones
f --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
> index 48bf5e1..471ddd1 100644
> --- a/target/arm/kvm_arm.h
> +++ b/target/arm/kvm_arm.h
> @@ -453,6 +453,16 @@ struct kvm_guest_debug_arch;
> void kvm_arm_copy_hw_debug_data(struct kvm_guest_debug_arch *ptr);
>
> /**
> + * kvm_arm_verify_ext_dabt_pending:
> + * @cs: CPUState
> + *
> + * Verify the fault status code wrt the Ext DABT injection
> + *
> + * Returns: true if the fault status code is as expected, false otherwise
> + */
> +bool kvm_arm_verify_ext_dabt_pending(CPUState *cs);
> +
> +/**
> * its_class_name:
> *
> * Return the ITS class name to use depending on whether KVM acceleration
> --
> 2.7.4
>
>
I didn't try to review kvm_arm_verify_ext_dabt_pending() to be sure it's
doing what it says it's doing, but the approach to the code looks good to
me, so
Acked-by: Andrew Jones
Thanks,
drew
DABT with no valid iss to decode */
> +ret = kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss,
> + run->arm_nisv.fault_ipa);
> +break;
> + default:
> qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
>__func__, run->exit_reason);
> break;
> --
> 2.7.4
>
>
Besides the suggested comment changes and the memset nit
Reviewed-by: Andrew Jones
Thanks,
drew
On Tue, Jun 23, 2020 at 11:06:20AM +0200, Philippe Mathieu-Daudé wrote:
> Since v2:
> - include Drew test fix (addressed Peter review comments)
> - addressed Drew review comments
> - collected R-b/A-b
>
> Andrew Jones (1):
> tests/qtest/arm-cpu-features: Add feature settin
On Sat, Jun 13, 2020 at 10:36:07PM +0100, Salil Mehta wrote:
> This patch-set introduces the virtual cpu hotplug support for ARMv8
> architecture in QEMU. Idea is to be able to hotplug and hot-unplug the vcpus
> while guest VM is running and no reboot is required. This does *not* makes any
>
On Sat, Jun 13, 2020 at 10:36:14PM +0100, Salil Mehta wrote:
> PMU for all possible vcpus must be initialized at the virt machine
> initialization time. This patch refactors existing code to accomodate possible
> vcpus. This also assumes that all processor being used are identical at least
> for
On Sat, Jun 13, 2020 at 10:36:08PM +0100, Salil Mehta wrote:
> For now, vcpu hotplug is only supported with single socket single thread,
> single die. NUMA is not supported either and everthing falls into single
> node. Work to properly support these could be taken later once community
> agrees
Signed-off-by: Andrew Jones
---
Note: We need to apply this test change after the Based-on patch is
applied in order to avoid breaking CI with segfaults.
v2:
- When a feature is enabled by default set false first [Peter]
- Add Based-on tag [Peter]
- Also do the PMU setting test with
On Mon, Jun 22, 2020 at 08:57:51PM +0100, Peter Maydell wrote:
> On Fri, 19 Jun 2020 at 12:41, Andrew Jones wrote:
> > Can you also post the attached patch with this one (a two patch series)?
>
> This would be easier to review if you'd just posted it as
> a patch with a Ba
| 2 +-
> target/arm/cpu64.c | 10 +-
> target/arm/kvm.c | 4 ++--
> target/arm/kvm64.c | 14 +-
> 5 files changed, 22 insertions(+), 29 deletions(-)
>
Hi Phil,
Can you also post the attached patch with this one (a two patch series)?
I want to ensure the b
dually.
>
> Fix by kvm_arm__supported() functions take a AccelState
> argument (already realized/valid at this point) instead of a
> CPUState argument.
This is no longer what's being done.
>
> Reported-by: Haibo Xu
> Suggested-by: Paolo Bonzini
> Signed-off-by: Philippe M
On Wed, Jun 17, 2020 at 03:08:00PM +0200, Philippe Mathieu-Daudé wrote:
> Since commit d70c996df23f, when enabling the PMU we get:
>
> $ qemu-system-aarch64 -cpu host,pmu=on -M virt,accel=kvm,gic-version=3
> Segmentation fault (core dumped)
>
> Thread 1 "qemu-system-aar" received signal
On Wed, Jun 17, 2020 at 07:37:42PM +0200, Paolo Bonzini wrote:
> On 17/06/20 17:23, Andrew Jones wrote:
> >>
> >> Fix by kvm_arm__supported() functions take a AccelState
> >> argument (already realized/valid at this point) instead of a
> >> CPUState argument.
On Wed, Jun 17, 2020 at 03:08:00PM +0200, Philippe Mathieu-Daudé wrote:
> Since commit d70c996df23f, when enabling the PMU we get:
>
> $ qemu-system-aarch64 -cpu host,pmu=on -M virt,accel=kvm,gic-version=3
> Segmentation fault (core dumped)
>
> Thread 1 "qemu-system-aar" received signal
On Wed, Jun 17, 2020 at 12:32:09PM +0200, Philippe Mathieu-Daudé wrote:
> On 6/17/20 10:23 AM, Philippe Mathieu-Daudé wrote:
> > On 6/11/20 11:14 AM, Andrew Jones wrote:
> >> On Thu, Jun 11, 2020 at 04:46:45PM +0800, Haibo Xu wrote:
> >>> Hi,
> >>&g
Cc: Cornelia Huck
Signed-off-by: Andrew Jones
---
hw/arm/virt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index caceb1e4a05f..8b6e6aa7b138 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -2375,6 +2375,7 @@ DEFINE_VIRT_MACHINE_AS_LATEST(5, 1)
static
Hi Beata,
I see Peter just picked this up, so I'm a bit late getting to it. I do
have a couple comments below though.
Thanks,
drew
On Fri, May 29, 2020 at 12:27:56PM +0100, Beata Michalska wrote:
> On ARMv7 & ARMv8 some load/store instructions might trigger a data abort
> exception with no
On Thu, Jun 11, 2020 at 04:46:45PM +0800, Haibo Xu wrote:
> Hi,
>
> I met a qemu core dump issue when starting a VM with cpu feature
> "pmu=on" on an arm server.
> The commands to start the machine is:
>
> ./qemu-system-aarch64 \
>-cpu host,pmu=on -M virt,accel=kvm,gic-version=3
On Wed, Jun 10, 2020 at 09:32:06AM +0800, Ying Fang wrote:
>
>
> On 6/8/2020 8:49 PM, Andrew Jones wrote:
> > On Mon, Jun 08, 2020 at 08:12:43PM +0800, Ying Fang wrote:
> > > From: fangying
> > >
> > > Virtual time adjustment was implemented fo
timer
> feature enabled.
>
> Suggested-by: Andrew Jones
This isn't true. I did suggest the way to arrange the code, after
Peter suggested to move the kvm_arm_add_vcpu_properties() call to
arm_cpu_post_init(), but I didn't suggest making this change in general,
which is what this tag mea
On Thu, Jun 04, 2020 at 02:10:08PM +0100, Peter Maydell wrote:
> [added kvm-arm to the cc list; the kernel folks tend to hang out
> there, not on qemu-devel, so KVM related questions are usually
> worth raising there as well.]
>
> On Thu, 4 Jun 2020 at 13:55, Leif Lindholm wrote:
> > However,
On Thu, Jun 04, 2020 at 01:55:44PM +0100, Leif Lindholm wrote:
> Hi there,
>
> (all this done on current HEAD: 66234fee9c)
>
> I was looking through the definition of the aarch64 "max" cpu, and
> noticed it invokes aarch64_a57_initfn as a template, followed by
> overriding some feature and ID
On Wed, Jun 03, 2020 at 01:48:10PM +, Salil Mehta wrote:
> (Maybe I should float the ARM VCPU Hotplug patches and let this
> discussion be held over there?)
>
Yes, I think that would be best. Keep in mind that the 'pmu' CPU property
is just one CPU property that we require all CPUs to have,
On Wed, Jun 03, 2020 at 11:45:22AM +, Salil Mehta wrote:
> Hi Andrew,
> Many thanks for the reply.
>
> > From: Andrew Jones [mailto:drjo...@redhat.com]
> > Sent: Wednesday, June 3, 2020 10:38 AM
> > To: Salil Mehta
> > Cc: qemu-devel@nongnu.org; qemu-...@non
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