ls a bit dubious to me. I can go with whichever one you prefer
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On 15/06/2021 18:37, Fabiano Rosas wrote:
Richard Henderson writes:
On 6/15/21 4:32 AM, Bruno Piazera Larsen wrote:
On 14/06/2021 19:37, Richard Henderson wrote:
On 6/14/21 12:16 PM, Bruno Larsen (billionai) wrote:
This patch changes ppc_cpu_get_phys_page_debug so that it is now
able to
be able to read instructions
* mapped by code TLBs, so we also try a MMU_INST_FETCH.
*/
-if (ppc_xlate(cpu, addr, MMU_DATA_LOAD, &raddr, &s, &p, 0, false) ||
-ppc_xlate(cpu, addr, MMU_INST_FETCH, &raddr, &s, &p, 0, false)) {
+if (ppc_xlate(cpu, addr, MMU_D
end a
new version with everything corrected, I wanna make sure if I should
leave them in internal and use it for hash32 and 6xx MMUs, or do I put
them in mmu-book3s-v3.h, since only radix64 has that the bug?
r~
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INST_FETCH, &raddr, &s, &p, 3, false)) {
+ return raddr & TARGET_PAGE_MASK;
+}
return -1;
}
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PU would. But from my perspective it would be
better to have GDB access all of the guest memory without restriction.
Yeah, could also be a thing. I really don't know, though, because before
the mmu_idx was 0, so it wouldn't work even before this patch. Some more
discussion is appreci
ng GDB warn the user
that the CPU can not decode the address in it's current state, but I do
think it is a good tool to have, as it would've made debugging the first
RFC on this topic a bit easier, and farosas was actively complaining
that isn't a feature yet.
r~
--
Bruno P
e *env)
cpu_abort(env_cpu(env), "Unknown MMU model %x\n", env->mmu_model);
break;
}
+#endif
}
#ifdef CONFIG_TCG
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}
+}
+#endif /* defined(TARGET_PPC64) */
+/* FIXME: Should check for valid HTABMASK values in 32-bit case */
+env->spr[SPR_SDR1] = value;
+}
+#endif /* CONFIG_SOFTMMU */
+
/*/
/* PowerPC MMU emulation */
Maybe just a nit, but if t
On 08/06/2021 13:37, Bruno Piazera Larsen wrote:
On 08/06/2021 12:35, Richard Henderson wrote:
On 6/8/21 7:39 AM, Bruno Piazera Larsen wrote:
That's odd. We already have more arguments than the number of
argument registers... A 5x slowdown is distinctly odd.
I did some more diggin
On 08/06/2021 12:35, Richard Henderson wrote:
On 6/8/21 7:39 AM, Bruno Piazera Larsen wrote:
That's odd. We already have more arguments than the number of
argument registers... A 5x slowdown is distinctly odd.
I did some more digging and the problem is not with
ppc_radix64_check_prot
On 07/06/2021 18:06, Richard Henderson wrote:
On 6/7/21 12:29 PM, Bruno Piazera Larsen wrote:
I just tried sending mmu_idx all the way down, but I ran into a very
weird bug of gcc. If we have to add one more parameter that GCC can't
just optimize away we get at least a slow down of 5x fo
On 02/06/2021 19:19, Richard Henderson wrote:
On 6/2/21 12:58 PM, Bruno Piazera Larsen wrote:
For the use from ppc_cpu_get_phys_page_debug, you'd pass in
cpu_mmu_index(env, false).
ppc_cpu_get_phys_page_debug has 2 calls to ppc_xlate, one using the
data MMU, the other using the instru
read" part. Scalars are a good solution. In this function in
specific, PR doesn't actually show up anywhere, so I would actually only
need 2. Anyway, will start working on this.
- if (access_type == MMU_INST_FETCH ? !msr_ir : !msr_dr) {
+ if (access_type == MMU_INST_FETCH ? !MSR[IR] :
offs]));
+tcg_gen_st_tl(t0, cpu_env, offsetof(CPUPPCState, entry_points[sprn_offs]) +
+ offsetof(PPCInterrupt, addr));
gen_store_spr(sprn, t0);
tcg_temp_free(t0);
}
Other than that, from what I can see, looks ok
--
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worse UX.
I admit this is pretty counter intuitive, but I think if it is well
documented, it could be a better way to implement the feature
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will be patched; it may be
+different than the one that was just executed if the latter has already
+been chained to other TBs.
Could be a bit more clear?
Self-modifying code and translated code invalidation
----
--
Bruno Piazera Larsen
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But it's fair not to care about
that right now, so, applied to ppc-for-6.1.
Now that the future is here, I was looking into why might the reasons be
bogus. From what I can see, what should be happening is just storing
what was retrieved by the kvm ioctl, right? Am I missing something?
--
Bru
#x27;''''''
+
+This command didn't produce any output already. Removed with no replacement.
+
Guest Emulator ISAs
---
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my tree again.
Did you answer to the correct patch? From what I can see, this patch is
still in, but patch 5 is not. I fixed the rebase problem that that one
had and will send it later, with the rest of the patch series.
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<http
-
target/ppc/cpu.h | 1 -
target/ppc/cpu_init.c | 3 --
target/ppc/translate.c | 69 +++---
7 files changed, 5 insertions(+), 113 deletions(-)
--
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ed at this set out of order with your latest !tcg
patches. Now that I've applied those, I've applied those one as well.
Let me just check, where do you keep your most updated tree? I'm
rebasing on your github tree, but ppc-for-6.1 there seems quite outdated
(still the same as m
ailable\n");
-return;
-}
-cpu_dump_statistics(cs, 0);
-}
-
static void hmp_info_trace_events(Monitor *mon, const QDict *qdict)
{
const char *name = qdict_get_try_str(qdict, "name");
--
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64.c and is TCG-only, IIRC), so it sounds like a bit of an
overkill, but I also see the argument for future-proofing.
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e isn't really a point. I think there
was a plan to remove or improve excp_helper, so could be something we
come back to later, but for now I'll remove from the patch series
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have a version of disable-tcg that is functional, I'm
inclined to look at this cleanup. Just to make sure I got it right:
everything related to ppc_cpu_dump_statistics and the stuff related to
ifdef DO_PPC_STATISTICS can be removed, yeah?
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Instituto de Pesq
h"
+
+void create_ppc_opcodes(PowerPCCPU *cpu, Error **errp)
+{}
I believe style dictates this be
{
}
rather than
{}
huh, on it.
Should we try and add this to the checkpatch script? no one complained
about it anywhere...
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<http
planning on
tackling next.
If my understanding is correct, I don't think we lose anything by
applying those and we finally support the disable flag.
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\.(h|c|cpp)$/);
+ next if ($realfile !~ /\.((h|c)(\.inc)?|cpp)$/);
there's an extra ). shouldn't it be ((h|c(\.inc)?|cpp)$/)?
# Block comment styles
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On 20/05/2021 11:52, Richard Henderson wrote:
On 5/20/21 8:18 AM, Bruno Piazera Larsen wrote:
+#ifdef CONFIG_TCG
bool ppc_cpu_tlb_fill(CPUState *cs, vaddr eaddr, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr
;
}
+#endif
This patch makes it look like we would compile mmu_helper.c after all.
Is that it? That looks like the simplest solution (ifdef'ing away all
helpers) but I thought mmu_helper was supposed to have all TCG-only code
relating to MMU.
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Bruno Piazera Larsen
Instituto de
page_size);
+return true;
}
-if (unlikely(ret != 0)) {
-if (probe) {
-return false;
- }
- raise_exception_err_ra(env, cs->exception_index, env->error_code,
- retaddr);
+if (probe) {
+return false;
}
-return tru
, MMU_INST_FETCH, &raddr, &s, &p, 0, false)) {
+return raddr & TARGET_PAGE_MASK;
+}
+return -1;
+}
+
+
bool ppc_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
MMUAccessType access_type, int mmu_idx,
bool probe
}
-}
-
-sr = env->sr[eaddr >> 28];
-
-if (sr & SR32_T) {
-/* FIXME: Add suitable debug support for Direct Store segments */
+if (!ppc_hash32_xlate(cpu, eaddr, MMU_DATA_LOAD, &raddr,
+ &psize, &prot, false)) {
return -1;
c_hash64_htab_lookup(cpu, slb, addr, &pte, &apshift);
-if (ptex == -1) {
+if (!ppc_hash64_xlate(cpu, eaddr, MMU_DATA_LOAD, &raddr,
+ &psize, &prot, false)) {
return -1;
}
- return deposit64(pte.pte1 & HPTE64
g eaddr)
int psize, prot;
hwaddr raddr;
-if (ppc_radix64_xlate(cpu, eaddr, MMU_DATA_LOAD, &raddr,
- &psize, &prot, false)) {
+if (!ppc_radix64_xlate(cpu, eaddr, MMU_DATA_LOAD, &raddr,
+ &psize, &prot, fa
if ((msr_dr == 0) && (msr_hv || cpu->vhyp)) {
-/* In real mode top 4 effective addr bits (mostly) ignored */
-return eaddr & 0x0FFFULL;
-}
-
-if (ppc_radix64_xlate(cpu, eaddr, 0, msr_dr, &raddr, &psize,
- &prot, false)) {
"helper_regs.h"
The remaining ifdef changes look fine. Some it would be nice to clean
up better in future, but there's no rush.
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+case POWERPC_MMU_2_06:
+case POWERPC_MMU_2_07:
+ret = ppc_hash64_handle_mmu_fault(cpu, addr, access_type, mmu_idx);
+break;
+case POWERPC_MMU_3_00:
+ret = ppc64_v3_handle_mmu_fault(cpu, addr, access_type, mmu_idx);
+break;
+#endif
+
+case POWERPC_MMU
assert((rwx == 0) || (rwx == 1) || (rwx == 2));
-access_type = rwx;
relocation = (access_type == MMU_INST_FETCH ? msr_ir : msr_dr);
/* HV or virtual hypervisor Real Mode Access */
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hys_page_debug)
Is that it? Sorry if this is very obvious, we never dealt with hardware
and mmu stuff before...
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Departamento
ution we came up with.
P.S: There was a miscommunication between me and Bruno, this should've been
a RFC.
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Depart
e an mmu_common.c for common
code. Otherwise, it's probably easier to compile all of mmu_helper.c
instead of picking those functions out.
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On 14/05/2021 11:44, Richard Henderson wrote:
On 5/14/21 8:29 AM, Bruno Piazera Larsen wrote:
On 12/05/2021 15:57, Bruno Piazera Larsen wrote:
On 12/05/2021 15:33, Richard Henderson wrote:
On 5/12/21 9:08 AM, Bruno Larsen (billionai) wrote:
diff --git a/include/exec/helper-proto.h
b
On 12/05/2021 15:57, Bruno Piazera Larsen wrote:
On 12/05/2021 15:33, Richard Henderson wrote:
On 5/12/21 9:08 AM, Bruno Larsen (billionai) wrote:
diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h
index ba100793a7..ce287222ee 100644
--- a/include/exec/helper-proto.h
+++ b
On 13/05/2021 19:45, Richard Henderson wrote:
On 5/13/21 11:36 AM, Bruno Piazera Larsen wrote:
On 12/05/2021 15:20, Richard Henderson wrote:
On 5/12/21 9:08 AM, Bruno Larsen (billionai) wrote:
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 104a308abb..a8a720eb48 100644
--- a/target
unction to begin with. This solution, although it improves the handling
of fpscr, doesn't fix the original problem.
What I think we can do is put the logic that is in helper_store_fpscr
into store_fpscr, move it to cpu.c, and have the helper call the
non-helper function. That way we conserve he
if we keep the stubs, do we keep
them here or in hw/ppc/spapr_hcall.c, along with other stubs?
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Departamen
, opc4(ctx->opcode), ctx->opcode);
-}
+translator_loop_temp_check(&ctx->base);
}
static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
Reviewed-by: Bruno Larsen (billionai)
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x->base.is_jmp = DISAS_NORETURN;
break;
-case POWERPC_EXCP_SYNC:
case POWERPC_EXCP_STOP:
ctx->base.is_jmp = DISAS_EXIT;
break;
Reviewed-by: Bruno Larsen (billionai)
--
Bruno Piazera Larsen
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<h
here the
softfloat value is changed temporarily (do_fri, VSX_ROUND). These
should simply save the previous softfloat value (using
get_float_rounding_mode) around the operation instead of re-computing
from fpscr.
Which leaves us with exactly one use of fpscr_set_rounding_mode, whic
you're stubbing out is used or usable as well.
ah, this probably means we'll need to compile mmu_helper.c too... that
was something we were hoping to avoid, because of the sheer size.
r~
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l not be collected.
We should delete everything from cpu_dump_statistics on down.
uhm, sure. We can do it, but I think should be left as future cleanup
once we get disable-tcg working
r~
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On 06/05/2021 15:57, Richard Henderson wrote:
On 5/5/21 8:53 AM, Bruno Larsen (billionai) wrote:
+/* SPR READ/RITE CALLBACKS */
Missed the spelling fix reported against v4.
And my r-b tags.
r~
:facepalm:
sorry, resending it now
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Also ran into this problem, I intend to fix it as well. If you find
anything else, let me know :)
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GISTER_PROC_TBL
H_INVALIDATE_PID - never called/implemented, added along with
H_REGISTER_PROC_TBL
PS: we could perhaps use this information to annotate
qemu/include/spapr.h. I can send a patch if people find it useful.
That would be very good, I think. I'm always in favor of more documentat
ing it
was probably better than nothing... I'll work on that tomorrow and will
have a new version.
When I do, should I put the many e-mail IDs that hold required patches
as "Based-on" tags, or should I just say ppc-for-6.1? I'm still a bit
lost when dealing with patche
On 03/05/2021 12:25, Richard Henderson wrote:
On 5/3/21 4:28 AM, Bruno Piazera Larsen wrote:
Note for future cleanup: Make spr_tcg.c be standalone as well. Just
need to move a few declarations to a translate.h.
it's not that easy, unfortunately. The readers and writers use a lot
of g
lem
r~
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uture cleanup: Make spr_tcg.c be standalone as well. Just
need to move a few declarations to a translate.h.
it's not that easy, unfortunately. The readers and writers use a lot of
global variables declared in translate.c, so we'd need to create getters
and setters, or some bette
On 29/04/2021 22:15, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
target/ppc/translate.c | 34 ++
1 file changed, 18 insertions(+), 16 deletions(-)
Reviewed-by: Bruno Larsen (billionai)
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ot sure what I've
changed, but now I don't need neither the cpu.h nor the typedef. I can
just not include anything, so I dropped them all.
r~
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ot;trechkpt", 0x1F, 0x0E, 0x1F,
0x03FFF800, \
#include "helper_regs.h"
#include "spr_tcg.c.inc"
-#include "translate_init.c.inc"
/*/
/* Misc PowerPC helpers */
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nction. on a
future series, though.
I'm just slightly concerned now that make check has not seen anything...
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*ctx)
{
@@ -7639,6 +7594,7 @@ GEN_HANDLER2_E(trechkpt, "trechkpt", 0x1F, 0x0E, 0x1F,
0x03FFF800, \
};
#include "helper_regs.h"
+#include "spr_tcg.c.inc"
#include "translate_init.c.inc"
You probably just missed it here. Buried a bit in all the cod
This is a test. Please disregard
a_write, 0, initial_value)
> > > +
> > > +#define spr_register_hv(env, num, name, uea_read, uea_write,
> > > \
> > > +oea_read, oea_write, hea_read, hea_write,
> > > \
> > > +
e commit message
as well
I could also put it in translate.c, but whoever needs to refactor this code next
would have as big a headache as we're having now.
Bruno Piazera Larsen
Instituto de Pesquisas
ELDOR
5);
> > -printf("ERROR: try to access SPR %d !\n", sprn);
> > -#endif
> > -}
> > -#define SPR_NOACCESS (&spr_noaccess)
>
> What happens to code in translate.c that checks this? I don't t
ure, will do for v2.
> > +#if defined(PPC_DUMP_CPU)
>
> The commented out define for this was left behind.
Good catch! The define is going to still be used by a couple of things in
cpu_init, though.
I'm guessing moving to internal.h is the best solution, but correct me if I&
gt; This does not apply to master. You should say what the patch requirements
> are.
Oh, right, sorry! This patch series is based on my patch from April 14th,
subject:
[PATCH v3] target/ppc: code motion from translate_init.c.inc to gdbstub.c
Bruno Piazera Larsen
I
hat, I don't really see how we can support a !TCG build without
separating SPR, exactly because they are very fundamental to the processor.
Am I missing something? I fully expect to be, at this point, things are
turning out even more complicated than I expected
Bruno Piazera Larsen
cluded only with TCG, as a quick fix, but I would really
prefer some other solution if there is anything better. Any thoughts on this?
IIRC, this is the last thing holding me back from an RFC with this motion
patch
Bruno Piazera Larsen
Instituto de Pesquisas
ELDORADO<http://clickemailmkt.eldorado
ere (and if) spr_read_* exists or not.
Would this work?
Just ignoring the read and write functions means we still need
to compile them, or at least stub them, otherwise we'd get linker
problems. And ifdef'ing them out of the calls would be quite a
pain to understand the code
at will be worth the effort is completing the decodetree conversion so that
> the legacy decoder goes away entirely.
Yeah, I wanted to do that, but at this point I'm just following what the client
ordered. Maybe once we compile with tcg, it could be suggested, but I
wouldn't count on it
to move all of that to tanslate.c, but might be a lot.
>
> translate.c seems like a better place indeed.
ok. But is it worth doing for the first cut?
Also, looking now, I see definition for exception vectors and some
exception
tables for TCG, AFAICT. The better plan would
be to move all of that to tanslate.c, but might be a lot.
Can I follow the trivial plan for the first cut and leave a TODO in
the code for a better solution in the future? Or is there a nuance
about one of those functions that I have not understood?
mpile in the !tcg
build?
My best guess is to do it in cpu.c, as the other files compiled with the same
options are cpu-models.c and
gdbstub.c.
Bruno Piazera Larsen
Instituto de Pesquisas
ELDORADO<http://clickemailmkt.eldorado.org.br/ls/click?upn=UPoxpeIcHnAcbUZyo7TTaswyi
sx.xml", 0);
> > +}
> > +#ifndef CONFIG_USER_ONLY
> > +gdb_register_coprocessor(cs, gdb_get_spr_reg, gdb_set_spr_reg,
> > + pcc->gdb_num_sprs, "power-spr.xml", 0);
> > +#endif
> > +}
>
> Same here.
This
use
this strategy already), but at least we'd have consistent performance in case
some system doesn't use it
Bruno Piazera Larsen
Instituto de Pesquisas
ELDORADO<http://clickemailmkt.eldorado.org.br/ls/click?upn=UPoxpeIcHnAcbUZyo7TTaswyiVb1TXP3jEbQqiiJKKGsxOn8hBEs5ZsMLQfXkKuKXZ7M
it.c.inc file are still needed for the KVM-only builds, too. So
> maybe that's a good place to start as a first mini series.
Now that I know that translate doesn't mean "translating to TCG", this idea
makes more sense. My question is, is it a better option than the code motion
I
CC me explicitly on things you'd like me
> to review. I do scan the qemu-...@nongnu.org list, but it makes it
> easier for me to find (and less likely that I'll accidentally overlook it) if
> I'm also CCed directly
Will do! It was just my first time with send-email, I guess
wer is usually
"KVM handles it" so I never know if/when to call it
> Sounds fine so far.
Awesome! As the first contribution, I always feel like I'm missing something,
thanks for the help (:
Bruno Piazera Larsen
Instituto de Pesquisas
ELDORADO<http://clickemailmkt.eldo
,
timebase_helper.c);
* create a new one that holds stubs.
Does this sound about right? This is mostly guesswork based on how x86, s390x
and ARM are doing it.
Thank in advance
Bruno Piazera Larsen
Instituto de Pesquisas
ELDORADO<http://clickemailmkt.eldor
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