le modern mode
>>>
>>> On 2024/7/19 10:47, Duan, Zhenzhong wrote:
>>>>
>>>>> -Original Message-
>>>>> From: CLEMENT MATHIEU--DRIF
>>>>> Subject: Re: [PATCH v1 03/17] intel_iommu: Add a placeholder variable
>>
On 19/07/2024 04:53, Duan, Zhenzhong wrote:
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>
>> -Original Message-
>> From: CLEMENT MATHIEU--DRIF
>>
On 19/07/2024 04:47, Duan, Zhenzhong wrote:
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>
>> -Original Message-
>> From: CLEMENT MATHIEU--DRIF
>>
On 18/07/2024 10:16, Zhenzhong Duan wrote:
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>
> From: Yi Liu
>
> Intel VT-d 3.0 introduces scalable mode, and it has a bunch of capabilities
>
Reviewed-by: Clément Mathieu--Drif
On 18/07/2024 10:16, Zhenzhong Duan wrote:
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> According to VTD spec, stage-1 page table could support 4-level
Reviewed-by: Clément Mathieu--Drif
On 18/07/2024 10:16, Zhenzhong Duan wrote:
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> When guest configures Nested Translation(011b) or First-stage
On 18/07/2024 10:16, Zhenzhong Duan wrote:
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>
> Add an new element scalable_mode in IntelIOMMUState to mark scalable
> modern mode, this element
On 18/07/2024 01:44, Minwoo Im wrote:
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On 24-07-11 19:00:58, CLEMENT MATHIEU--DRIF wrote:
On 11/07/2024 10:04, Minwoo Im wrote:
Caution
Hi Michael, Yi and Jason
Thanks for your feedback on the previous versions.
If you agree with the series, do you think we can move forward?
Thanks!
>cmd
On 09/07/2024 16:26, CLEMENT MATHIEU--DRIF wrote:
> From: Clément Mathieu--Drif
>
> Various fixes for VT-d
>
> This ser
On 11/07/2024 10:04, Minwoo Im wrote:
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>
> On 24-07-10 05:17:42, CLEMENT MATHIEU--DRIF wrote:
>>
>> On 09/07/
On 09/07/2024 23:17, Minwoo Im wrote:
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> On 24-07-09 11:58:53, CLEMENT MATHIEU--DRIF wrote:
>>
>> On 09/07/
On 09/07/2024 16:01, Yi Liu wrote:
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> On 2024/7/9 14:18, CLEMENT MATHIEU--DRIF wrote:
>> From: Clément Mathieu-
From: Clément Mathieu--Drif
The 'level' field in vtd_iotlb_key is an unsigned integer.
We don't need to store level as an int in vtd_lookup_iotlb.
This is not an issue by itself, but using unsigned here seems cleaner.
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Yi Liu
---
From: Clément Mathieu--Drif
Per the below code, it can overflow as am can be larger than 8 according
to the CH 6.5.2.3 IOTLB Invalidate. Use uint64_t to avoid overflows.
Fixes: b5a280c00840 ("intel-iommu: add IOTLB using hash table")
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Minwoo Im
From: Clément Mathieu--Drif
These 2 macros are for high 64-bit of the FRCD registers.
Declarations have to be moved accordingly.
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Minwoo Im
Reviewed-by: Yi Liu
---
hw/i386/intel_iommu_internal.h | 4 ++--
1 file changed, 2 insertions(+), 2
From: Clément Mathieu--Drif
Various fixes for VT-d
This series contains fixes that will be necessary
when adding in-guest (fully emulated) SVM support.
v7
intel_iommu: fix type of the mask field in VTDIOTLBPageInvInfo:
- Edit commit message
v6
intel_iommu: fix type of the mask
From: Clément Mathieu--Drif
The constant must be unsigned, otherwise the two's complement
overrides the other fields when a PASID is present.
Fixes: 1b2b12376c8a ("intel-iommu: PASID support")
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Yi Liu
Reviewed-by: Zhenzhong Duan
Reviewed-by:
On 09/07/2024 16:01, Yi Liu wrote:
> Caution: External email. Do not open attachments or click links,
> unless this email comes from a known sender and you know the content
> is safe.
>
>
> On 2024/7/9 14:18, CLEMENT MATHIEU--DRIF wrote:
>> From: Clément Mathieu-
On 09/07/2024 12:15, Minwoo Im wrote:
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> email comes from a known sender and you know the content is safe.
>
>
> On 24-07-02 05:52:45, CLEMENT MATHIEU--DRIF wrote:
>> From: Clément Mathieu
From: Clément Mathieu--Drif
The constant must be unsigned, otherwise the two's complement
overrides the other fields when a PASID is present.
Fixes: 1b2b12376c8a ("intel-iommu: PASID support")
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Yi Liu
Reviewed-by: Zhenzhong Duan
Reviewed-by:
From: Clément Mathieu--Drif
The 'level' field in vtd_iotlb_key is an unsigned integer.
We don't need to store level as an int in vtd_lookup_iotlb.
This is not an issue by itself, but using unsigned here seems cleaner.
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Yi Liu
---
From: Clément Mathieu--Drif
These 2 macros are for high 64-bit of the FRCD registers.
Declarations have to be moved accordingly.
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Minwoo Im
---
hw/i386/intel_iommu_internal.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
From: Clément Mathieu--Drif
The mask we are trying to store into VTDIOTLBPageInvInfo.mask might not
fit in an uint8_t. Use uint64_t to avoid overflows.
Per the below code, it can overflow as am can be larger than 8 according
to the CH 6.5.2.3 IOTLB Invalidate. And you may want a fix tag as
From: Clément Mathieu--Drif
Various fixes for VT-d
This series contains fixes that will be necessary
when adding in-guest (fully emulated) SVM support.
v6
intel_iommu: fix type of the mask field in VTDIOTLBPageInvInfo:
- Add 'Fixes' tag
v5
intel_iommu: fix FRCD construction
Hi
On 08/07/2024 12:08, Yuke Peng wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> According to Intel VT-d specification 5.1.4, CFI must be blocked when
> Extended Interrupt Mode is
From: Clément Mathieu--Drif
The mask we are trying to store into VTDIOTLBPageInvInfo.mask might not
fit in an uint8_t. Use uint64_t to avoid overflows.
Per the below code, it can overflow as am can be larger than 8 according
to the CH 6.5.2.3 IOTLB Invalidate. And you may want a fix tag as
From: Clément Mathieu--Drif
These 2 macros are for high 64-bit of the FRCD registers.
Declarations have to be moved accordingly.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu_internal.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
From: Clément Mathieu--Drif
The 'level' field in vtd_iotlb_key is an unsigned integer.
We don't need to store level as an int in vtd_lookup_iotlb.
This is not an issue by itself, but using unsigned here seems cleaner.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 2 +-
1
From: Clément Mathieu--Drif
The constant must be unsigned, otherwise the two's complement
overrides the other fields when a PASID is present.
Fixes: 1b2b12376c8a ("intel-iommu: PASID support")
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Yi Liu
Reviewed-by: Zhenzhong Duan
---
From: Clément Mathieu--Drif
Various fixes for VT-d
This series contains fixes that will be necessary
when adding in-guest (fully emulated) SVM support.
v5
intel_iommu: fix FRCD construction macro:
- Remove empty line after 'Fixes'
intel_iommu: fix type of the mask field in
From: Clément Mathieu--Drif
The 'level' field in vtd_iotlb_key is an unsigned integer.
We don't need to store level as an int in vtd_lookup_iotlb.
This is not an issue by itself, but using unsigned here seems cleaner.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 2 +-
1
From: Clément Mathieu--Drif
Various fixes for VT-d
This series contains fixes that will be necessary
when adding in-guest (fully emulated) SVM support.
v4
- Move declarations of VTD_FRCD_PV and VTD_FRCD_PP
- intel_iommu: make types match:
- edit commit message to explain that
From: Clément Mathieu--Drif
These 2 macros are for high 64-bit of the FRCD registers.
Declarations have to be moved accordingly.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu_internal.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
From: Clément Mathieu--Drif
The constant must be unsigned, otherwise the two's complement
overrides the other fields when a PASID is present.
Fixes: 1b2b12376c8a ("intel-iommu: PASID support")
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Yi Liu
Reviewed-by: Zhenzhong Duan
---
From: Clément Mathieu--Drif
The mask we are trying to store into VTDIOTLBPageInvInfo.mask might not
fit in an uint8_t. Use uint64_t to avoid overflows
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu_internal.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 05/07/2024 10:51, Michael S. Tsirkin wrote:
Caution: External email. Do not open attachments or click links, unless this
email comes from a known sender and you know the content is safe.
On Fri, Jul 05, 2024 at 05:03:17AM +, CLEMENT MATHIEU--DRIF wrote:
From: Clément Mathieu--Drif
On 05/07/2024 10:51, Duan, Zhenzhong wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
>> -Original Message-
>> From: CLEMENT MATHIEU--DRIF
>> Subje
On 05/07/2024 05:03, Yi Liu wrote:
> Caution: External email. Do not open attachments or click links,
> unless this email comes from a known sender and you know the content
> is safe.
>
>
> On 2024/5/30 20:24, CLEMENT MATHIEU--DRIF wrote:
>> This series belongs to a lis
From: Clément Mathieu--Drif
VTDIOTLBPageInvInfo.mask might not fit in an uint8_t.
Moreover, this field is used in binary operations with 64-bit addresses.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu_internal.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Clément Mathieu--Drif
Various fixes for VT-d
This series contains fixes that will be necessary
when adding in-guest (fully emulated) SVM support.
v3
FRCD construction macro :
- Longer sha1 for the 'Fixes' tag
- Add '.' at the end of the sentence
Make types
From: Clément Mathieu--Drif
The constant must be unsigned, otherwise the two's complement
overrides the other fields when a PASID is present.
Fixes: 1b2b12376c8a ("intel-iommu: PASID support")
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Yi Liu
---
hw/i386/intel_iommu_internal.h | 2 +-
From: Clément Mathieu--Drif
The 'level' field in vtd_iotlb_key is an unsigned integer.
We don't need to store level as an int in vtd_lookup_iotlb.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Clément Mathieu--Drif
wait_desc with SW=0,IF=0,FN=1 must not be considered as an
invalid descriptor as it is used to implement section 7.10 of
the VT-d spec
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
From: Clément Mathieu--Drif
The 'level' field in vtd_iotlb_key is an unsigned integer.
We don't need to store level as an int in vtd_lookup_iotlb.
VTDIOTLBPageInvInfo.mask is used in binary operations with addresses.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 2
From: Clément Mathieu--Drif
Various fixes for VT-d
This series contains fixes that will be necessary
when adding in-guest (fully emulated) SVM support.
v2
Make commit author consistent
Clément Mathieu--Drif (3):
intel_iommu: fix FRCD construction macro.
intel_iommu: make types match
From: Clément Mathieu--Drif
The constant must be unsigned, otherwise the two's complement
overrides the other fields when a PASID is present
Fixes: 1b2b12376c ("intel-iommu: PASID support")
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Yi Liu
---
hw/i386/intel_iommu_internal.h | 2 +-
1
From: Michael S. Tsirkin
Sent: 04 July 2024 08:24
To: CLEMENT MATHIEU--DRIF
Cc: qemu-devel@nongnu.org ; jasow...@redhat.com
; zhenzhong.d...@intel.com ;
kevin.t...@intel.com ; yi.l@intel.com
; joao.m.mart...@oracle.com ;
pet...@redhat.com
Subject: Re
From: Clement Mathieu--Drif
wait_desc with SW=0,IF=0,FN=1 must not be considered as an
invalid descriptor as it is used to implement section 7.10 of
the VT-d spec
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/i386
From: Clement Mathieu--Drif
The 'level' field in vtd_iotlb_key is an unsigned integer.
We don't need to store level as an int in vtd_lookup_iotlb.
VTDIOTLBPageInvInfo.mask is used in binary operations with addresses.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 2
From: Clément Mathieu--Drif
The constant must be unsigned, otherwise the two's complement
overrides the other fields when a PASID is present
Fixes: 1b2b12376c ("intel-iommu: PASID support")
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Yi Liu
---
hw/i386/intel_iommu_internal.h | 2 +-
1
From: Clement Mathieu--Drif
Various fixes for VT-d
This series contains fixes that will be necessary
when adding in-guest (fully emulated) SVM support.
Clement Mathieu--Drif (2):
intel_iommu: make types match
intel_iommu: Bypass barrier wait descriptor
Clément Mathieu--Drif (1
cover-letter would be helpful.
Ok, I will elaborate
>
> On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
>> From: Clement Mathieu--Drif
>>
>> This series belongs to a list of series that add SVM support for VT-d.
>>
>> As a starting point, we use the series
On 03/07/2024 14:14, Yi Liu wrote:
> Caution: External email. Do not open attachments or click links,
> unless this email comes from a known sender and you know the content
> is safe.
>
>
> On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
>> From: Clément Mathieu
On 03/07/2024 14:04, Yi Liu wrote:
> Caution: External email. Do not open attachments or click links,
> unless this email comes from a known sender and you know the content
> is safe.
>
>
> On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
>> From: Clément Mathieu
On 03/07/2024 09:29, Yi Liu wrote:
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> unless this email comes from a known sender and you know the content
> is safe.
>
>
> On 2024/7/2 23:29, CLEMENT MATHIEU--DRIF wrote:
>>
>> On 02/07/2024 15
On 03/07/2024 13:59, Yi Liu wrote:
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> unless this email comes from a known sender and you know the content
> is safe.
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>
> On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
>> From: Clément Mat
On 02/07/2024 15:33, Yi Liu wrote:
> Caution: External email. Do not open attachments or click links,
> unless this email comes from a known sender and you know the content
> is safe.
>
>
> On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
>> From: Clément Mathieu
M +0000, CLEMENT MATHIEU--DRIF wrote:
>>>
>>>
>>> ━━━
>>>
>>> From: Michael S. Tsirkin
>>> Sent: 01 July 2024 22:02
>>> To: CLEMENT MATHIEU--DRIF
>>>
On 02/07/2024 15:44, Yi Liu wrote:
> Caution: External email. Do not open attachments or click links,
> unless this email comes from a known sender and you know the content
> is safe.
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>
> On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
>> From: Clement Mathieu--Drif
&
On 02/07/2024 15:01, Yi Liu wrote:
> Caution: External email. Do not open attachments or click links,
> unless this email comes from a known sender and you know the content
> is safe.
>
>
> On 2024/7/2 13:52, CLEMENT MATHIEU--DRIF wrote:
>> From: Clément Mathieu--Drif
On 02/07/2024 14:16, Michael S. Tsirkin wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> On Tue, Jul 02, 2024 at 05:52:29AM +, CLEMENT MATHIEU--DRIF wrote:
>>
From: Michael S. Tsirkin
Sent: 01 July 2024 22:02
To: CLEMENT MATHIEU--DRIF
Cc: qemu-devel@nongnu.org ; jasow...@redhat.com
; zhenzhong.d...@intel.com ;
kevin.t...@intel.com ; yi.l@intel.com
; joao.m.mart...@oracle.com ;
pet...@redhat.com
Subject: Re
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/pci/pci.c| 24 ++--
include/hw/pci/pci_device.h | 1 +
2 files changed, 15 insertions(+), 10 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index c8a8aab306..51feede3cf 100644
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/pci/pcie.c | 24 +++
include/hw/pci/pcie.h | 6 +-
include/hw/pci/pcie_regs.h| 3 +++
include/standard-headers/linux/pci_regs.h | 1
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 2 +-
hw/i386/intel_iommu_internal.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 71cebe2fd3..2a78fc823f 100644
---
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index e047d2ca83..2e4f535dd1 100644
--- a/hw/i386/intel_iommu.c
+++
From: Clément Mathieu--Drif
IOMMU have to implement iommu_ats_request_translation to support ATS.
Devices can use IOMMU_TLB_ENTRY_TRANSLATION_ERROR to check the tlb
entries returned by a translation request.
Signed-off-by: Clément Mathieu--Drif
---
include/exec/memory.h | 26
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 13 ++---
include/hw/i386/intel_iommu.h | 2 +-
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index
From: Clément Mathieu--Drif
ats_enabled and pasid_enabled check whether the capabilities are
present or not. If so, we read the configuration space to get
the status of the feature (enabled or not).
Signed-off-by: Clément Mathieu--Drif
---
hw/pci/pcie.c | 18 ++
From: Clément Mathieu--Drif
This will help developers of svm devices to track a state
Signed-off-by: Clément Mathieu--Drif
---
include/exec/memory.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index aa8e114e77..bf91c4bed7 100644
---
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
tests/unit/meson.build | 1 +
tests/unit/test-atc.c | 527 +
2 files changed, 528 insertions(+)
create mode 100644 tests/unit/test-atc.c
diff --git a/tests/unit/meson.build
From: Clément Mathieu--Drif
As the SVM-capable devices will need to cache translations, we provide
an first implementation.
This cache uses a two-level design based on hash tables.
The first level is indexed by a PASID and the second by a virtual addresse.
Signed-off-by: Clément Mathieu--Drif
From: Clément Mathieu--Drif
We add a convenient way to initialize an device-iotlb notifier.
This is meant to be used by ATS-capable devices.
pci_device_iommu_memory_region_pasid is introduces in this commit and
will be used in several other SVM-related functions exposed in
the PCI API.
From: Clément Mathieu--Drif
Implements the behavior defined in section 10.2.3.5 of PCIe spec rev 5.
This is needed by devices that support ATS.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Zhenzhong Duan
---
hw/i386/intel_iommu.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 98996ededc..71cebe2fd3 100644
--- a/hw/i386/intel_iommu.c
+++
From: Clément Mathieu--Drif
Devices implementing ATS can send translation requests using
pci_ats_request_translation_pasid.
The invalidation events are sent back to the device using the iommu
notifier managed with pci_register_iommu_tlb_event_notifier and
pci_unregister_iommu_tlb_event_notifier
From: Clément Mathieu--Drif
This will be useful for devices that support ATS
Signed-off-by: Clément Mathieu--Drif
---
include/exec/memory.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index bf91c4bed7..003ee06610 100644
---
From: Clément Mathieu--Drif
This will be necessary for devices implementing ATS.
We also define a new macro IOMMU_ACCESS_FLAG_FULL in addition to
IOMMU_ACCESS_FLAG to support more access flags.
IOMMU_ACCESS_FLAG is kept for convenience and backward compatibility.
Here are the flags added
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/pci/pci.c | 19 +++
include/hw/pci/pci.h | 34 ++
2 files changed, 53 insertions(+)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 51feede3cf..3fe47d4002 100644
---
From: Clément Mathieu--Drif
The 'level' field in vtd_iotlb_key is an unsigned integer.
We don't need to store level as an int in vtd_lookup_iotlb.
VTDIOTLBPageInvInfo.mask is used in binary operations with addresses.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 2
From: Clément Mathieu--Drif
The constant must be unsigned, otherwise the two's complement
overrides the other fields when a PASID is present
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu_internal.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 75 --
hw/i386/intel_iommu_internal.h | 1 +
2 files changed, 73 insertions(+), 3 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 2e4f535dd1..f77972130f 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@
From: Clement Mathieu--Drif
This series belongs to a list of series that add SVM support for VT-d.
As a starting point, we use the series called 'intel_iommu: Enable stage-1
translation' (rfc2) by Zhenzhong Duan and Yi Liu.
Here we focus on the implementation of ATS support in the IOMMU
From: Clément Mathieu--Drif
We use this information in vtd_do_iommu_translate to populate the
IOMMUTLBEntry and indicate the correct page mask. This prevents ATS
devices from sending many useless translation requests when a megapage
or gigapage iova is not mapped to a physical address.
Hi,
Just adding Michael in Cc:
Thanks
>cmd
On 30/05/2024 14:24, CLEMENT MATHIEU--DRIF wrote:
> This series belongs to a list of series that add SVM support for VT-d.
>
> Here we focus on the implementation of PRI support in the IOMMU and on a
> PCI-level
> API for PRI to
On 03/06/2024 08:10, Zhenzhong Duan wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> From: Yi Liu
>
> Implement [set|unset]_iommu_device() callbacks in Intel vIOMMU.
> In set call, a
From: Clément Mathieu--Drif
The 'level' field in vtd_iotlb_key is an unsigned integer.
We don't need to store level as an int in vtd_lookup_iotlb.
VTDIOTLBPageInvInfo.mask is used in binary operations with addresses.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 2
From: Clément Mathieu--Drif
As the SVM-capable devices will need to cache translations, we provide
an first implementation.
This cache uses a two-level design based on hash tables.
The first level is indexed by a PASID and the second by a virtual addresse.
Signed-off-by: Clément Mathieu--Drif
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/pci/pci.c| 24 ++--
include/hw/pci/pci_device.h | 1 +
2 files changed, 15 insertions(+), 10 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index c8a8aab306..51feede3cf 100644
From: Clément Mathieu--Drif
This series belongs to a list of series that add SVM support for VT-d.
As a starting point, we use the series called 'intel_iommu: Enable stage-1
translation' (rfc2) by Zhenzhong Duan and Yi Liu.
Here we focus on the implementation of ATS support in the IOMMU and
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 6a68df0154..d607562de2 100644
--- a/hw/i386/intel_iommu.c
+++
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 13 ++---
include/hw/i386/intel_iommu.h | 2 +-
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 2 +-
hw/i386/intel_iommu_internal.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 7b0c22fc07..fb6c7d1e33 100644
---
From: Clément Mathieu--Drif
Devices implementing ATS can send translation requests using
pci_ats_request_translation_pasid.
The invalidation events are sent back to the device using the iommu
notifier managed with pci_register_iommu_tlb_event_notifier and
pci_unregister_iommu_tlb_event_notifier
From: Clément Mathieu--Drif
This will be useful for devices that support ATS
Signed-off-by: Clément Mathieu--Drif
---
include/exec/memory.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 359bca2ae2..56ef48780f 100644
---
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
tests/unit/meson.build | 1 +
tests/unit/test-atc.c | 527 +
2 files changed, 528 insertions(+)
create mode 100644 tests/unit/test-atc.c
diff --git a/tests/unit/meson.build
From: Clément Mathieu--Drif
ats_enabled and pasid_enabled check whether the capabilities are
present or not. If so, we read the configuration space to get
the status of the feature (enabled or not).
Signed-off-by: Clément Mathieu--Drif
---
hw/pci/pcie.c | 18 ++
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index d607562de2..0f3bd5978e 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@
From: Clément Mathieu--Drif
Signed-off-by: Clément Mathieu--Drif
---
hw/pci/pcie.c | 24 +++
include/hw/pci/pcie.h | 6 +-
include/hw/pci/pcie_regs.h| 3 +++
include/standard-headers/linux/pci_regs.h | 1
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