On Mon, Sep 9, 2024 at 2:56 AM Kevin Wolf wrote:
>
> Am 09.09.2024 um 03:58 hat Joelle van Dyne geschrieben:
> > New optional argument for 'blockdev-change-medium' QAPI command to allow
> > the caller to specify if they wish to enable file locking.
> >
> &g
On Mon, Sep 9, 2024 at 12:36 AM Akihiko Odaki wrote:
>
> On 2024/09/09 10:58, Joelle van Dyne wrote:
> > New optional argument for 'blockdev-change-medium' QAPI command to allow
> > the caller to specify if they wish to enable file locking.
> >
New optional argument for 'blockdev-change-medium' QAPI command to allow
the caller to specify if they wish to enable file locking.
Signed-off-by: Joelle van Dyne
---
qapi/block.json| 23 ++-
block/monitor/block-hmp-cmds.c | 2 +-
block/qap
On Fri, Nov 24, 2023 at 8:26 AM Stefan Berger wrote:
>
>
>
> On 11/24/23 11:21, Joelle van Dyne wrote:
> > On Fri, Nov 24, 2023 at 8:17 AM Stefan Berger wrote:
> >>
> >>
> >>
> >> On 11/23/23 19:56, Joelle van Dyne wrote:
> >&g
On Fri, Nov 24, 2023 at 8:17 AM Stefan Berger wrote:
>
>
>
> On 11/23/23 19:56, Joelle van Dyne wrote:
> > On Tue, Nov 14, 2023 at 4:12 PM Stefan Berger wrote:
> >>
> >>
> >>
> >> On 11/14/23 16:05, Stefan Berger wrote:
&g
On Tue, Nov 14, 2023 at 4:12 PM Stefan Berger wrote:
>
>
>
> On 11/14/23 16:05, Stefan Berger wrote:
> >
> >
> > On 11/14/23 13:03, Stefan Berger wrote:
> >>
> >>
> >> On 11/14/23 04:36, Marc-André Lureau wrote:
> >>>
On Tue, Nov 14, 2023 at 8:44 AM Stefan Berger wrote:
>
>
>
> On 11/14/23 11:37, Stefan Berger wrote:
> >
> >
> > On 11/13/23 21:09, Joelle van Dyne wrote:
> >> This logic is similar to TPM TIS ISA device. Since TPM CRB can only
> >> suppor
On Tue, Nov 14, 2023 at 1:38 AM Marc-André Lureau
wrote:
>
> Hi
>
> On Tue, Nov 14, 2023 at 6:10 AM Joelle van Dyne wrote:
> >
> > The impetus for this patch set is to get TPM 2.0 working on Windows 11
> > ARM64.
> > Windows' tpm.sys does not seem to w
TPM needs to know its own base address in order to generate its DSDT
device entry.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
include/sysemu/tpm.h | 4
hw/tpm/tpm-sysbus.c | 47
hw/tpm/meson.build | 1 +
3 files changed
``
$ swtpm \
--ctrl type=unixio,path=tpm.sock,terminate \
--tpmstate backend-uri=file://tpm.data \
--tpm2
```
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
docs/specs/tpm.rst | 1 +
include/sysemu/tpm.h| 3 +
hw/acpi/aml-build.c | 7 +-
hw/arm/virt.c
to worry about updating it for
reads.
In order to maintain migration compatibility with older versions of
QEMU, we store a copy of the register data and command data which is
used only during save/restore.
Signed-off-by: Joelle van Dyne
---
hw/tpm/tpm_crb.h| 5 +-
hw/tpm/tpm_crb.c
address so this
was not an issue. However, once we support SysBus CRB device, the
address can be anywhere in 64-bit space.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
include/hw/acpi/tpm.h | 3 ++-
hw/tpm/tpm_crb_common.c| 3 ++-
tests/qtest/tpm-crb-test.c | 2 +-
tests
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
hw/loongarch/virt.c | 7 +++
hw/loongarch/Kconfig | 1 +
2 files changed, 8 insertions(+)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 4b7dc67a2d..feed0f8bbf 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch
Instead of calling `memory_region_add_subregion` directly, we defer to
the caller to do it. This allows us to re-use the code for a SysBus
device.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
hw/tpm/tpm_ppi.h| 10 +++---
hw/tpm/tpm_crb.c| 4 ++--
hw/tpm
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
tests/qtest/bios-tables-test.c | 43 --
1 file changed, 41 insertions(+), 2 deletions(-)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 71af5cf69f..bb4ebf00c1
In preparation for the SysBus variant, we move common code styled
after the TPM TIS devices.
To maintain compatibility, we do not rename the existing tpm-crb
device.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
docs/specs/tpm.rst | 1 +
hw/tpm/tpm_crb.h| 76
This logic is similar to TPM TIS ISA device. Since TPM CRB can only
support TPM 2.0 backends, we check for this in realize.
Signed-off-by: Joelle van Dyne
---
hw/tpm/tpm_crb.h| 2 ++
hw/i386/acpi-build.c| 16 +---
hw/tpm/tpm_crb.c| 16
hw/tpm
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
tests/qtest/bios-tables-test-allowed-diff.h | 4
tests/data/acpi/q35/DSDT.crb.tpm2 | 0
tests/data/acpi/q35/TPM2.crb.tpm2 | 0
tests/data/acpi/virt/DSDT.crb-device.tpm2 | 0
tests/data/acpi/virt/TPM2.crb
Signed-off-by: Joelle van Dyne
Tested-by: Stefan Berger
---
tests/qtest/bios-tables-test-allowed-diff.h | 4
tests/data/acpi/q35/DSDT.crb.tpm2 | Bin 0 -> 8355 bytes
tests/data/acpi/q35/TPM2.crb.tpm2 | Bin 0 -> 76 bytes
tests/data/acpi/virt/DSDT.crb-devic
- Factor out common test code from tpm-crb-test.c -> tpm-tests.c
- Store device addr in `tpm_device_base_addr` (unify with TIS tests)
- Add new tests for aarch64
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
tests/qtest/tpm-tests.h | 2 +
tests/qtest/
avoid any TPM
specific code in the ACPI table generation. However, currently we
still have to call `build_tpm2` anyways and it does not look like
most other ACPI devices support the `ACPI_DEV_AML_IF` interface.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
hw/arm/virt-acpi-build.c
s
saved separately instead of as a RAM block.
Joelle van Dyne (14):
tpm_crb: refactor common code
tpm_crb: CTRL_RSP_ADDR is 64-bits wide
tpm_ppi: refactor memory space initialization
tpm_crb: use a single read-as-mem/write-as-mmio mapping
tpm_crb: move ACPI table building to device interfac
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
hw/arm/virt.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 85e3c5ba9d..36e2506420 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -2811,6 +2811,13 @@ static void
On Wed, Nov 1, 2023 at 2:25 PM Stefan Berger wrote:
>
>
>
> On 10/31/23 00:00, Joelle van Dyne wrote:
> > On Apple Silicon, when Windows performs a LDP on the CRB MMIO space,
> > the exception is not decoded by hardware and we cannot trap the MMIO
> > read. This led
On Thu, Nov 2, 2023 at 11:50 AM Stefan Berger wrote:
>
>
>
> On 10/31/23 00:00, Joelle van Dyne wrote:
> > This logic is similar to TPM TIS ISA device. Since TPM CRB can only
> > support TPM 2.0 backends, we check for this in realize.
>
> The problem on x86_64 is
Signed-off-by: Joelle van Dyne
---
tests/qtest/bios-tables-test-allowed-diff.h | 4
tests/data/acpi/q35/DSDT.crb.tpm2 | Bin 0 -> 8355 bytes
tests/data/acpi/q35/TPM2.crb.tpm2 | Bin 0 -> 76 bytes
tests/data/acpi/virt/DSDT.crb-device.tpm2 | Bin 0 -> 5276 byt
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
hw/arm/virt.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 529f1c089c..f1a161b0ea 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -2806,6 +2806,13 @@ static void
In preparation for the SysBus variant, we move common code styled
after the TPM TIS devices.
To maintain compatibility, we do not rename the existing tpm-crb
device.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
docs/specs/tpm.rst | 1 +
hw/tpm/tpm_crb.h| 76
TPM needs to know its own base address in order to generate its DSDT
device entry.
Signed-off-by: Joelle van Dyne
---
include/sysemu/tpm.h | 4
hw/tpm/tpm-sysbus.c | 47
hw/tpm/meson.build | 1 +
3 files changed, 52 insertions(+)
create
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
hw/loongarch/virt.c | 7 +++
hw/loongarch/Kconfig | 1 +
2 files changed, 8 insertions(+)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 4b7dc67a2d..feed0f8bbf 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch
This logic is similar to TPM TIS ISA device. Since TPM CRB can only
support TPM 2.0 backends, we check for this in realize.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
hw/tpm/tpm_crb.h| 2 ++
hw/i386/acpi-build.c| 23 ---
hw/tpm/tpm_crb.c
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
tests/qtest/bios-tables-test-allowed-diff.h | 4
tests/data/acpi/q35/DSDT.crb.tpm2 | 0
tests/data/acpi/q35/TPM2.crb.tpm2 | 0
tests/data/acpi/virt/DSDT.crb-device.tpm2 | 0
tests/data/acpi/virt/TPM2.crb
1. This
shouldn't be an issue but we changed it back just in case.
- Added a patch to migrate saved VMstate from an older version with the regs
saved separately instead of as a RAM block.
Joelle van Dyne (14):
tpm_crb: refactor common code
tpm_crb: CTRL_RSP_ADDR is 64-bits wide
Instead of calling `memory_region_add_subregion` directly, we defer to
the caller to do it. This allows us to re-use the code for a SysBus
device.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
hw/tpm/tpm_ppi.h| 10 +++---
hw/tpm/tpm_crb.c| 4 ++--
hw/tpm
``
$ swtpm \
--ctrl type=unixio,path=tpm.sock,terminate \
--tpmstate backend-uri=file://tpm.data \
--tpm2
```
Signed-off-by: Joelle van Dyne
---
docs/specs/tpm.rst | 1 +
include/sysemu/tpm.h| 3 +
hw/acpi/aml-build.c | 7 +-
hw/arm/virt.c | 1 +
hw/core/sy
to worry about updating it for
reads.
In order to maintain migration compatibility with older versions of
QEMU, we store a copy of the register data and command data which is
used only during save/restore.
Signed-off-by: Joelle van Dyne
---
hw/tpm/tpm_crb.h| 5 +-
hw/tpm/tpm_crb.c
- Factor out common test code from tpm-crb-test.c -> tpm-tests.c
- Store device addr in `tpm_device_base_addr` (unify with TIS tests)
- Add new tests for aarch64
Signed-off-by: Joelle van Dyne
---
tests/qtest/tpm-tests.h | 2 +
tests/qtest/tpm-util.h |
address so this
was not an issue. However, once we support SysBus CRB device, the
address can be anywhere in 64-bit space.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
include/hw/acpi/tpm.h | 3 ++-
hw/tpm/tpm_crb_common.c| 3 ++-
tests/qtest/tpm-crb-test.c | 2 +-
tests
avoid any TPM
specific code in the ACPI table generation. However, currently we
still have to call `build_tpm2` anyways and it does not look like
most other ACPI devices support the `ACPI_DEV_AML_IF` interface.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
hw/arm/virt-acpi-build.c
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
tests/qtest/bios-tables-test.c | 43 --
1 file changed, 41 insertions(+), 2 deletions(-)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 9f4bc15aab..c63bad0205
>
> > On 10/29/23 02:03, Joelle van Dyne wrote:
> >> Signed-off-by: Joelle van Dyne
> >
> > I see this error here with the test cases:
> >
> >
> > | 364/377 ERROR:../tests/qtest/bios-tables-test.c:535:test_acpi_asl:
> > assertion failed: (all_t
On Mon, Oct 30, 2023 at 2:09 PM Stefan Berger wrote:
>
>
> On 10/29/23 02:03, Joelle van Dyne wrote:
> > This SysBus variant of the CRB interface supports dynamically locating
> > the MMIO interface so that Virt machines can use it. This interface
> > is currently the
M Stefan Berger wrote:
>
>
> On 10/29/23 02:03, Joelle van Dyne wrote:
> > TPM needs to know its own base address in order to generate its DSDT
> > device entry.
> >
> > Signed-off-by: Joelle van Dyne
> > ---
> > in
Signed-off-by: Joelle van Dyne
---
hw/loongarch/virt.c | 7 +++
hw/loongarch/Kconfig | 1 +
2 files changed, 8 insertions(+)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 4b7dc67a2d..feed0f8bbf 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -1004,6 +1004,13
to worry about updating it for
reads.
In order to maintain migration compatibility with older versions of
QEMU, we store a copy of the register data and command data which is
used only during save/restore.
Signed-off-by: Joelle van Dyne
---
hw/tpm/tpm_crb.h| 5 +-
hw/tpm/tpm_crb.c
``
$ swtpm \
--ctrl type=unixio,path=tpm.sock,terminate \
--tpmstate backend-uri=file://tpm.data \
--tpm2
```
Signed-off-by: Joelle van Dyne
---
docs/specs/tpm.rst | 1 +
include/sysemu/tpm.h| 3 +
hw/acpi/aml-build.c | 7 +-
hw/arm/virt.c | 1 +
hw/core/sy
- Factor out common test code from tpm-crb-test.c -> tpm-tests.c
- Store device addr in `tpm_device_base_addr` (unify with TIS tests)
- Add new tests for aarch64
Signed-off-by: Joelle van Dyne
---
tests/qtest/tpm-tests.h | 2 +
tests/qtest/tpm-util.h |
Signed-off-by: Joelle van Dyne
---
tests/qtest/bios-tables-test-allowed-diff.h | 4
tests/data/acpi/q35/DSDT.crb.tpm2 | Bin 0 -> 8981 bytes
tests/data/acpi/q35/TPM2.crb.tpm2 | Bin 0 -> 76 bytes
tests/data/acpi/virt/DSDT.crb-device.tpm2 | Bin 0 -> 5276 byt
address so this
was not an issue. However, once we support SysBus CRB device, the
address can be anywhere in 64-bit space.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
include/hw/acpi/tpm.h | 3 ++-
hw/tpm/tpm_crb_common.c| 3 ++-
tests/qtest/tpm-crb-test.c | 2 +-
tests
n issue but we changed it back just in case.
- Added a patch to migrate saved VMstate from an older version with the regs
saved separately instead of as a RAM block.
Joelle van Dyne (14):
tpm_crb: refactor common code
tpm_crb: CTRL_RSP_ADDR is 64-bits wide
tpm_ppi: refactor memory space i
Signed-off-by: Joelle van Dyne
---
tests/qtest/bios-tables-test-allowed-diff.h | 4
tests/data/acpi/q35/DSDT.crb.tpm2 | 0
tests/data/acpi/q35/TPM2.crb.tpm2 | 0
tests/data/acpi/virt/DSDT.crb-device.tpm2 | 0
tests/data/acpi/virt/TPM2.crb-device.tpm2 | 0
5 files
avoid any TPM
specific code in the ACPI table generation. However, currently we
still have to call `build_tpm2` anyways and it does not look like
most other ACPI devices support the `ACPI_DEV_AML_IF` interface.
Signed-off-by: Joelle van Dyne
---
hw/arm/virt-acpi-build.c | 38
In preparation for the SysBus variant, we move common code styled
after the TPM TIS devices.
To maintain compatibility, we do not rename the existing tpm-crb
device.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
docs/specs/tpm.rst | 1 +
hw/tpm/tpm_crb.h| 76
This logic is similar to TPM TIS ISA device. Since TPM CRB can only
support TPM 2.0 backends, we check for this in realize.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
hw/tpm/tpm_crb.h| 2 ++
hw/i386/acpi-build.c| 23 ---
hw/tpm/tpm_crb.c
Instead of calling `memory_region_add_subregion` directly, we defer to
the caller to do it. This allows us to re-use the code for a SysBus
device.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
hw/tpm/tpm_ppi.h| 10 +++---
hw/tpm/tpm_crb.c| 4 ++--
hw/tpm
TPM needs to know its own base address in order to generate its DSDT
device entry.
Signed-off-by: Joelle van Dyne
---
include/sysemu/tpm.h | 4
hw/tpm/tpm-sysbus.c | 33 +
hw/tpm/meson.build | 1 +
3 files changed, 38 insertions(+)
create mode 100644
Signed-off-by: Joelle van Dyne
---
hw/arm/virt.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 529f1c089c..f1a161b0ea 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -2806,6 +2806,13 @@ static void virt_machine_device_plug_cb(HotplugHandler
Signed-off-by: Joelle van Dyne
---
tests/qtest/bios-tables-test.c | 43 --
1 file changed, 41 insertions(+), 2 deletions(-)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 9f4bc15aab..c63bad0205 100644
--- a/tests/qtest/bios
On Mon, Jul 17, 2023 at 7:23 AM Igor Mammedov wrote:
>
> On Fri, 14 Jul 2023 00:09:26 -0700
> Joelle van Dyne wrote:
>
> > This SysBus variant of the CRB interface supports dynamically locating
> > the MMIO interface so that Virt machines can use it. This interface
>
On Mon, Jul 17, 2023 at 6:42 AM Igor Mammedov wrote:
>
> On Fri, 14 Jul 2023 13:21:33 -0400
> Stefan Berger wrote:
>
> > On 7/14/23 03:09, Joelle van Dyne wrote:
> > > This logic is similar to TPM TIS ISA device. Since TPM CRB can only
> > > support TPM 2.0 ba
On Tue, Jul 18, 2023 at 7:16 AM Stefan Berger wrote:
>
>
>
> On 7/17/23 09:46, Igor Mammedov wrote:
> > On Fri, 14 Jul 2023 00:09:21 -0700
> > Joelle van Dyne wrote:
> >
> >> Since this device is gated to only build for targets with the PC
> >> co
On Fri, Jul 14, 2023 at 12:12 PM Stefan Berger wrote:
>
>
>
> On 7/14/23 14:49, Joelle van Dyne wrote:
> > On Fri, Jul 14, 2023 at 11:41 AM Stefan Berger
> > wrote:
> >>
> >>
> >>
> >> On 7/14/23 14:22, Stefan Berger wrote:
> >
On Fri, Jul 14, 2023 at 11:41 AM Stefan Berger wrote:
>
>
>
> On 7/14/23 14:22, Stefan Berger wrote:
> > On 7/14/23 13:04, Joelle van Dyne wrote:
> >> On Fri, Jul 14, 2023 at 7:51 AM Stefan Berger
> >> wrote:
> >>>
> >>>
> >>&
On Fri, Jul 14, 2023 at 11:01 AM Stefan Berger wrote:
>
>
>
> On 7/14/23 13:46, Joelle van Dyne wrote:
> > On Fri, Jul 14, 2023 at 10:43 AM Stefan Berger
> > wrote:
> >>
> >>
> >>
> >> On 7/14/23 13:39, Joelle van Dyne wrote:
> &
On Fri, Jul 14, 2023 at 10:43 AM Stefan Berger wrote:
>
>
>
> On 7/14/23 13:39, Joelle van Dyne wrote:
> > On Fri, Jul 14, 2023 at 10:37 AM Stefan Berger
> > wrote:
> >>
> >>
> >>
> >> On 7/14/23 13:29, Joelle van Dyne wrote:
>
On Fri, Jul 14, 2023 at 10:37 AM Stefan Berger wrote:
>
>
>
> On 7/14/23 13:29, Joelle van Dyne wrote:
> > On Fri, Jul 14, 2023 at 9:19 AM Stefan Berger wrote:
> >>
> >>
> >>
> >>
> >> I don't know whether we would want mu
On Fri, Jul 14, 2023 at 4:57 AM Stefan Berger wrote:
>
>
>
> On 7/14/23 06:05, Peter Maydell wrote:
> > On Thu, 13 Jul 2023 at 19:43, Stefan Berger wrote:
> >>
> >>
> >>
> >> On 7/13/23 13:18, Peter Maydell wrote:
> >>> On Thu, 13 Jul 2023 at 18:16, Stefan Berger wrote:
> I guess the first
On Fri, Jul 14, 2023 at 9:19 AM Stefan Berger wrote:
>
>
>
>
> I don't know whether we would want multiple devices. tpm_find() usage is
> certainly not prepared for multiple devices.
Sorry, "multiple TPM interfaces" here does not mean "at the same
time". Will clarify the description.
>
>
> Good
On Fri, Jul 14, 2023 at 7:27 AM Stefan Berger wrote:
>
>
>
> On 7/14/23 03:09, Joelle van Dyne wrote:
> > This SysBus variant of the CRB interface supports dynamically locating
> > the MMIO interface so that Virt machines can use it. This interface
> > is currently
On Fri, Jul 14, 2023 at 5:11 AM Stefan Berger wrote:
>
>
>
> On 7/14/23 03:09, Joelle van Dyne wrote:
> > TPM needs to know its own base address in order to generate its DSDT
> > device entry.
> >
> > Signed-off-by: Joelle van Dy
On Fri, Jul 14, 2023 at 7:51 AM Stefan Berger wrote:
>
>
>
> On 7/14/23 10:05, Stefan Berger wrote:
> >
> >
> > On 7/14/23 03:09, Joelle van Dyne wrote:
> >> When we moved to a single mapping and modified TPM CRB's VMState, it
> >> broke resto
in the ACPI table generation. However, currently we
still have to call `build_tpm2` anyways and it does not look like
most other ACPI devices support the `ACPI_DEV_AML_IF` interface.
Signed-off-by: Joelle van Dyne
---
hw/arm/virt-acpi-build.c | 38 ++
hw
TPM needs to know its own base address in order to generate its DSDT
device entry.
Signed-off-by: Joelle van Dyne
---
hw/loongarch/virt.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index e19b042ce8
TPM needs to know its own base address in order to generate its DSDT
device entry.
Signed-off-by: Joelle van Dyne
---
hw/arm/virt.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 7d9dbc2663..432148ef47 100644
--- a
When we moved to a single mapping and modified TPM CRB's VMState, it
broke restoring of VMs that were saved on an older version. This
change allows those VMs to gracefully migrate to the new memory
mapping.
Signed-off-by: Joelle van Dyne
---
hw/tpm/tpm_crb.h| 1 +
hw/tpm/tpm_
Instead of calling `memory_region_add_subregion` directly, we defer to
the caller to do it. This allows us to re-use the code for a SysBus
device.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
hw/tpm/tpm_ppi.h| 10 +++---
hw/tpm/tpm_crb.c| 4 ++--
hw/tpm
Since this device is gated to only build for targets with the PC
configuration, we should use the ISA bus like with TPM TIS.
Signed-off-by: Joelle van Dyne
---
hw/tpm/tpm_crb.c | 52
hw/tpm/Kconfig | 2 +-
2 files changed, 27 insertions(+), 27
\
--tpmstate backend-uri=file://tpm.data \
--tpm2
```
Signed-off-by: Joelle van Dyne
---
docs/specs/tpm.rst | 1 +
include/hw/acpi/aml-build.h | 1 +
include/sysemu/tpm.h| 3 +
hw/acpi/aml-build.c | 7 +-
hw/arm/virt.c | 1 +
hw/core/sysbus-fdt.c
address so this
was not an issue. However, once we support SysBus CRB device, the
address can be anywhere in 64-bit space.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
include/hw/acpi/tpm.h | 3 ++-
hw/tpm/tpm_crb_common.c| 3 ++-
tests/qtest/tpm-crb-test.c | 2 +-
tests
This logic is similar to TPM TIS ISA device. Since TPM CRB can only
support TPM 2.0 backends, we check for this in realize.
Signed-off-by: Joelle van Dyne
---
hw/i386/acpi-build.c | 23 ---
hw/tpm/tpm_crb.c | 29 +
2 files changed, 29
to worry about updating it for
reads.
Signed-off-by: Joelle van Dyne
---
hw/tpm/tpm_crb.h| 2 -
hw/tpm/tpm_crb.c| 3 -
hw/tpm/tpm_crb_common.c | 126 +---
3 files changed, 65 insertions(+), 66 deletions(-)
diff --git a/hw/tpm/tpm_crb.h b
In preparation for the SysBus variant, we move common code styled
after the TPM TIS devices.
To maintain compatibility, we do not rename the existing tpm-crb
device.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
docs/specs/tpm.rst | 1 +
hw/tpm/tpm_crb.h| 76
ACPI entry, we accidently changed _UID from 0 to 1. This
shouldn't be an issue but we changed it back just in case.
- Added a patch to migrate saved VMstate from an older version with the regs
saved separately instead of as a RAM block.
Joelle van Dyne (11):
tpm_crb: refactor common code
On Thu, Jul 13, 2023 at 11:07 PM Joelle van Dyne wrote:
>
> On Thu, Jul 13, 2023 at 10:20 AM Stefan Berger wrote:
> >
> > The ppi command line option for the TIS device on sysbus never worked
> > and caused an immediate segfault. Remove support for it since it also
On Thu, Jul 13, 2023 at 10:20 AM Stefan Berger wrote:
>
> The ppi command line option for the TIS device on sysbus never worked
> and caused an immediate segfault. Remove support for it since it also
> needs support in the firmware and needs testing inside the VM.
>
> Reproducer with the ppi=on op
On Thu, Jul 13, 2023 at 9:49 AM Stefan Berger wrote:
>
>
> The tpm-tis-device doesn't work for x86_64 but for aarch64.
>
>
> We have this here in this file:
>
> DEFINE_PROP_BOOL("ppi", TPMStateSysBus, state.ppi_enabled, false),
>
> I don't know whether ppi would work on aarch64. It needs firm
In that case, do you think we should have a check in "realize" to make
sure the backend is 2.0?
On Thu, Jul 13, 2023 at 9:08 AM Stefan Berger wrote:
>
>
>
> On 7/12/23 23:51, Joelle van Dyne wrote:
> > This logic is similar to TPM TIS ISA device.
> >
On Thu, Jul 13, 2023 at 8:31 AM Peter Maydell wrote:
>
> On Thu, 13 Jul 2023 at 04:52, Joelle van Dyne wrote:
> >
> > TPM needs to know its own base address in order to generate its DSDT
> > device entry.
> >
> > Signed-off-by: Joelle van D
On Thu, Jul 13, 2023 at 6:07 AM Stefan Berger wrote:
>
>
>
> On 7/12/23 23:51, Joelle van Dyne wrote:
> > The impetus for this patch set is to get TPM 2.0 working on Windows 11
> > ARM64.
> > Windows' tpm.sys does not seem to work on a TPM TIS device (as verifi
In preparation for the SysBus variant, we move common code styled
after the TPM TIS devices.
To maintain compatibility, we do not rename the existing tpm-crb
device.
Signed-off-by: Joelle van Dyne
---
docs/specs/tpm.rst | 1 +
hw/tpm/tpm_crb.h| 76 +++
hw/tpm/tpm_crb.c
van Dyne
---
docs/specs/tpm.rst | 1 +
include/hw/acpi/aml-build.h | 1 +
include/sysemu/tpm.h| 3 +
hw/acpi/aml-build.c | 7 +-
hw/arm/virt.c | 1 +
hw/core/sysbus-fdt.c| 1 +
hw/loongarch/virt.c | 1 +
hw/riscv/virt.c
TPM needs to know its own base address in order to generate its DSDT
device entry.
Signed-off-by: Joelle van Dyne
---
hw/arm/virt.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 7d9dbc2663..432148ef47 100644
--- a
in the ACPI table generation. However, currently we
still have to call `build_tpm2` anyways and it does not look like
most other ACPI devices support the `ACPI_DEV_AML_IF` interface.
Signed-off-by: Joelle van Dyne
---
hw/arm/virt-acpi-build.c | 38 ++
hw
.
Signed-off-by: Joelle van Dyne
---
hw/tpm/tpm_crb.h| 2 -
hw/tpm/tpm_crb.c| 3 -
hw/tpm/tpm_crb_common.c | 124
3 files changed, 63 insertions(+), 66 deletions(-)
diff --git a/hw/tpm/tpm_crb.h b/hw/tpm/tpm_crb.h
index da3a0cf256
Instead of calling `memory_region_add_subregion` directly, we defer to
the caller to do it. This allows us to re-use the code for a SysBus
device.
Signed-off-by: Joelle van Dyne
---
hw/tpm/tpm_ppi.h| 10 +++---
hw/tpm/tpm_crb.c| 4 ++--
hw/tpm/tpm_crb_common.c | 3 +++
hw
TPM needs to know its own base address in order to generate its DSDT
device entry.
Signed-off-by: Joelle van Dyne
---
hw/loongarch/virt.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index e19b042ce8
This logic is similar to TPM TIS ISA device.
Signed-off-by: Joelle van Dyne
---
hw/i386/acpi-build.c | 23 ---
hw/tpm/tpm_crb.c | 28
2 files changed, 28 insertions(+), 23 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
address so this
was not an issue. However, once we support SysBus CRB device, the
address can be anywhere in 64-bit space.
Signed-off-by: Joelle van Dyne
---
include/hw/acpi/tpm.h | 3 ++-
hw/tpm/tpm_crb_common.c| 3 ++-
tests/qtest/tpm-crb-test.c | 2 +-
tests/qtest/tpm-util.c | 2
Since this device is gated to only build for targets with the PC
configuration, we should use the ISA bus like with TPM TIS.
Signed-off-by: Joelle van Dyne
---
hw/tpm/tpm_crb.c | 52
hw/tpm/Kconfig | 2 +-
2 files changed, 27 insertions(+), 27
If 'ppi' property is set, then `tpm_ppi_reset` is called on reset
which SEGFAULTs because `tpmppi->buf` is not allocated.
Signed-off-by: Joelle van Dyne
---
hw/tpm/tpm_tis_sysbus.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_s
1 - 100 of 342 matches
Mail list logo