stop incorrectly reporting FEAT_XS as present, and
now report the presence of FEAT_BF16.
Cc: qemu-sta...@nongnu.org
Reported-by: Marcin Juszkiewicz
Signed-off-by: Peter Maydell
---
target/arm/tcg/cpu64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/tcg/cpu64.c b/targe
it but we
move to FreeBSD 14.x due to longer support cycles (OpenBSD 7.3 we use is
already EoL).
Signed-off-by: Marcin Juszkiewicz
---
Changes in v5:
- update to post-avocado system
- drop all OpenBSD tests
- Link to v4:
https://lore.kernel.org/r/20240703-b4-move-to-freebsd-v4-0-07191f958...@
OpenBSD 7.3 we use is EoL. Both 7.4 and 7.5 releases do not work on
anything above Neoverse-N1 due to PAC emulation:
https://marc.info/?l=openbsd-arm&m=171050428327850&w=2
OpenBSD 7.6 is not yet released.
Signed-off-by: Marcin Juszkiewicz
---
tests/functional/test_aarch64_sbsaref
FreeBSD has longer support cycle for stable release (14.x EoL in 2028)
than OpenBSD (7.3 we use is already EoL). Also bugfixes are backported
so we can stay on 14.x for longer.
Signed-off-by: Marcin Juszkiewicz
---
tests/functional/test_aarch64_sbsaref.py | 43
'Test might timeout' means nothing. Replace it with useful information
that it is emulation of pointer authentication what makes this test run
too long.
Signed-off-by: Marcin Juszkiewicz
---
tests/functional/test_aarch64_sbsaref.py | 15 ++-
1 file changed, 10 insert
We want to run tests using default cpu without having to remember which
Arm core is it.
Change Neoverse-N1 (old default) test to use default cpu (Neoverse-N2 at
the moment).
Signed-off-by: Marcin Juszkiewicz
---
tests/functional/test_aarch64_sbsaref.py | 18 ++
1 file changed
On 30.08.2024 06:15, Yuquan Wang wrote:
The memory layout places 1M space for 16 host bridge register regions
in the sbsa-ref memmap. In addition, this creates a default pxb-cxl
(bus_nr=0xfe) bridge with one cxl-rp on sbsa-ref.
With this patchset applied I no longer can add pcie devices to sbsa
On 23.08.2024 14:54, Alireza Sanaee via wrote:
Failure cases:
1) there are cases where QEMU might not have any clusters selected in the
-smp option, while user specifies caches to be shared at cluster level. In
this situations, qemu returns error.
2) There are other scenario
354.35s 11 subtests passed
M1 Pro, Fedora Linux. 600s feels fine.
...
Signed-off-by: Philippe Mathieu-Daudé
---
Based-on:<20240821082748.65853-1-th...@redhat.com>
Reviewed-by: Marcin Juszkiewicz
On 22.08.2024 16:39, Philippe Mathieu-Daudé wrote:
On 22/8/24 16:06, Marcin Juszkiewicz wrote:
Maybe for QEMU project this is a progress. For me it is moving tests
from working ones to "sorry, timeout, find out why" ones.
OK, problem was found (check my previous mail). Tests to
On 22.08.2024 13:41, Philippe Mathieu-Daudé wrote:
Straight forward conversion. Since SBSA_FLASH files are not
tarballs, use lzma_uncompress() method.
Signed-off-by: Philippe Mathieu-Daudé
---
Based-on: <20240821082748.65853-1-th...@redhat.com>
---
diff --git a/tests/avocado/machine_aarch64_
On 22.08.2024 13:41, Philippe Mathieu-Daudé wrote:
# Timeouts for individual tests that can be slow e.g. with debugging enabled
test_timeouts = {
+ 'aarch64_sbsaref' : 180,
What kind of machine is able to run those tests in 180s? I bumped them
to 2400s and got timeout (Macbook with M1 Pro
& stage2 support : Result: PASS
Reviewed-by: Marcin Juszkiewicz
---
hw/arm/sbsa-ref.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index ae37a923015..396abe9c1bd 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -621,6 +621,7 @
On 6.08.2024 19:31, Cleber Rosa wrote:
This makes use of the avocado.utils.archive support for zstd.
In order to not duplicate code, the skip condition uses a private
utility from the module which is going to become public in Avocado
versions 103.1 LTS (and also in versions >= 107.0).
Reference
what I should in terms of testing before posting.
I apologize for the miscalculation.
Nevertheless, as pointed out, on the ML, these changes are needed NOW.
Tested-by: Marcin Juszkiewicz
SBSA Reference Platform tests can be done in 1/3rd of time is a nice update.
Serial run:
real6m20,324s
On 11.07.2024 12:19, Peter Maydell wrote:
On Wed, 10 Jul 2024 at 18:35, Marcin Juszkiewicz
wrote:
Neoverse-V1 TRM says that NumSets are [27:13] not :32 like in code.
NumSets in fields [27:13] is the 32-bit CCSIDR_EL1 format
(i.e. what you have when FEAT_CCIDX is not implemented).
The
Neoverse-V1 TRM says that NumSets are [27:13] not :32 like in code.
With this fix all cores which use make_ccsidr64() function have proper
size of cpu caches.
Signed-off-by: Marcin Juszkiewicz
---
target/arm/tcg/cpu64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target
.
Moved from Neoverse-N1 to Neoverse-N2 as sbsa-ref defaults were changed.
Timeout messages expanded to mention being affected by PAuth emulation.
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 73
1 file changed, 55 insertions(+), 18
We changed sbsa-ref cpu several times already and may do it again in a
future. To newer core or to enable/disable some properties.
This change switches Neoverse-N2 tests to 'let test default cpu' ones.
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsar
AVOCADO_TEST_LEGACY_OS variable.
At same time we add test to run on default cpu settings. For now it is
plain Neoverse-N2 but we are considering either disabling PAuth or going
with 'impdef' way.
Signed-off-by: Marcin Juszkiewicz
---
Changes in v4:
- hide OpenBSD test behind AVOCADO_TEST_LEGACY
W dniu 30.06.2024 o 16:37, Ard Biesheuvel pisze:
On Thu, 20 Jun 2024 at 12:20, Marcin Juszkiewicz
wrote:
Update firmware to have graphics card memory fix from EDK2 commit
c1d1910be6e04a8b1a73090cf2881fb698947a6e:
OvmfPkg/QemuVideoDxe: add feature PCD to remap framebuffer W/C
Some
test to run on default cpu settings. For now it is
plain Neoverse-N2 but we are considering either disabling PAuth or going
with 'impdef' way.
Signed-off-by: Marcin Juszkiewicz
---
Changes in v3:
- kept OpenBSD/Cortex-A57 test for local runs (by request of Philippe)
- Link to
We changed sbsa-ref cpu several times already and may do it again in a
future. To newer core or to enable/disable some properties.
This change switches Neoverse-N2 tests to 'let test default cpu' ones.
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsar
.
Moved from Neoverse-N1 to Neoverse-N2 as sbsa-ref defaults were changed.
Timeout messages expanded to mention being affected by PAuth emulation.
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 75
1 file changed, 56 insertions(+), 19
considering either disabling PAuth or going
with 'impdef' way.
Signed-off-by: Marcin Juszkiewicz
---
Marcin Juszkiewicz (2):
tests/avocado: sbsa-ref: switch from OpenBSD to FreeBSD
tests/avocado: add test for default sbsa-ref cpu
tests/avocado/machine_aarch64_sbsar
We changed sbsa-ref cpu several times already and may do it again in a
future. To newer core or to enable/disable some properties.
This change switches Neoverse-N2 tests to 'let test default cpu' ones.
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsar
)
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 53
1 file changed, 27 insertions(+), 26 deletions(-)
diff --git a/tests/avocado/machine_aarch64_sbsaref.py
b/tests/avocado/machine_aarch64_sbsaref.py
index 6bb82f2a03..d52f89f756
firmware
we're using for the test, we can make the test use all the cores on the
board, so we are testing the SMP boot path.
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 2 --
1 file changed, 2 deletions(-)
diff --git a/tests/avocado/machine_aarch64_sbsaref
c: Rebecca Cran
Signed-off-by: Marcin Juszkiewicz
---
Changes in v3:
- first update firmware, then use all cores (for bisecting)
- changed commit message in 'use all cores' patch
---
Marcin Juszkiewicz (2):
tests/avocado: update firmware for sbsa-ref
tests/avocado: use defaul
DXE services to set the desired capabilities
and attributes.
Hide this behavior under a feature PCD so only platforms that really
need it can enable it. (OVMF on x86 has no need for this)
With this fix enabled we can boot sbsa-ref with more than one cpu core.
Signed-off-by: Marcin
W dniu 20.06.2024 o 11:34, Peter Maydell pisze:
On Thu, 20 Jun 2024 at 07:00, Marcin Juszkiewicz
wrote:
I was wondering why avocado tests passed with firmware which
crashes when anyone else is using it.
Turned out that amount of cores matters. Have to find out why
still.
This commit
I have no idea why previous firmware worked with 1 cpu core and failed
with any higher number.
Marcin Juszkiewicz (2):
tests/avocado: use default amount of cores on sbsa-ref
tests/avocado: update firmware for sbsa-ref
tests/avocado/machine_aarch64_sbsaref.py | 16 +++-
1 file
I was wondering why avocado tests passed with firmware which crashes
when anyone else is using it.
Turned out that amount of cores matters. Have to find out why still.
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 2 --
1 file changed, 2 deletions(-)
diff
DXE services to set the desired capabilities
and attributes.
Hide this behavior under a feature PCD so only platforms that really
need it can enable it. (OVMF on x86 has no need for this)
With this fix enabled we can boot sbsa-ref with more than one cpu core.
Signed-off-by: Marcin
I was wondering why avocado tests passed with firmware which crashes
when anyone else is using it.
Turned out that amount of cores matters. Have to find out why still.
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 2 --
1 file changed, 2 deletions(-)
diff
nd if coords are odd then they are bumped a bit to make things
work.
Signed-off-by: Marcin Juszkiewicz
This should be fixed in the SBSA firmware
One coffee was not enough so I sent it to QEMU devel instead of EDK2
devel mailing list...
unaligned accesses are fine on arm64 as long as they
make things
work.
Signed-off-by: Marcin Juszkiewicz
---
.../Library/BootLogoLib/BootLogoLib.c | 4
MdeModulePkg/Logo/Logo.bmp| Bin 12446 -> 34010 bytes
2 files changed, 4 insertions(+)
diff --git a/MdeModulePkg/Library/BootLogoLib/BootLogoLib.c
b/MdeM
tested-by: Marcin Juszkiewicz
Reviewed-by: Marcin Juszkiewicz
Updated firmware for QEMU CI is already in merge queue so we can move
platform to be future proof.
All supported cpus work fine with 1GHz timer frequency when firmware is
fresh enough.
Signed-off-by: Marcin Juszkiewicz
---
hw/arm/sbsa-ref.c | 12
1 file changed, 4 insertions(+), 8
Trusted Firmware 2.11 got released, EDK2 202405 got released as well.
Both were built for QEMU CI and proper patch is now in arm.next queue.
So all requirements to move from legacy 62.5MHz to armv8.6-ready 1GHz
frequency are fulfiled.
Marcin Juszkiewicz (1):
hw/arm/sbsa-ref: switch to 1GHz
W dniu 29.05.2024 o 15:12, Leif Lindholm pisze:
On 2024-05-28 19:29, Marcin Juszkiewicz wrote:
Partial support for NUMA setup:
- cpu nodes
- memory nodes
Used versions:
- Trusted Firmware v2.11.0
- Tianocore EDK2 stable202405
- Tianocore EDK2 Platforms code commit 4bbd0ed
Firmware is built
Partial support for NUMA setup:
- cpu nodes
- memory nodes
Used versions:
- Trusted Firmware v2.11.0
- Tianocore EDK2 stable202405
- Tianocore EDK2 Platforms code commit 4bbd0ed
Firmware is built using Debian 'bookworm' cross toolchain (gcc 12.2.0).
---
tests/avocado/machine_aarch64_sbsaref.py
W dniu 26.05.2024 o 22:45, Richard Henderson pisze:
From: Marcin Juszkiewicz
Cc: qemu-sta...@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2304
Reported-by: Marcin Juszkiewicz
Signed-off-by: Richard Henderson
Signed-off-by: Marcin Juszkiewicz
---
Marcin added the
Yining
tested-by: Marcin Juszkiewicz
I had some thinking about it recently. This patch exported whole
/cpus/cpu-map/ tree which we then parse in TF-A to get amount of
sockets/clusters/cores/threads.
Why not export them directly? Kind of:
cpus {
topology
-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 65
1 file changed, 43 insertions(+), 22 deletions(-)
diff --git a/tests/avocado/machine_aarch64_sbsaref.py
b/tests/avocado/machine_aarch64_sbsaref.py
index 98c76c1ff7..c3c7c0e639 100644
--- a/tests
ble set of features enabled
by default. It is still supported and can be selected with "--cpu"
argument.
Signed-off-by: Marcin Juszkiewicz
---
hw/arm/sbsa-ref.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 57c337fd92..e88469
W dniu 3.05.2024 o 17:34, Zenghui Yu pisze:
We wrongly encoded ID_AA64PFR1_EL1 using {3,0,0,4,2} in hvf_sreg_match[] so
we fail to get the expected ARMCPRegInfo from cp_regs hash table with the
wrong key.
Fix it with the correct encoding {3,0,0,4,1}. With that fixed, the Linux
guest can properly
W dniu 2.05.2024 o 15:13, Peter Maydell pisze:
On Thu, 2 May 2024 at 14:11, Marcin Juszkiewicz
wrote:
W dniu 2.05.2024 o 15:04, Dorjoy Chowdhury pisze:
Should "return" also have "(1 << 24) |" to have MT=1 set?
Otherwise MPIDR_EL1 = 0x000100 can mean core0 in clu
W dniu 2.05.2024 o 15:04, Dorjoy Chowdhury pisze:
Should "return" also have "(1 << 24) |" to have MT=1 set?
Otherwise MPIDR_EL1 = 0x000100 can mean core0 in cluster1 or core1 in
cluster0.
Value 0x1000100 shows MT=1 so thread0 in core1 in cluster0.
I don't know all the details but from what I
W dniu 19.04.2024 o 20:31, Dorjoy Chowdhury pisze:
-uint64_t arm_build_mp_affinity(int idx, uint8_t clustersz)
+uint64_t arm_build_mp_affinity(ARMCPU *cpu, int idx, uint8_t clustersz)
{
+if (cpu->has_smt) {
+/*
+ * Right now, the ARM CPUs with SMT supported by QEMU only have
W dniu 2.05.2024 o 12:37, Peter Maydell pisze:
* what are the constraints on the Aff* fields (eg that kernel
commit suggests Aff0 shouldn't be > 15)?
This one is apparently related to GICv3 -- if the GIC doesn't
implement RangeSelector support in ICC_SGI0R_EL1 and other
places (advertise
W dniu 22.04.2024 o 17:21, Richard Henderson pisze:
For Arm's CPUs they fall into two categories:
* older ones don't set MT in their MPIDR, and the Aff0
field is effectively the CPU number
* newer ones do set MT in their MPIDR, but don't have
SMT, so their Aff0 is always 0 and their A
ur avocado test
Aarch64SbsarefMachine.test_sbsaref_alpine_linux_max_pauth_impdef
before we can do that.
Signed-off-by: Peter Maydell
---
I leave it up to the sbsa-ref maintainers exactly when they
want to shift to 1GHz (probably after a TF-A release with the fix?)
Reviewed-by: Marcin Juszkiewicz
TF-A 2.11 will be released in June. It will hav
W dniu 26.04.2024 o 18:06, Richard Henderson pisze:
Isn't this basically what MPIDR_EL1 is supposed to indicate?
We do not yet implement all of that in QEMU, but should.
QEMU has socket/cluster/core/thread model which could map to
aff3/aff2/aff1/aff0 (or aff0/1/2/3) of MPIDR_EL1 register, righ
Yining
tested-by: Marcin Juszkiewicz
Thanks. Checked with TF-A and EDK2 patches applied. PPTT table will be
more detailed now.
Reviewed-by: Marcin Juszkiewicz
W dniu 22.04.2024 o 17:37, Marcin Juszkiewicz pisze:
It also seems to be hardcoded in TF-A's support for the virt
board too, annoyingly.
I looked at it and it seems that TF-A can just read what is in
CNTFRQ_EL0 instead of hardcoding the value.
Submitted patch:
W dniu 22.04.2024 o 16:18, Peter Maydell pisze:
On Mon, 22 Apr 2024 at 14:38, Marcin Juszkiewicz
From what I see in EDK2 code we read CNTFREQ_EL0:
GetPlatformTimerFreq() checks for PcdArmArchTimerFreqInHz variable which
sbsa-ref has set to 0. So it calls ArmGenericTimerGetTimerFreq
W dniu 22.04.2024 o 14:56, Peter Maydell pisze:
On Fri, 19 Apr 2024 at 19:46, Peter Maydell wrote:
The upshot is that the only CPU type that changes is 'max'; but any
new type we add in future (whether v8.6 or not) will also get the new
1GHz default (assuming we spot in code review any attemp
For quite a while I am experimenting with PCI Express setup on SBSA-Ref
system. And finally decided to write.
We want to play with NUMA setup and "pxb-pcie" can be assigned to NUMA
node other than cpu0 one. But adding it makes other cards dissapear...
When I boot sbsa-ref I have plain PCIe se
W dniu 1.04.2024 o 21:55, Liviu Ionescu pisze:
On 1 Apr 2024, at 21:48, Richard
Henderson wrote:
You were told back in September that Ubuntu 18.04 is no longer
supported.
Sorry, I missed that.
BTW, according to ubuntu.com: "With Ubuntu Pro, the 18.04 LTS will be
fully supported until 2028.".
W dniu 28.03.2024 o 16:43, Peter Maydell pisze:
On Tue, 26 Mar 2024 at 09:58, Marcin Juszkiewicz
wrote:
Hardware of sbsa-ref board is nowadays defined by both BSA and SBSA
specifications. Then BBR defines firmware interface.
Added note about DeviceTree data passed from QEMU to firmware. It
by DeviceTree.
Signed-off-by: Marcin Juszkiewicz
---
docs/system/arm/sbsa.rst | 35 ++-
1 file changed, 26 insertions(+), 9 deletions(-)
diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst
index bca61608ff..2bf22a1d0b 100644
--- a/docs/system/arm
W dniu 27.03.2024 o 17:54, Philippe Mathieu-Daudé pisze:
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index 7b548519b5..345c35507f 100644
--- a/docs/about/deprecated.rst
+++ b/docs/about/deprecated.rst
@@ -208,6 +208,13 @@ is no longer packaged in any distro making it harder
I was going through Arm (S)BSA tests run against sbsa-ref. Many of them
check for presence of other cards than "Root Complex Integrated
Endpoint" ones.
The "-device root-pcie-port" etc arguments can be used to add such ones
but I was wondering how to add them directly in C code. Tried to find
by DeviceTree.
Signed-off-by: Marcin Juszkiewicz
---
docs/system/arm/sbsa.rst | 37 -
1 file changed, 28 insertions(+), 9 deletions(-)
diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst
index bca61608ff..d4d1f2efe3 100644
--- a/docs/system/arm
W dniu 25.03.2024 o 11:13, Mostafa Saleh pisze:
Currently, QEMU supports emulating either stage-1 or stage-2 SMMUs
but not nested instances.
This patch series adds support for nested translation in SMMUv3,
this is controlled by property “arm-smmuv3.stage=nested”, and
advertised to guests as (IDR0
W dniu 22.03.2024 o 19:51, Peter Maydell pisze:
On Tue, 12 Mar 2024 at 08:32, Xiong Yining
xiongyining1480 (2):
hw/arm/sbsa-ref:Enable CPU cluster on ARM sbsa machine
hw/arm/sbsa-ref: Add cpu-map to device tree
Thanks for these patches. I think we should squash the two
patches together
W dniu 22.03.2024 o 09:50, Heinrich Schuchardt pisze:
>>> I see no mention of device trees in the spec, but I do see ACPI. Do we
>>> really expect a server platform to use DTs?
>>
>> This platform "kind of" follows sbsa-ref where we have very
>> minimalistic device tree sharing information qemu->f
W dniu 22.03.2024 o 05:55, Alistair Francis pisze:
I see no mention of device trees in the spec, but I do see ACPI. Do we
really expect a server platform to use DTs?
This platform "kind of" follows sbsa-ref where we have very minimalistic
device tree sharing information qemu->firmware.
libfd
/11) test_sbsaref_openbsd73_max_pauth_impdef: PASS (16.11 s)
(11/11) test_sbsaref_openbsd73_max: PASS (16.08 s)
Signed-off-by: Marcin Juszkiewicz
---
Changes in v3:
- left OpenBSD at 7.3 (7.4+ is known to not boot)
https://gitlab.com/qemu-project/qemu/-/issues/2224
https://marc.info/?l=openbsd-a
hieu-Daudé
# SPDX-FileContributor: Marcin Juszkiewicz
#
@@ -32,34 +32,36 @@ def fetch_firmware(self):
"""
Flash volumes generated using:
-- Fedora GNU Toolchain version 13.2.1 20230728 (Red Hat 13.2.1-1)
+Toolchain from Debian:
+aarc
sbsa-ref is supposed to emulate real hardware so virtio-rng-pci
does not fit here
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 8
1 file changed, 8 deletions(-)
diff --git a/tests/avocado/machine_aarch64_sbsaref.py
b/tests/avocado
PAuth makes run timeout on CI so add tests using 'max' without
it and with impdef one.
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/tests/avocado/machine_aarch64_
PAuth makes run timeout on CI so add tests using 'max' without it
and with impdef one.
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 18 ++
1 file changed, 18 insertions(+)
diff --git a/tests/avocado/machine_aarch64_sbsaref.py
b/tes
W dniu 14.03.2024 o 15:56, Alex Bennée pisze:
If we are not going to delete the entries then at least use a @skip
instead of commenting. Maybe:
@skip("Potential un-diagnosed upstream bug?")
Daniel or Peter suggested to open a GitLab issue and use
@skip("https://gitlab.com/qemu-project/
W dniu 14.03.2024 o 13:14, Alex Bennée pisze:
+# OpenBSD 7.4 does not boot on current max cpu.
+#
+# def test_sbsaref_openbsd_max_pauth_off(self):
+# """
+# :avocado: tags=cpu:max
+# :avocado: tags=os:openbsd
+# """
+# self.boot_openbsd("max,pauth=off")
If we are
PAuth makes run timeout on CI so add tests using 'max' without it
and with impdef one.
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 18 ++
1 file changed, 18 insertions(+)
diff --git a/tests/avocado/machine_aarch64_sbsaref.py
b/tes
PASS (29.27 s)
(6/8) test_sbsaref_alpine_linux_max: PASS (80.13 s)
(7/8) test_sbsaref_openbsd_cortex_a57: PASS (16.01 s)
(8/8) test_sbsaref_openbsd_neoverse_n1: PASS (16.05 s)
Signed-off-by: Marcin Juszkiewicz
---
Changes in v2:
- disabled 'max' tests on OpenBSD
- moved tags to 'one tag per line'
- add
hieu-Daudé
# SPDX-FileContributor: Marcin Juszkiewicz
#
@@ -32,34 +32,36 @@ def fetch_firmware(self):
"""
Flash volumes generated using:
-- Fedora GNU Toolchain version 13.2.1 20230728 (Red Hat 13.2.1-1)
+Toolchain from Debian:
+aarc
sbsa-ref is supposed to emulate real hardware so virtio-rng-pci
does not fit here
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 8
1 file changed, 8 deletions(-)
diff --git a/tests/avocado/machine_aarch64_sbsaref.py
b/tests/avocado
7.4 was released in October 2023, time to update before 7.3 gets dropped.
Disabled tests for 'max' cpu as OpenBSD fails there.
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 47 +++-
1 file changed, 34 insertions(+), 13
W dniu 13.03.2024 o 12:44, Philippe Mathieu-Daudé pisze:
- :avocado: tags=cpu:cortex-a57
+ :avocado: tags=cpu:cortex-a57,os:openbsd
IIRC for some reason we must use one tag per line... Even if
named 'tags', this is handled as a single tag, so we couldn't
filter on "os:openbsd". We
sbsa-ref is supposed to emulate real hardware so virtio-rng-pci
does not fit here
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 8
1 file changed, 8 deletions(-)
diff --git a/tests/avocado/machine_aarch64_sbsaref.py
b/tests/avocado
hieu-Daudé
# SPDX-FileContributor: Marcin Juszkiewicz
#
@@ -32,34 +32,36 @@ def fetch_firmware(self):
"""
Flash volumes generated using:
-- Fedora GNU Toolchain version 13.2.1 20230728 (Red Hat 13.2.1-1)
+Toolchain from Debian:
+aarc
7.4 was released in October 2023, time to update before 7.3 gets dropped.
Signed-off-by: Marcin Juszkiewicz
---
tests/avocado/machine_aarch64_sbsaref.py | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/tests/avocado/machine_aarch64_sbsaref.py
b
igned-off-by: Marcin Juszkiewicz
---
Marcin Juszkiewicz (3):
tests/avocado: update sbsa-ref firmware
tests/avocado: drop virtio-rng from sbsa-ref tests
tests/avocado: use OpenBSD 7.4 for sbsa-ref
tests/avocado/machine_aarch64_sbsaref.py | 74 +++-
W dniu 4.03.2024 o 11:25, Fei Wu pisze:
The RISC-V Server Platform specification[1] defines a standardized
set of hardware and software capabilities, that portable system
software, such as OS and hypervisors can rely on being present in a
RISC-V server platform. This patchset provides a RISC-V S
There is no point in checking do we have PCIe if first thing after check
is adding PCIe card without checking.
Signed-off-by: Marcin Juszkiewicz
---
hw/arm/sbsa-ref.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index f2adf30337
W dniu 15.02.2024 o 9:52 AM, Dmitry Baryshkov pisze:
If we want to actually go there, I think the best option for PCMCIA
support is likely to replace the entire "soc_common" pcmcia driver
with a simple drivers/pata/ storage driver and no support for
other cards.
hmm, main usage for PCMCIA/CF i
W dniu 14.02.2024 o 1:26 PM, Dmitry Baryshkov pisze:
The thriving world of PostmarketOS only exist because Google was
clever to realize devices should have a developer mode.
There were two projects that worked on reenabling phones and PDAs from
that era, hack'n'dev and handhelds.org. I think b
W dniu 12.02.2024 o 15:36, Guenter Roeck pisze:
The machines I have in mind are:
PXA2xx machines:
akita Sharp SL-C1000 (Akita) PDA (PXA270)
borzoi Sharp SL-C3100 (Borzoi) PDA (PXA270)
connex Gumstix Connex (PXA255)
mainstone Mainstone II (P
CPU cluster on ARM sbsa machine
hw/arm/sbsa-ref: Add cpu-map to device tree
hw/arm/sbsa-ref.c | 36
1 file changed, 36 insertions(+)
Tested-by: Marcin Juszkiewicz
Booted system with "-smp 8,sockets=2,clusters=2,cores=1,threads=2" and
got wha
W dniu 27.12.2023 o 13:07, Xiong Yining pisze:
From: xiongyining1480
Support CPU topology description through device tree.
Signed-off-by: Xiong Yining
Signed-off-by: Chen Baozi
---
hw/arm/sbsa-ref.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/h
W dniu 18.12.2023 o 12:32, Peter Maydell pisze:
Enable FEAT_NV on the 'max' CPU, and stop filtering it out for the
Neoverse N2 and Neoverse V1 CPUs. We continue to downgrade FEAT_NV2
support to FEAT_NV for the latter two CPU types.
According to Neoverse-V1 TRM r1p2 it has FEAT_NV2. Similar w
W dniu 8.12.2023 o 20:09, Cleber Rosa pisze:
The tests under machine_aarch64_virt.py do not need read-write access
to the ISOs. The ones under machine_aarch64_sbsaref.py, on the other
hand, will need read-write access, so let's give each test an unique
file.
And while at it, let's use a single
W dniu 27.11.2023 o 00:12, Gavin Shan pisze:
@@ -2939,6 +2900,28 @@ static void virt_machine_class_init(ObjectClass *oc,
void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
+static const char * const valid_cpu_types[] = {
+#i
W dniu 27.11.2023 o 00:12, Gavin Shan pisze:
After the series is applied:
[gshan@gshan q]$ ./build/qemu-system-aarch64 -M virt -cpu cortex-a8
qemu-system-aarch64: Invalid CPU type: cortex-a8
The valid types are: cortex-a7, cortex-a15, cortex-a35, cortex-a55, \
W dniu 20.11.2023 o 01:27, Gavin Shan pisze:
Testing
===
With the following command lines, the output messages are varied before
and after the series is applied.
./build/qemu-system-aarch64\
-accel tcg -machine virt,gic-version=3 \
-cpu cortex-a8 -smp maxcpus=2,cpus=1
I noticed that Neoverse-V1 has FEAT_RNG enabled so let enable it also on
Neoverse-N2.
Signed-off-by: Marcin Juszkiewicz
---
target/arm/tcg/cpu64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c
index 08db1dbcc7..fcda99e158
/ahci: simplify and document PxCI handling")
Reported-by: Marcin Juszkiewicz
Signed-off-by: Niklas Cassel
Tested-by: Marcin Juszkiewicz
FreeBSD 14-rc3 boots fine on AArch64 with this patch:
Trying to mount root from cd9660:/dev/iso9660/14_0_RC3_AARCH64_BO [ro]...
cd0 at ahcich0 bus 0 scbus0 ta
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