On Mon, Jul 01, 2024 at 09:48:02AM +0300, Michael Tokarev wrote:
> Date: Mon, 1 Jul 2024 09:48:02 +0300
> From: Michael Tokarev
> Subject: Re: [PATCH v3] i386/cpu: fixup number of addressable IDs for
> processor cores in the physical package
>
> 11.06.2024 06:23, Chuang Xu wrote:
> > When QEMU
On Fri, Jun 28, 2024 at 03:23:11PM +0200, Paolo Bonzini wrote:
> Date: Fri, 28 Jun 2024 15:23:11 +0200
> From: Paolo Bonzini
> Subject: Re: [PATCH 2/2] target/i386: drop AMD machine check bits from
> Intel CPUID
>
> Il ven 28 giu 2024, 10:32 Xiaoyao Li ha scritto:
>
> > On 6/27/2024 10:06 PM,
Hi Paolo,
A gentle poke for this series.
Thanks,
Zhao
On Thu, Jun 06, 2024 at 05:25:31PM +0800, Zhao Liu wrote:
> Date: Thu, 6 Jun 2024 17:25:31 +0800
> From: Zhao Liu
> Subject: Re: [PATCH v2 0/6] target/i386: Misc cleanup on KVM PV defs and
> outdated comments
>
> H
386/tcg/translate.c | 16
> 1 file changed, 16 deletions(-)
>
Reviewed-by: Zhao Liu
Hi Manos,
On Wed, Jun 19, 2024 at 11:14:02PM +0300, Manos Pitsidianakis wrote:
> Date: Wed, 19 Jun 2024 23:14:02 +0300
> From: Manos Pitsidianakis
> Subject: [RFC PATCH v3 5/5] DO NOT MERGE: replace TYPE_PL011 with
> x-pl011-rust in arm virt machine
> X-Mailer: git-send-email 2.44.0
>
>
> > > + # > WARNING: Project specifies a minimum meson_version '>=0.63.0'
> > > but
> > > + # > uses features which were added in newer versions:
> > > + # > * 0.64.0: {'fs.copyfile'}
> > > + # > * 1.0.0: {'dependencies arg in rust.bindgen', 'module rust as
> > > stable
Hi EwanHai,
On Tue, Jun 25, 2024 at 05:19:01AM -0400, EwanHai wrote:
> Date: Tue, 25 Jun 2024 05:19:01 -0400
> From: EwanHai
> Subject: [PATCH 0/4] Add support for Zhaoxin Yongfeng CPU model and other
> improvements
> X-Mailer: git-send-email 2.34.1
>
> This patch series introduces support for
[snip]
> > Additionally, has_msr_vmx_vmfunc has the similar compat issue. I think
> > it deserves a fix, too.
> >
> > -Zhao
> Thanks for your reply. In fact, I've tried to process has_msr_vmx_vmfunc in
> the same
> way as has_msr_vmx_procbased_ctls in this patch, but when I tested on Linux
>
0; i < kvm_feature_msrs->nmsrs; i++) {
> +if (kvm_feature_msrs->indices[i] == MSR_IA32_VMX_PROCBASED_CTLS2) {
> +has_msr_vmx_procbased_ctls2 = true;
> +}
> +}
> return 0;
> }
>
> --
> 2.34.1
>
Since the minimum KVM version supported for i386 is v4.5 (docs/system/
target-i386.rst), this fix makes sense, so for this patch,
Reviewed-by: Zhao Liu
Additionally, has_msr_vmx_vmfunc has the similar compat issue. I think
it deserves a fix, too.
-Zhao
Hi Manos,
Thanks for your patch. I have a few comments below:
> diff --git a/meson.build b/meson.build
> index 3533889852..2b305e745a 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -3876,6 +3876,62 @@ foreach target : target_dirs
> lib_deps += dep.partial_dependency(compile_args: true,
[snip]
> diff --git a/meson.build b/meson.build
> index c5360fbd299..ad7dbc0d641 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -290,6 +290,11 @@ foreach lang : all_languages
>endif
> endforeach
> +cargo = not_found
> +if 'RUST_TARGET_TRIPLE' in config_host
> + cargo =
Hi maintainers,
Per my communication with Markus, it seems this renaming matches the
"local consistency" principle in (include/hw/boards.h). :-)
So do you think this change is acceptable?
Thanks,
Zhao
On Mon, May 27, 2024 at 09:18:37PM +0800, Zhao Liu wrote:
> Date: Mon, 27 May
Hexadecimal mask is more intuitive comparing to decimal.
Therefore convert the mask of bits 00-04 to hexadecimal value.
Signed-off-by: Zhao Liu
---
target/i386/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 365852cb99e1
efore and after
the change.
Signed-off-by: Zhao Liu
---
target/i386/cpu.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index c4d4048ec32a..c20ff69b7b65 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6453,16 +645
-off-by: Zhao Liu
---
target/i386/cpu.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index c20ff69b7b65..71300ac6d197 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6463,7 +6463,15 @@ void cpu_x86_cpuid(CPUX86State
is clear enough so that my poor English doesn't
bother you!
[1]:
https://lore.kernel.org/qemu-devel/20240527170317.14520...@imammedo.users.ipa.redhat.com/
Thanks and Best Regards,
Zhao
---
Zhao Liu (3):
target/i386/cpu: Use hex mask to check for valid cache CPUID leaf
target/i386/cpu: Check
Hi Paolo,
On Thu, Jun 13, 2024 at 09:56:39AM +0200, Paolo Bonzini wrote:
> Date: Thu, 13 Jun 2024 09:56:39 +0200
> From: Paolo Bonzini
> Subject: Re: [RFC PATCH v2 3/5] rust: add PL011 device model
>
> Il gio 13 giu 2024, 09:13 Daniel P. Berrangé ha
> scritto:
>
> > On Wed, Jun 12, 2024 at
On Tue, Jun 11, 2024 at 01:33:32PM +0300, Manos Pitsidianakis wrote:
> Date: Tue, 11 Jun 2024 13:33:32 +0300
> From: Manos Pitsidianakis
> Subject: [RFC PATCH v2 3/5] rust: add PL011 device model
> X-Mailer: git-send-email 2.44.0
>
> This commit adds a re-implementation of hw/char/pl011.c in
; avx512-vp2intersect: AVX512 Vector Pair Intersection to a Pair
> of Mask Register
> avx-vnni : AVX VNNI Instruction
>
> Signed-off-by: Babu Moger
> ---
> target/i386/cpu.c | 131 ++
> 1 file changed, 131 insertions(+)
Reviewed-by: Zhao Liu
2: System Programming
> Publication # 24593 Revision 3.41.
>
> Signed-off-by: Babu Moger
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
> ---
> target/i386/cpu.c | 15 +++
> 1 file changed, 15 insertions(+)
Reviewed-by: Zhao Liu
_state, index, count,
> +R_EBX) & 0xf;
Although only EAX[bit 0] and EBX[bits 0-3] are supported right now, I
think it's better to use “|=” rather than just override the
original *eax and *ebx, which will prevent future mistakes or omissions.
Otherwise,
Reviewed-by: Zhao Liu
lowRecov: MCA overflow recovery support.
>
> Signed-off-by: Babu Moger
> ---
> target/i386/cpu.c | 30 ++
> 1 file changed, 30 insertions(+)
Reviewed-by: Zhao Liu
On Tue, Jun 11, 2024 at 01:41:57PM +0300, Manos Pitsidianakis wrote:
> Date: Tue, 11 Jun 2024 13:41:57 +0300
> From: Manos Pitsidianakis
> Subject: Re: [RFC PATCH v1 0/6] Implement ARM PL011 in Rust
>
> > Currently, pl011 exclusively occupies a cargo as a package. In the
> > future, will other
On Tue, Jun 11, 2024 at 09:18:25AM +0100, Daniel P. Berrangé wrote:
> Date: Tue, 11 Jun 2024 09:18:25 +0100
> From: "Daniel P. Berrangé"
> Subject: Re: [RFC PATCH v1 0/6] Implement ARM PL011 in Rust
>
> On Mon, Jun 10, 2024 at 09:22:35PM +0300, Manos Pitsidianakis wrote:
> > What are the issues
On Tue, Jun 11, 2024 at 09:22:44AM +0100, Daniel P. Berrangé wrote:
> Date: Tue, 11 Jun 2024 09:22:44 +0100
> From: "Daniel P. Berrangé"
> Subject: Re: [RFC PATCH v1 0/6] Implement ARM PL011 in Rust
>
> On Mon, Jun 10, 2024 at 09:22:35PM +0300, Manos Pitsidianakis wrote:
> > Hello everyone,
> >
iong Wei
> Signed-off-by: Yipeng Yin
> Signed-off-by: Chuang Xu
> ---
> target/i386/cpu.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
Thanks! LGTM,
Reviewed-by: Zhao Liu
On Fri, Jun 07, 2024 at 03:47:01PM +0800, Xiaoyao Li wrote:
> Date: Fri, 7 Jun 2024 15:47:01 +0800
> From: Xiaoyao Li
> Subject: Re: [PATCH] i386/apic: Add hint on boot failure because of
> disabling x2APIC
>
> On 6/7/2024 3:46 PM, Zhao Liu wrote:
> > Hi Philippe,
>
Hi Philippe,
On Fri, Jun 07, 2024 at 08:17:36AM +0200, Philippe Mathieu-Daudé wrote:
> Date: Fri, 7 Jun 2024 08:17:36 +0200
> From: Philippe Mathieu-Daudé
> Subject: Re: [PATCH] i386/apic: Add hint on boot failure because of
> disabling x2APIC
>
> On 6/6/24 16:08, Zhao Liu wr
-
> 3 files changed, 1 insertion(+), 67 deletions(-)
> delete mode 100644 scripts/tracetool/vcpu.py
Reviewed-by: Zhao Liu
the exact error message from the
(perhaps effectively) hint, adding a hint via error_append_hint() is
also necessary. Therefore, introduce @local_error in
apic_common_set_id() to handle both the error message and the error
hint.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Zhao Liu
---
hw
Hi Paolo,
Just a ping for this cleanup series.
Thanks,
Zhao
On Mon, May 06, 2024 at 04:51:47PM +0800, Zhao Liu wrote:
> Date: Mon, 6 May 2024 16:51:47 +0800
> From: Zhao Liu
> Subject: [PATCH v2 0/6] target/i386: Misc cleanup on KVM PV defs and
> outdated comments
> X-Mailer:
restrictions. Thus,
to avoid confusion, avoid mentioning specific maximum vCPU number
limitations here.
Suggested-by: Daniel P. Berrangé
Signed-off-by: Zhao Liu
---
docs/system/target-i386-desc.rst.inc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/docs/system/target-i386
On Thu, Jun 06, 2024 at 09:41:47AM +0200, Paolo Bonzini wrote:
> Date: Thu, 6 Jun 2024 09:41:47 +0200
> From: Paolo Bonzini
> Subject: Re: [PATCH] stubs/meson: Fix qemuutil build when --disable-system
>
> On 6/5/24 17:25, Zhao Liu wrote:
> > Compiling without system, user,
On Thu, Jun 06, 2024 at 12:44:09AM +0200, Paolo Bonzini wrote:
> Date: Thu, 6 Jun 2024 00:44:09 +0200
> From: Paolo Bonzini
> Subject: [PATCH] target/i386: SEV: do not assume machine->cgs is SEV
> X-Mailer: git-send-email 2.45.1
>
> There can be other confidential computing classes that are not
On Wed, Jun 05, 2024 at 11:25:49PM +0800, Zhao Liu wrote:
> Date: Wed, 5 Jun 2024 23:25:49 +0800
> From: Zhao Liu
> Subject: [PATCH] stubs/meson: Fix qemuutil build when --disable-system
> X-Mailer: git-send-email 2.34.1
>
> Compiling without system, user, tools or
. Berrangé
Signed-off-by: Zhao Liu
---
stubs/meson.build | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/stubs/meson.build b/stubs/meson.build
index 3b9d42023cb2..a99522ab6bbf 100644
--- a/stubs/meson.build
+++ b/stubs/meson.build
@@ -45,17 +45,10 @@ if have_block
On Tue, Jun 04, 2024 at 11:07:30AM +0100, Daniel P. Berrangé wrote:
> Date: Tue, 4 Jun 2024 11:07:30 +0100
> From: "Daniel P. Berrangé"
> Subject: Re: [PULL 17/63] stubs: include stubs only if needed
>
> On Tue, Apr 23, 2024 at 05:09:05PM +0200, Paolo Bonzini wrote:
> > Currently it is not
[snip]
> > > $ qemu-system-i386 -M pc-q35-9.0 -smp 666
> > > Unexpected error in apic_common_set_id() at ../hw/intc/apic_common.c:447:
> > > qemu-system-i386: APIC ID 255 requires x2APIC feature in CPU
> > > Abort trap: 6
> >
> > For tcg, it needs to set x2apic=on in -cpu.
>
> Thanks for
hw/core: Add cache topology options in -smp
>
> On Tue, Jun 04, 2024 at 10:54:51AM +0200, Markus Armbruster wrote:
> > Zhao Liu writes:
> >
> > > Add "l1d-cache", "l1i-cache". "l2-cache", and "l3-cache" options in
>
Hi Daniel,
On Tue, Jun 04, 2024 at 10:29:15AM +0100, Daniel P. Berrangé wrote:
> Date: Tue, 4 Jun 2024 10:29:15 +0100
> From: "Daniel P. Berrangé"
> Subject: Re: [RFC v2 0/7] Introduce SMP Cache Topology
>
> On Thu, May 30, 2024 at 06:15:32PM +0800, Zhao Liu wr
Hi Chuang,
On Mon, Jun 03, 2024 at 04:36:41PM +0800, Chuang Xu wrote:
> Date: Mon, 3 Jun 2024 16:36:41 +0800
> From: Chuang Xu
> Subject: [PATCH v2] i386/cpu: fixup number of addressable IDs for processor
> cores in the physical package
> X-Mailer: git-send-email 2.24.3 (Apple Git-128)
>
>
On Tue, Jun 04, 2024 at 10:47:44AM +0200, Markus Armbruster wrote:
> Date: Tue, 04 Jun 2024 10:47:44 +0200
> From: Markus Armbruster
> Subject: Re: [RFC v2 1/7] hw/core: Make CPU topology enumeration
> arch-agnostic
>
> Zhao Liu writes:
>
> > Hi Markus,
> >
n Mon, Jun 03, 2024 at 07:31:47PM +0200, Philippe Mathieu-Daudé wrote:
> > Hi Michael,
> >
> > On 2/6/24 15:30, Michael S. Tsirkin wrote:
> > > On Fri, Apr 12, 2024 at 11:57:35AM +0200, Philippe Mathieu-Daudé wrote:
> > > > Hi Zhao,
> >
Michael S. Tsirkin wrote:
> > On Fri, Apr 12, 2024 at 11:57:35AM +0200, Philippe Mathieu-Daudé wrote:
> > > Hi Zhao,
> > >
> > > On 12/4/24 10:53, Zhao Liu wrote:
> > > > From: Zhao Liu
> > > >
> > > > Commit e4e98c7eebfa (&q
[snip]
> > +CPUTopoInfo cpu_topo_descriptors[] = {
> > +[CPU_TOPO_LEVEL_INVALID] = { .name = "invalid", },
> > +[CPU_TOPO_LEVEL_THREAD] = { .name = "thread", },
> > +[CPU_TOPO_LEVEL_CORE]= { .name = "core",},
> > +[CPU_TOPO_LEVEL_MODULE] = { .name = "module", },
> > +
Hi Markus,
On Mon, Jun 03, 2024 at 02:25:36PM +0200, Markus Armbruster wrote:
> Date: Mon, 03 Jun 2024 14:25:36 +0200
> From: Markus Armbruster
> Subject: Re: [RFC v2 1/7] hw/core: Make CPU topology enumeration
> arch-agnostic
>
> Zhao Liu writes:
>
> > Cache t
On Tue, Jun 04, 2024 at 07:29:15AM +0200, Markus Armbruster wrote:
> Date: Tue, 04 Jun 2024 07:29:15 +0200
> From: Markus Armbruster
> Subject: Re: [PATCH] hw/core: Rename CpuTopology to CPUTopology
>
> Zhao Liu writes:
>
> > On Mon, Jun 03, 2024 at 01:54:15PM +0200,
On Mon, Jun 03, 2024 at 01:54:15PM +0200, Markus Armbruster wrote:
> Date: Mon, 03 Jun 2024 13:54:15 +0200
> From: Markus Armbruster
> Subject: Re: [PATCH] hw/core: Rename CpuTopology to CPUTopology
>
> Zhao Liu writes:
>
> > Use CPUTopology to honor the generic sty
is patch merges host_cpu_enable_cpu_pm()
> into kvm_cpu_realizefn().
>
> Fixes: f5cc5a5c1686 ("i386: split cpu accelerators from cpu.c, using
> AccelCPUClass")
> Fixes: 662175b91ff2 ("i386: reorder call to cpu_exec_realizefn")
> Signed-off-by: Zide Chen
> ---
LGTM,
Reviewed-by: Zhao Liu
DisasContext.cpuid_ext_features indicates CPUID.01H.ECX.
Use DisasContext.cpuid_7_0_ecx_features field to check RDPID feature bit
(CPUID_7_0_ECX_RDPID).
Fixes: 6750485bf42a ("target/i386: implement RDPID in TCG")
Inspired-by: Xinyu Li
Signed-off-by: Zhao Liu
---
target/i386/tcg/t
| 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Zhao Liu
'x86_64'
>qemu_common_flags = ['-mcx16'] + qemu_common_flags
> endif
> --
> 2.45.1
Reviewed-by: Zhao Liu
POPCNT instruction.
> Use it freely in TCG-generated code.
>
> Signed-off-by: Paolo Bonzini
> ---
> host/include/i386/host/cpuinfo.h | 1 -
> tcg/i386/tcg-target.h| 5 ++---
> util/cpuinfo-i386.c | 1 -
> 3 files changed, 2 insertions(+), 5 deletions(-)
Reviewed-by: Zhao Liu
SSSE3 instructions
> (notably, PSHUFB which is used by QEMU's AES implementation).
> Do not bother checking it.
>
> Signed-off-by: Paolo Bonzini
> ---
> util/cpuinfo-i386.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Zhao Liu
2.
> Use it freely in buffer_is_zero.
>
> Signed-off-by: Paolo Bonzini
> ---
> host/include/i386/host/cpuinfo.h | 1 -
> util/bufferiszero.c | 2 +-
> util/cpuinfo-i386.c | 1 -
> 3 files changed, 1 insertion(+), 3 deletions(-)
Reviewed-by: Zhao Liu
V.
> Use it freely in TCG generated code.
>
> Signed-off-by: Paolo Bonzini
> ---
> host/include/i386/host/cpuinfo.h | 1 -
> util/cpuinfo-i386.c | 1 -
> tcg/i386/tcg-target.c.inc| 15 +--
> 3 files changed, 1 insertion(+), 16 deletions(-)
Reviewed-by: Zhao Liu
is_zero, which has
> been removed; code to compute CPUINFO_SSE4 is dead.
>
> Signed-off-by: Paolo Bonzini
> ---
> host/include/i386/host/cpuinfo.h | 1 -
> util/cpuinfo-i386.c | 1 -
> 2 files changed, 2 deletions(-)
>
Reviewed-by: Zhao Liu
dented with
> hard-coded tabs rather than spaces. Normalise to match the rest
> of the file.
>
> Signed-off-by: Peter Maydell
> ---
> accel/kvm/kvm-all.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Zhao Liu
e/hw/boards.h | 1 -
> hw/core/machine.c | 2 +-
> 3 files changed, 6 insertions(+), 2 deletions(-)
Reviewed-by: Zhao Liu
On Fri, May 31, 2024 at 10:13:47AM -0700, Chen, Zide wrote:
> Date: Fri, 31 May 2024 10:13:47 -0700
> From: "Chen, Zide"
> Subject: Re: [PATCH V2 2/3] target/i386: call cpu_exec_realizefn before
> x86_cpu_filter_features
>
> On 5/30/2024 11:30 PM, Zhao Liu wrote:
On Fri, May 24, 2024 at 01:00:17PM -0700, Zide Chen wrote:
> Date: Fri, 24 May 2024 13:00:17 -0700
> From: Zide Chen
> Subject: [PATCH V2 3/3] target/i386: Move host_cpu_enable_cpu_pm into
> kvm_cpu_realizefn()
> X-Mailer: git-send-email 2.34.1
>
> It seems not a good idea to expand features in
Hi Zide,
On Fri, May 24, 2024 at 01:00:16PM -0700, Zide Chen wrote:
> Date: Fri, 24 May 2024 13:00:16 -0700
> From: Zide Chen
> Subject: [PATCH V2 2/3] target/i386: call cpu_exec_realizefn before
> x86_cpu_filter_features
> X-Mailer: git-send-email 2.34.1
>
> cpu_exec_realizefn which calls the
Hi Eric and Markus,
Just a gentle poke. What do you think of this ordering?
Thanks,
Zhao
On Fri, May 17, 2024 at 02:27:46PM +0800, Zhao Liu wrote:
> Date: Fri, 17 May 2024 14:27:46 +0800
> From: Zhao Liu
> Subject: [PATCH 0/2] qapi/qapi-schema: Clarify the dependency relationship
&
On Mon, May 27, 2024 at 07:19:56AM +0200, Thomas Huth wrote:
> Date: Mon, 27 May 2024 07:19:56 +0200
> From: Thomas Huth
> Subject: Re: [PATCH V2 1/3] vl: Allow multiple -overcommit commands
>
> On 24/05/2024 22.00, Zide Chen wrote:
> > Both cpu-pm and mem-lock are related to system resource
Hi Zide,
On Wed, May 29, 2024 at 10:31:21AM -0700, Chen, Zide wrote:
> Date: Wed, 29 May 2024 10:31:21 -0700
> From: "Chen, Zide"
> Subject: Re: [PATCH V2 0/3] improve -overcommit cpu-pm=on|off
>
>
>
> On 5/29/2024 5:46 AM, Igor Mammedov wrote:
> > On Tue, 28 May 2024 11:16:59 -0700
> >
ide Chen
> ---
>
> v2:
>
> Thanks to Thomas' suggestion, changed to this better approach, which
> is more generic and can handle situations like: "enabled the option in
> the config file, and now you'd like to disable it on the command line
> again".
>
> system/vl.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Zhao Liu
and
CPU_TOPO_LEVEL_SOCKET.
Also, enumerate additional topology levels for non-i386 arches, and add
helpers for topology enumeration and string conversion.
Signed-off-by: Zhao Liu
---
Changes since RFC v1:
* Use QAPI to enumerate CPU topology levels.
* Drop string_to_cpu_topo() since QAPI will help
User will configure SMP cache topology via -smp.
For this case, update the x86 CPUs' cache topology with user's
configuration in MachineState.
Signed-off-by: Zhao Liu
---
target/i386/cpu.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/target/i386/cpu.c b/target
Allows cache to be defined at the thread and module level. This
increases flexibility for x86 users to customize their cache topology.
Signed-off-by: Zhao Liu
---
target/i386/cpu.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386
Add "l1d-cache", "l1i-cache". "l2-cache", and "l3-cache" options in
-smp to define the cache topology for SMP system.
Signed-off-by: Zhao Liu
---
Changes since RFC v1:
* Set has_*_cache field in machine_get_smp(). (JeeHeng)
* Adjust string breaking
Signed-off-by: Zhao Liu
---
Changes since RFC v1:
* Use "*_cache=topo_level" as -smp example as the original "level"
term for a cache has a totally different meaning. (Jonathan)
---
qemu-options.hx | 50 +++--
1 file changed,
-cache, L2 cache and
L3 cache in machine as the basic cache topology support.
Signed-off-by: Zhao Liu
---
hw/core/machine.c | 5 +
include/hw/boards.h | 25 +
2 files changed, 30 insertions(+)
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 8087026b45da
l.org/qemu-devel/zcug0uc8kyleq...@redhat.com/
Thanks and Best Regards,
Zhao
---
Changelog:
Main changes since RFC v1:
* Split CpuTopology renaimg out of this RFC.
* Use QAPI to enumerate CPU topology levels.
* Drop string_to_cpu_topo() since QAPI will help to parse the topo
levels.
* Set h
Signed-off-by: Zhao Liu
---
hw/i386/pc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 7b638da7aaa8..2e03b33a4116 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1844,6 +1844,9 @@ static void pc_machine_class_init(ObjectClass *oc, void
*data)
mc
Hi Stefan,
On Tue, May 28, 2024 at 10:14:01AM -0400, Stefan Hajnoczi wrote:
> Date: Tue, 28 May 2024 10:14:01 -0400
> From: Stefan Hajnoczi
> Subject: Re: [RFC 1/6] scripts/simpletrace-rust: Add the basic cargo
> framework
>
> On Tue, May 28, 2024 at 03:53:55PM +0800, Zhao
Hi Stefan and Mads,
On Wed, May 29, 2024 at 11:33:42AM +0200, Mads Ynddal wrote:
> Date: Wed, 29 May 2024 11:33:42 +0200
> From: Mads Ynddal
> Subject: Re: [RFC 0/6] scripts: Rewrite simpletrace printer in Rust
> X-Mailer: Apple Mail (2.3774.600.62)
>
>
> >> Maybe later, Rust-simpletrace and
Hi Paolo,
Sorry to re-pick this series, is it an acceptable cleanup to separate the
current kvmclock/kvmclock2 if the old kvmclock can't be dropped?
Thanks,
Zhao
On Fri, Mar 29, 2024 at 06:19:47PM +0800, Zhao Liu wrote:
> Date: Fri, 29 Mar 2024 18:19:47 +0800
> From: Zhao Liu
> Subjec
Hi mainatainers,
Just a friendly ping.
Thanks,
Zhao
On Mon, May 06, 2024 at 04:51:47PM +0800, Zhao Liu wrote:
> Date: Mon, 6 May 2024 16:51:47 +0800
> From: Zhao Liu
> Subject: [PATCH v2 0/6] target/i386: Misc cleanup on KVM PV defs and
> outdated comments
> X-Mailer: git-se
+--
> docs/about/removed-features.rst | 2 +-
> hw/i386/pc.c| 25 -
> hw/i386/pc_piix.c | 19 ---
> 4 files changed, 3 insertions(+), 47 deletions(-)
Reviewed-by: Zhao Liu
changed, 29 insertions(+), 33 deletions(-)
Reviewed-by: Zhao Liu
Adjust the "cpus" parameter to match the comment configuration.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/unit/test-smp-parse.c b/tests/unit/test-smp-parse.c
index c9cbc89c21b9..5d99e0d92
With module level, QEMU now support 8-levels topology hierarchy.
Cover "modules" in SMP_CONFIG_WITH_FULL_TOPO related cases.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 129
1 file changed, 85 insertions(+), 44 deletions(-)
diff --g
Since -smp allows parameters=1 whether the level is supported by
machine, to avoid the test scenarios where the parameter defaults to 1
cause some errors to be masked, explicitly set undesired parameters to
0.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 8
1 file changed
SMP_CONFIG_WITH_FULL_TOPO hasn't support module level, so the parameter
should indicate the "clusters".
Additionally, reorder the parameters of -smp to match the topology
hierarchy order.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 4 +++-
1 file changed, 3 insert
Since i386 PC machine supports both "modules" and "dies" in -smp, add the
"modules" and "dies" combination test case to match the actual topology
usage scenario.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 103
Cover the module cases in test-smp-parse.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 112 +---
1 file changed, 103 insertions(+), 9 deletions(-)
diff --git a/tests/unit/test-smp-parse.c b/tests/unit/test-smp-parse.c
index 2214e47ba9c0
Currently, -smp supports module level.
It is necessary to consider the effects of module in the test cases to
ensure that the calculations are correct. This is also the preparation
to add module test cases.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 13 +++--
1 file
.
Thanks and Best Regadrs,
Zhao
---
Zhao Liu (8):
tests/unit/test-smp-parse: Fix comments of drawers and books case
tests/unit/test-smp-parse: Fix comment of parameters=1 case
tests/unit/test-smp-parse: Fix an invalid topology case
tests/unit/test-smp-parse: Use default parameters=0 when not set
Fix the comments to match the actual configurations.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/unit/test-smp-parse.c b/tests/unit/test-smp-parse.c
index 9fdba24fce56..fa8e7d83a7b6 100644
--- a/tests
> > +fn read_trace_records(
> > +events: ,
> > +fobj: ,
> > +analyzer: Formatter,
> > +read_header: bool,
> > +) -> Result>
> > +{
> > +/* backtrace::Backtrace needs this env variable. */
> > +env::set_var("RUST_BACKTRACE", "1");
> > +let bt = Backtrace::new();
> > +
> > +fn read_type(mut fobj: ) -> Result
> > +{
> > +let mut tbuf = [0u8; 8];
> > +if let Err(e) = fobj.read_exact( tbuf) {
> > +if e.kind() == ErrorKind::UnexpectedEof {
> > +return Ok(RecordType::Empty);
> > +} else {
> > +
> > +/*
> > + * Refer to the description of ALLOWED_TYPES in
> > + * scripts/tracetool/__init__.py.
>
> Please don't reference the Python implementation because this will not
> age well. It may bitrot if the Python code changes or if the Python
> implementation is deprecated then the source file
Hi Stefan,
[snip]
> > diff --git a/scripts/simpletrace-rust/.rustfmt.toml
> > b/scripts/simpletrace-rust/.rustfmt.toml
> > new file mode 100644
> > index ..97a97c24ebfb
> > --- /dev/null
> > +++ b/scripts/simpletrace-rust/.rustfmt.toml
> > @@ -0,0 +1,9 @@
> > +brace_style =
Hi Stefan,
On Mon, May 27, 2024 at 03:59:44PM -0400, Stefan Hajnoczi wrote:
> Date: Mon, 27 May 2024 15:59:44 -0400
> From: Stefan Hajnoczi
> Subject: Re: [RFC 0/6] scripts: Rewrite simpletrace printer in Rust
>
> On Mon, May 27, 2024 at 04:14:15PM +0800, Zhao Liu wrote:
>
Hi Mads,
On Mon, May 27, 2024 at 12:49:06PM +0200, Mads Ynddal wrote:
> Date: Mon, 27 May 2024 12:49:06 +0200
> From: Mads Ynddal
> Subject: Re: [RFC 0/6] scripts: Rewrite simpletrace printer in Rust
> X-Mailer: Apple Mail (2.3774.600.62)
>
> Hi,
>
> Interesting work. I don't have any
Hi Chuang,
On Mon, May 27, 2024 at 11:13:33AM +0800, Chuang Xu wrote:
> Date: Mon, 27 May 2024 11:13:33 +0800
> From: Chuang Xu
> Subject: [PATCH] x86: cpu: fixup number of addressable IDs for processor
> cores in the physical package
According to the usual practice of QEMU commits, people
Hi Igor,
On Mon, May 27, 2024 at 05:03:17PM +0200, Igor Mammedov wrote:
> Date: Mon, 27 May 2024 17:03:17 +0200
> From: Igor Mammedov
> Subject: Re: [PATCH] x86: cpu: fixup number of addressable IDs for
> processor cores in the physical package
> X-Mailer: Claws Mail 4.2.0 (GTK 3.24.41;
Use CPUTopology to honor the generic style of CPU capitalization
abbreviations.
Signed-off-by: Zhao Liu
---
* Split from the previous SMP cache RFC:
https://lore.kernel.org/qemu-devel/20240220092504.726064-2-zhao1@linux.intel.com/
---
hw/s390x/cpu-topology.c | 6
On Mon, May 27, 2024 at 02:41:01PM +0800, Shaoqin Huang wrote:
> Date: Mon, 27 May 2024 14:41:01 +0800
> From: Shaoqin Huang
> Subject: Re: [PATCH v9] arm/kvm: Enable support for
> KVM_ARM_VCPU_PMU_V3_FILTER
>
> Hi Zhao,
>
> Thanks for your proposed idea. If you are willing to take the PMU
ajjuri
> ---
> hw/acpi/acpi-cpu-hotplug-stub.c| 6 ++
> hw/acpi/cpu.c | 6 +-
> hw/acpi/generic_event_device.c | 17 +
> include/hw/acpi/generic_event_device.h | 4
> 4 files changed, 32 insertions(+), 1 deletion(-)
>
Reviewed-by: Zhao Liu
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