Hi Paolo,
On Thu, Jun 13, 2024 at 09:56:39AM +0200, Paolo Bonzini wrote:
> Date: Thu, 13 Jun 2024 09:56:39 +0200
> From: Paolo Bonzini
> Subject: Re: [RFC PATCH v2 3/5] rust: add PL011 device model
>
> Il gio 13 giu 2024, 09:13 Daniel P. Berrangé ha
> scritto:
>
> > On Wed, Jun 12, 2024 at 11:
On Tue, Jun 11, 2024 at 01:33:32PM +0300, Manos Pitsidianakis wrote:
> Date: Tue, 11 Jun 2024 13:33:32 +0300
> From: Manos Pitsidianakis
> Subject: [RFC PATCH v2 3/5] rust: add PL011 device model
> X-Mailer: git-send-email 2.44.0
>
> This commit adds a re-implementation of hw/char/pl011.c in Rust
; avx512-vp2intersect: AVX512 Vector Pair Intersection to a Pair
> of Mask Register
> avx-vnni : AVX VNNI Instruction
>
> Signed-off-by: Babu Moger
> ---
> target/i386/cpu.c | 131 ++
> 1 file changed, 131 insertions(+)
Reviewed-by: Zhao Liu
lume 2: System Programming
> Publication # 24593 Revision 3.41.
>
> Signed-off-by: Babu Moger
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
> ---
> target/i386/cpu.c | 15 +++
> 1 file changed, 15 insertions(+)
Reviewed-by: Zhao Liu
te, index, count,
> +R_EBX) & 0xf;
Although only EAX[bit 0] and EBX[bits 0-3] are supported right now, I
think it's better to use “|=” rather than just override the
original *eax and *ebx, which will prevent future mistakes or omissions.
Otherwise,
Reviewed-by: Zhao Liu
lowRecov: MCA overflow recovery support.
>
> Signed-off-by: Babu Moger
> ---
> target/i386/cpu.c | 30 ++
> 1 file changed, 30 insertions(+)
Reviewed-by: Zhao Liu
On Tue, Jun 11, 2024 at 01:41:57PM +0300, Manos Pitsidianakis wrote:
> Date: Tue, 11 Jun 2024 13:41:57 +0300
> From: Manos Pitsidianakis
> Subject: Re: [RFC PATCH v1 0/6] Implement ARM PL011 in Rust
>
> > Currently, pl011 exclusively occupies a cargo as a package. In the
> > future, will other Ru
On Tue, Jun 11, 2024 at 09:18:25AM +0100, Daniel P. Berrangé wrote:
> Date: Tue, 11 Jun 2024 09:18:25 +0100
> From: "Daniel P. Berrangé"
> Subject: Re: [RFC PATCH v1 0/6] Implement ARM PL011 in Rust
>
> On Mon, Jun 10, 2024 at 09:22:35PM +0300, Manos Pitsidianakis wrote:
> > What are the issues w
On Tue, Jun 11, 2024 at 09:22:44AM +0100, Daniel P. Berrangé wrote:
> Date: Tue, 11 Jun 2024 09:22:44 +0100
> From: "Daniel P. Berrangé"
> Subject: Re: [RFC PATCH v1 0/6] Implement ARM PL011 in Rust
>
> On Mon, Jun 10, 2024 at 09:22:35PM +0300, Manos Pitsidianakis wrote:
> > Hello everyone,
> >
ed-off-by: Guixiong Wei
> Signed-off-by: Yipeng Yin
> Signed-off-by: Chuang Xu
> ---
> target/i386/cpu.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
Thanks! LGTM,
Reviewed-by: Zhao Liu
On Fri, Jun 07, 2024 at 03:47:01PM +0800, Xiaoyao Li wrote:
> Date: Fri, 7 Jun 2024 15:47:01 +0800
> From: Xiaoyao Li
> Subject: Re: [PATCH] i386/apic: Add hint on boot failure because of
> disabling x2APIC
>
> On 6/7/2024 3:46 PM, Zhao Liu wrote:
> > Hi Philippe,
>
Hi Philippe,
On Fri, Jun 07, 2024 at 08:17:36AM +0200, Philippe Mathieu-Daudé wrote:
> Date: Fri, 7 Jun 2024 08:17:36 +0200
> From: Philippe Mathieu-Daudé
> Subject: Re: [PATCH] i386/apic: Add hint on boot failure because of
> disabling x2APIC
>
> On 6/6/24 16:08, Zhao Liu wr
-
> 3 files changed, 1 insertion(+), 67 deletions(-)
> delete mode 100644 scripts/tracetool/vcpu.py
Reviewed-by: Zhao Liu
order to separate the exact error message from the
(perhaps effectively) hint, adding a hint via error_append_hint() is
also necessary. Therefore, introduce @local_error in
apic_common_set_id() to handle both the error message and the error
hint.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by:
Hi Paolo,
Just a ping for this cleanup series.
Thanks,
Zhao
On Mon, May 06, 2024 at 04:51:47PM +0800, Zhao Liu wrote:
> Date: Mon, 6 May 2024 16:51:47 +0800
> From: Zhao Liu
> Subject: [PATCH v2 0/6] target/i386: Misc cleanup on KVM PV defs and
> outdated comments
> X-Mailer:
restrictions. Thus,
to avoid confusion, avoid mentioning specific maximum vCPU number
limitations here.
Suggested-by: Daniel P. Berrangé
Signed-off-by: Zhao Liu
---
docs/system/target-i386-desc.rst.inc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/docs/system/target-i386
On Thu, Jun 06, 2024 at 09:41:47AM +0200, Paolo Bonzini wrote:
> Date: Thu, 6 Jun 2024 09:41:47 +0200
> From: Paolo Bonzini
> Subject: Re: [PATCH] stubs/meson: Fix qemuutil build when --disable-system
>
> On 6/5/24 17:25, Zhao Liu wrote:
> > Compiling without system, user,
On Thu, Jun 06, 2024 at 12:44:09AM +0200, Paolo Bonzini wrote:
> Date: Thu, 6 Jun 2024 00:44:09 +0200
> From: Paolo Bonzini
> Subject: [PATCH] target/i386: SEV: do not assume machine->cgs is SEV
> X-Mailer: git-send-email 2.45.1
>
> There can be other confidential computing classes that are not
On Wed, Jun 05, 2024 at 11:25:49PM +0800, Zhao Liu wrote:
> Date: Wed, 5 Jun 2024 23:25:49 +0800
> From: Zhao Liu
> Subject: [PATCH] stubs/meson: Fix qemuutil build when --disable-system
> X-Mailer: git-send-email 2.34.1
>
> Compiling without system, user, tools or guest-ag
eported-by: Daniel P. Berrangé
Signed-off-by: Zhao Liu
---
stubs/meson.build | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/stubs/meson.build b/stubs/meson.build
index 3b9d42023cb2..a99522ab6bbf 100644
--- a/stubs/meson.build
+++ b/stubs/meson.build
@@ -45,17 +45,
On Tue, Jun 04, 2024 at 11:07:30AM +0100, Daniel P. Berrangé wrote:
> Date: Tue, 4 Jun 2024 11:07:30 +0100
> From: "Daniel P. Berrangé"
> Subject: Re: [PULL 17/63] stubs: include stubs only if needed
>
> On Tue, Apr 23, 2024 at 05:09:05PM +0200, Paolo Bonzini wrote:
> > Currently it is not docume
[snip]
> > > $ qemu-system-i386 -M pc-q35-9.0 -smp 666
> > > Unexpected error in apic_common_set_id() at ../hw/intc/apic_common.c:447:
> > > qemu-system-i386: APIC ID 255 requires x2APIC feature in CPU
> > > Abort trap: 6
> >
> > For tcg, it needs to set x2apic=on in -cpu.
>
> Thanks for clarify
hw/core: Add cache topology options in -smp
>
> On Tue, Jun 04, 2024 at 10:54:51AM +0200, Markus Armbruster wrote:
> > Zhao Liu writes:
> >
> > > Add "l1d-cache", "l1i-cache". "l2-cache", and "l3-cache" options in
>
Hi Daniel,
On Tue, Jun 04, 2024 at 10:29:15AM +0100, Daniel P. Berrangé wrote:
> Date: Tue, 4 Jun 2024 10:29:15 +0100
> From: "Daniel P. Berrangé"
> Subject: Re: [RFC v2 0/7] Introduce SMP Cache Topology
>
> On Thu, May 30, 2024 at 06:15:32PM +0800, Zhao Liu wrote:
>
Hi Chuang,
On Mon, Jun 03, 2024 at 04:36:41PM +0800, Chuang Xu wrote:
> Date: Mon, 3 Jun 2024 16:36:41 +0800
> From: Chuang Xu
> Subject: [PATCH v2] i386/cpu: fixup number of addressable IDs for processor
> cores in the physical package
> X-Mailer: git-send-email 2.24.3 (Apple Git-128)
>
> Whe
On Tue, Jun 04, 2024 at 10:47:44AM +0200, Markus Armbruster wrote:
> Date: Tue, 04 Jun 2024 10:47:44 +0200
> From: Markus Armbruster
> Subject: Re: [RFC v2 1/7] hw/core: Make CPU topology enumeration
> arch-agnostic
>
> Zhao Liu writes:
>
> > Hi Markus,
> >
n Mon, Jun 03, 2024 at 07:31:47PM +0200, Philippe Mathieu-Daudé wrote:
> > Hi Michael,
> >
> > On 2/6/24 15:30, Michael S. Tsirkin wrote:
> > > On Fri, Apr 12, 2024 at 11:57:35AM +0200, Philippe Mathieu-Daudé wrote:
> > > > Hi Zhao,
> >
Michael S. Tsirkin wrote:
> > On Fri, Apr 12, 2024 at 11:57:35AM +0200, Philippe Mathieu-Daudé wrote:
> > > Hi Zhao,
> > >
> > > On 12/4/24 10:53, Zhao Liu wrote:
> > > > From: Zhao Liu
> > > >
> > > > Commit e4e98c7eebfa (&q
[snip]
> > +CPUTopoInfo cpu_topo_descriptors[] = {
> > +[CPU_TOPO_LEVEL_INVALID] = { .name = "invalid", },
> > +[CPU_TOPO_LEVEL_THREAD] = { .name = "thread", },
> > +[CPU_TOPO_LEVEL_CORE]= { .name = "core",},
> > +[CPU_TOPO_LEVEL_MODULE] = { .name = "module", },
> > +
Hi Markus,
On Mon, Jun 03, 2024 at 02:25:36PM +0200, Markus Armbruster wrote:
> Date: Mon, 03 Jun 2024 14:25:36 +0200
> From: Markus Armbruster
> Subject: Re: [RFC v2 1/7] hw/core: Make CPU topology enumeration
> arch-agnostic
>
> Zhao Liu writes:
>
> > Cache t
On Tue, Jun 04, 2024 at 07:29:15AM +0200, Markus Armbruster wrote:
> Date: Tue, 04 Jun 2024 07:29:15 +0200
> From: Markus Armbruster
> Subject: Re: [PATCH] hw/core: Rename CpuTopology to CPUTopology
>
> Zhao Liu writes:
>
> > On Mon, Jun 03, 2024 at 01:54:15PM +0200,
On Mon, Jun 03, 2024 at 01:54:15PM +0200, Markus Armbruster wrote:
> Date: Mon, 03 Jun 2024 13:54:15 +0200
> From: Markus Armbruster
> Subject: Re: [PATCH] hw/core: Rename CpuTopology to CPUTopology
>
> Zhao Liu writes:
>
> > Use CPUTopology to honor the generic sty
_realizefn(), and this patch merges host_cpu_enable_cpu_pm()
> into kvm_cpu_realizefn().
>
> Fixes: f5cc5a5c1686 ("i386: split cpu accelerators from cpu.c, using
> AccelCPUClass")
> Fixes: 662175b91ff2 ("i386: reorder call to cpu_exec_realizefn")
> Signed-off-by: Zide Chen
> ---
LGTM,
Reviewed-by: Zhao Liu
DisasContext.cpuid_ext_features indicates CPUID.01H.ECX.
Use DisasContext.cpuid_7_0_ecx_features field to check RDPID feature bit
(CPUID_7_0_ECX_RDPID).
Fixes: 6750485bf42a ("target/i386: implement RDPID in TCG")
Inspired-by: Xinyu Li
Signed-off-by: Zhao Liu
---
target/i386/tcg/t
.inc | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Zhao Liu
x27;-mpopcnt', '-msse4.2'] + qemu_common_flags
> +endif
> if host_arch == 'x86_64'
>qemu_common_flags = ['-mcx16'] + qemu_common_flags
> endif
> --
> 2.45.1
Reviewed-by: Zhao Liu
POPCNT instruction.
> Use it freely in TCG-generated code.
>
> Signed-off-by: Paolo Bonzini
> ---
> host/include/i386/host/cpuinfo.h | 1 -
> tcg/i386/tcg-target.h| 5 ++---
> util/cpuinfo-i386.c | 1 -
> 3 files changed, 2 insertions(+), 5 deletions(-)
Reviewed-by: Zhao Liu
SSSE3 instructions
> (notably, PSHUFB which is used by QEMU's AES implementation).
> Do not bother checking it.
>
> Signed-off-by: Paolo Bonzini
> ---
> util/cpuinfo-i386.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Zhao Liu
> Use it freely in buffer_is_zero.
>
> Signed-off-by: Paolo Bonzini
> ---
> host/include/i386/host/cpuinfo.h | 1 -
> util/bufferiszero.c | 2 +-
> util/cpuinfo-i386.c | 1 -
> 3 files changed, 1 insertion(+), 3 deletions(-)
Reviewed-by: Zhao Liu
V.
> Use it freely in TCG generated code.
>
> Signed-off-by: Paolo Bonzini
> ---
> host/include/i386/host/cpuinfo.h | 1 -
> util/cpuinfo-i386.c | 1 -
> tcg/i386/tcg-target.c.inc| 15 +--
> 3 files changed, 1 insertion(+), 16 deletions(-)
Reviewed-by: Zhao Liu
is_zero, which has
> been removed; code to compute CPUINFO_SSE4 is dead.
>
> Signed-off-by: Paolo Bonzini
> ---
> host/include/i386/host/cpuinfo.h | 1 -
> util/cpuinfo-i386.c | 1 -
> 2 files changed, 2 deletions(-)
>
Reviewed-by: Zhao Liu
dented with
> hard-coded tabs rather than spaces. Normalise to match the rest
> of the file.
>
> Signed-off-by: Peter Maydell
> ---
> accel/kvm/kvm-all.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Zhao Liu
e/hw/boards.h | 1 -
> hw/core/machine.c | 2 +-
> 3 files changed, 6 insertions(+), 2 deletions(-)
Reviewed-by: Zhao Liu
On Fri, May 31, 2024 at 10:13:47AM -0700, Chen, Zide wrote:
> Date: Fri, 31 May 2024 10:13:47 -0700
> From: "Chen, Zide"
> Subject: Re: [PATCH V2 2/3] target/i386: call cpu_exec_realizefn before
> x86_cpu_filter_features
>
> On 5/30/2024 11:30 PM, Zhao Liu wrote:
On Fri, May 24, 2024 at 01:00:17PM -0700, Zide Chen wrote:
> Date: Fri, 24 May 2024 13:00:17 -0700
> From: Zide Chen
> Subject: [PATCH V2 3/3] target/i386: Move host_cpu_enable_cpu_pm into
> kvm_cpu_realizefn()
> X-Mailer: git-send-email 2.34.1
>
> It seems not a good idea to expand features in
Hi Zide,
On Fri, May 24, 2024 at 01:00:16PM -0700, Zide Chen wrote:
> Date: Fri, 24 May 2024 13:00:16 -0700
> From: Zide Chen
> Subject: [PATCH V2 2/3] target/i386: call cpu_exec_realizefn before
> x86_cpu_filter_features
> X-Mailer: git-send-email 2.34.1
>
> cpu_exec_realizefn which calls the
Hi Eric and Markus,
Just a gentle poke. What do you think of this ordering?
Thanks,
Zhao
On Fri, May 17, 2024 at 02:27:46PM +0800, Zhao Liu wrote:
> Date: Fri, 17 May 2024 14:27:46 +0800
> From: Zhao Liu
> Subject: [PATCH 0/2] qapi/qapi-schema: Clarify the dependency relationship
&
On Mon, May 27, 2024 at 07:19:56AM +0200, Thomas Huth wrote:
> Date: Mon, 27 May 2024 07:19:56 +0200
> From: Thomas Huth
> Subject: Re: [PATCH V2 1/3] vl: Allow multiple -overcommit commands
>
> On 24/05/2024 22.00, Zide Chen wrote:
> > Both cpu-pm and mem-lock are related to system resource over
Hi Zide,
On Wed, May 29, 2024 at 10:31:21AM -0700, Chen, Zide wrote:
> Date: Wed, 29 May 2024 10:31:21 -0700
> From: "Chen, Zide"
> Subject: Re: [PATCH V2 0/3] improve -overcommit cpu-pm=on|off
>
>
>
> On 5/29/2024 5:46 AM, Igor Mammedov wrote:
> > On Tue, 28 May 2024 11:16:59 -0700
> > "Chen,
Zide Chen
> ---
>
> v2:
>
> Thanks to Thomas' suggestion, changed to this better approach, which
> is more generic and can handle situations like: "enabled the option in
> the config file, and now you'd like to disable it on the command line
> again".
>
> system/vl.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Zhao Liu
CPU_TOPO_LEVEL_SOCKET.
Also, enumerate additional topology levels for non-i386 arches, and add
helpers for topology enumeration and string conversion.
Signed-off-by: Zhao Liu
---
Changes since RFC v1:
* Use QAPI to enumerate CPU topology levels.
* Drop string_to_cpu_topo() since QAPI will help to
User will configure SMP cache topology via -smp.
For this case, update the x86 CPUs' cache topology with user's
configuration in MachineState.
Signed-off-by: Zhao Liu
---
target/i386/cpu.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/target/i386/cpu.
Allows cache to be defined at the thread and module level. This
increases flexibility for x86 users to customize their cache topology.
Signed-off-by: Zhao Liu
---
target/i386/cpu.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386
Add "l1d-cache", "l1i-cache". "l2-cache", and "l3-cache" options in
-smp to define the cache topology for SMP system.
Signed-off-by: Zhao Liu
---
Changes since RFC v1:
* Set has_*_cache field in machine_get_smp(). (JeeHeng)
* Adjust string breaking
Signed-off-by: Zhao Liu
---
Changes since RFC v1:
* Use "*_cache=topo_level" as -smp example as the original "level"
term for a cache has a totally different meaning. (Jonathan)
---
qemu-options.hx | 50 +++--
1 file changed,
ache, L1 I-cache, L2 cache and
L3 cache in machine as the basic cache topology support.
Signed-off-by: Zhao Liu
---
hw/core/machine.c | 5 +
include/hw/boards.h | 25 +
2 files changed, 30 insertions(+)
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 80
Daniel's question about how x86 support L2 cache domain (cluster)
configuration:
https://lore.kernel.org/qemu-devel/zcug0uc8kyleq...@redhat.com/
Thanks and Best Regards,
Zhao
---
Changelog:
Main changes since RFC v1:
* Split CpuTopology renaimg out of this RFC.
* Use QAPI to enu
Signed-off-by: Zhao Liu
---
hw/i386/pc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 7b638da7aaa8..2e03b33a4116 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1844,6 +1844,9 @@ static void pc_machine_class_init(ObjectClass *oc, void
*data)
mc
Hi Stefan,
On Tue, May 28, 2024 at 10:14:01AM -0400, Stefan Hajnoczi wrote:
> Date: Tue, 28 May 2024 10:14:01 -0400
> From: Stefan Hajnoczi
> Subject: Re: [RFC 1/6] scripts/simpletrace-rust: Add the basic cargo
> framework
>
> On Tue, May 28, 2024 at 03:53:55PM +0800, Zhao
Hi Stefan and Mads,
On Wed, May 29, 2024 at 11:33:42AM +0200, Mads Ynddal wrote:
> Date: Wed, 29 May 2024 11:33:42 +0200
> From: Mads Ynddal
> Subject: Re: [RFC 0/6] scripts: Rewrite simpletrace printer in Rust
> X-Mailer: Apple Mail (2.3774.600.62)
>
>
> >> Maybe later, Rust-simpletrace and py
Hi Paolo,
Sorry to re-pick this series, is it an acceptable cleanup to separate the
current kvmclock/kvmclock2 if the old kvmclock can't be dropped?
Thanks,
Zhao
On Fri, Mar 29, 2024 at 06:19:47PM +0800, Zhao Liu wrote:
> Date: Fri, 29 Mar 2024 18:19:47 +0800
> From: Zhao Liu
> S
Hi mainatainers,
Just a friendly ping.
Thanks,
Zhao
On Mon, May 06, 2024 at 04:51:47PM +0800, Zhao Liu wrote:
> Date: Mon, 6 May 2024 16:51:47 +0800
> From: Zhao Liu
> Subject: [PATCH v2 0/6] target/i386: Misc cleanup on KVM PV defs and
> outdated comments
> X-Mailer: git-se
+--
> docs/about/removed-features.rst | 2 +-
> hw/i386/pc.c| 25 -
> hw/i386/pc_piix.c | 19 ---
> 4 files changed, 3 insertions(+), 47 deletions(-)
Reviewed-by: Zhao Liu
; 1 file changed, 29 insertions(+), 33 deletions(-)
Reviewed-by: Zhao Liu
Adjust the "cpus" parameter to match the comment configuration.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/unit/test-smp-parse.c b/tests/unit/test-smp-parse.c
index c9cbc89c21b9..5d99e0d9234c 10
With module level, QEMU now support 8-levels topology hierarchy.
Cover "modules" in SMP_CONFIG_WITH_FULL_TOPO related cases.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 129
1 file changed, 85 insertions(+), 44 deletions(-)
diff --g
Since -smp allows parameters=1 whether the level is supported by
machine, to avoid the test scenarios where the parameter defaults to 1
cause some errors to be masked, explicitly set undesired parameters to
0.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 8
1 file changed
SMP_CONFIG_WITH_FULL_TOPO hasn't support module level, so the parameter
should indicate the "clusters".
Additionally, reorder the parameters of -smp to match the topology
hierarchy order.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 4 +++-
1 file changed, 3 i
Since i386 PC machine supports both "modules" and "dies" in -smp, add the
"modules" and "dies" combination test case to match the actual topology
usage scenario.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 103
Cover the module cases in test-smp-parse.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 112 +---
1 file changed, 103 insertions(+), 9 deletions(-)
diff --git a/tests/unit/test-smp-parse.c b/tests/unit/test-smp-parse.c
index 2214e47ba9c0
Currently, -smp supports module level.
It is necessary to consider the effects of module in the test cases to
ensure that the calculations are correct. This is also the preparation
to add module test cases.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 13 +++--
1 file
sc cleanup.
Thanks and Best Regadrs,
Zhao
---
Zhao Liu (8):
tests/unit/test-smp-parse: Fix comments of drawers and books case
tests/unit/test-smp-parse: Fix comment of parameters=1 case
tests/unit/test-smp-parse: Fix an invalid topology case
tests/unit/test-smp-parse: Use default parameters=0 wh
Fix the comments to match the actual configurations.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/unit/test-smp-parse.c b/tests/unit/test-smp-parse.c
index 9fdba24fce56..fa8e7d83a7b6 100644
--- a/tests
> > +fn read_trace_records(
> > +events: &Vec,
> > +fobj: &File,
> > +analyzer: &mut Formatter,
> > +read_header: bool,
> > +) -> Result>
> > +{
> > +/* backtrace::Backtrace needs this env variable. */
> > +env::set_var("RUST_BACKTRACE", "1");
> > +let bt = Backtrace::ne
> > +fn read_type(mut fobj: &File) -> Result
> > +{
> > +let mut tbuf = [0u8; 8];
> > +if let Err(e) = fobj.read_exact(&mut tbuf) {
> > +if e.kind() == ErrorKind::UnexpectedEof {
> > +return Ok(RecordType::Empty);
> > +} else {
> > +
> > +/*
> > + * Refer to the description of ALLOWED_TYPES in
> > + * scripts/tracetool/__init__.py.
>
> Please don't reference the Python implementation because this will not
> age well. It may bitrot if the Python code changes or if the Python
> implementation is deprecated then the source file w
Hi Stefan,
[snip]
> > diff --git a/scripts/simpletrace-rust/.rustfmt.toml
> > b/scripts/simpletrace-rust/.rustfmt.toml
> > new file mode 100644
> > index ..97a97c24ebfb
> > --- /dev/null
> > +++ b/scripts/simpletrace-rust/.rustfmt.toml
> > @@ -0,0 +1,9 @@
> > +brace_style = "AlwaysNe
Hi Stefan,
On Mon, May 27, 2024 at 03:59:44PM -0400, Stefan Hajnoczi wrote:
> Date: Mon, 27 May 2024 15:59:44 -0400
> From: Stefan Hajnoczi
> Subject: Re: [RFC 0/6] scripts: Rewrite simpletrace printer in Rust
>
> On Mon, May 27, 2024 at 04:14:15PM +0800, Zhao Liu wrote:
> &g
Hi Mads,
On Mon, May 27, 2024 at 12:49:06PM +0200, Mads Ynddal wrote:
> Date: Mon, 27 May 2024 12:49:06 +0200
> From: Mads Ynddal
> Subject: Re: [RFC 0/6] scripts: Rewrite simpletrace printer in Rust
> X-Mailer: Apple Mail (2.3774.600.62)
>
> Hi,
>
> Interesting work. I don't have any particula
Hi Chuang,
On Mon, May 27, 2024 at 11:13:33AM +0800, Chuang Xu wrote:
> Date: Mon, 27 May 2024 11:13:33 +0800
> From: Chuang Xu
> Subject: [PATCH] x86: cpu: fixup number of addressable IDs for processor
> cores in the physical package
According to the usual practice of QEMU commits, people tend
Hi Igor,
On Mon, May 27, 2024 at 05:03:17PM +0200, Igor Mammedov wrote:
> Date: Mon, 27 May 2024 17:03:17 +0200
> From: Igor Mammedov
> Subject: Re: [PATCH] x86: cpu: fixup number of addressable IDs for
> processor cores in the physical package
> X-Mailer: Claws Mail 4.2.0 (GTK 3.24.41; x86_64-r
Use CPUTopology to honor the generic style of CPU capitalization
abbreviations.
Signed-off-by: Zhao Liu
---
* Split from the previous SMP cache RFC:
https://lore.kernel.org/qemu-devel/20240220092504.726064-2-zhao1@linux.intel.com/
---
hw/s390x/cpu-topology.c | 6
On Mon, May 27, 2024 at 02:41:01PM +0800, Shaoqin Huang wrote:
> Date: Mon, 27 May 2024 14:41:01 +0800
> From: Shaoqin Huang
> Subject: Re: [PATCH v9] arm/kvm: Enable support for
> KVM_ARM_VCPU_PMU_V3_FILTER
>
> Hi Zhao,
>
> Thanks for your proposed idea. If you are willing to take the PMU Filt
ajjuri
> ---
> hw/acpi/acpi-cpu-hotplug-stub.c| 6 ++
> hw/acpi/cpu.c | 6 +-
> hw/acpi/generic_event_device.c | 17 +
> include/hw/acpi/generic_event_device.h | 4
> 4 files changed, 32 insertions(+), 1 deletion(-)
>
Reviewed-by: Zhao Liu
iewed-by: Gavin Shan
> Reviewed-by: David Hildenbrand
> Reviewed-by: Shaoqin Huang
> Tested-by: Vishnu Pajjuri
> Tested-by: Xianglai Li
> Tested-by: Miguel Luis
> ---
> hw/acpi/cpu.c | 2 +-
> include/hw/acpi/cpu_hotplug.h | 2 ++
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
Reviewed-by: Zhao Liu
-by: Vishnu Pajjuri
> Reviewed-by: Nicholas Piggin
> ---
> accel/kvm/kvm-all.c| 95 --
> accel/kvm/kvm-cpus.h | 23 ++
> accel/kvm/trace-events | 5 ++-
> 3 files changed, 90 insertions(+), 33 deletions(-)
>
Reviewed-by: Zhao Liu
[Patch 4,5]
> 4. Helper functions to support unrealization of CPU objects [Patch 6,7]
> 5. Docs [Patch 8]
>
Ran QTESTs on x86 platform, now this series no longer breaks x86-related
tests, so,
Tested-by: Zhao Liu
Describe how to compile and use this Rust version program.
And also define the Rust code contribution requirements.
Signed-off-by: Zhao Liu
---
docs/devel/tracing.rst | 35 +++
1 file changed, 35 insertions(+)
diff --git a/docs/devel/tracing.rst b/docs/devel
Refer to scripts/simpletrace.py, add the helpers to read the trace file
and parse the record type field, record header and log header.
Suggested-by: Paolo Bonzini
Signed-off-by: Zhao Liu
---
scripts/simpletrace-rust/src/main.rs | 151 +++
1 file changed, 151 insertions
Format simple trace output, as in the Python version. Further, complete
the trace file input and trace log output.
Additionally, remove `#![allow(dead_code)]` and
`#![allow(unused_variables)]` to allow rustc to do related checks.
Suggested-by: Paolo Bonzini
Signed-off-by: Zhao Liu
---
scripts
Refer to scripts/tracetool/__init__.py, add Event & Arguments
abstractions in trace module.
Suggested-by: Paolo Bonzini
Signed-off-by: Zhao Liu
---
scripts/simpletrace-rust/Cargo.lock | 52
scripts/simpletrace-rust/Cargo.toml | 2 +
scripts/simpletrace-rust/src/trace.rs |
: Zhao Liu
---
scripts/simpletrace-rust/.gitignore| 1 +
scripts/simpletrace-rust/.rustfmt.toml | 9 +
scripts/simpletrace-rust/Cargo.lock| 239 +
scripts/simpletrace-rust/Cargo.toml| 11 ++
scripts/simpletrace-rust/src/main.rs | 173
org/Google_Summer_of_Code_2024
[2]: https://github.com/mesonbuild/meson/issues/2173
[3]:
https://lore.kernel.org/qemu-devel/20240509134712.ga515...@fedora.redhat.com/
Thanks and Best Regards,
Zhao
---
Zhao Liu (6):
scripts/simpletrace-rust: Add the basic cargo framework
scripts/simpletrace
ggested-by: Paolo Bonzini
Signed-off-by: Zhao Liu
---
scripts/simpletrace-rust/Cargo.lock | 79 +
scripts/simpletrace-rust/Cargo.toml | 4 +
scripts/simpletrace-rust/src/main.rs | 253 ++-
3 files changed, 329 insertions(+), 7 deletions(-)
diff --git a/scripts/s
Currently, block-core.json is not explicitly listed in the
qapi-schema.json.
To make the dependencies clearer, list block-core.json in section 2.
Signed-off-by: Zhao Liu
---
qapi/qapi-schema.json | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/qapi/qapi
ed on this, the new files should be placed in the corresponding
sections according to the dependencies/dependency hierarchy.
Signed-off-by: Zhao Liu
---
qapi/qapi-schema.json | 100 +-
1 file changed, 69 insertions(+), 31 deletions(-)
diff --git a/qapi
manually categorize and sort JSON files
generation order by dependencies/dependency hierarchy, to improve the
readability and maintainability of qapi-schema.json.
Welcome your feedback!
Thanks and Best Regards,
Zhao
---
Zhao Liu (2):
qapi: Reorder and categorize json files in qapi-schema.json
qapi
sockets = CPU_TOPOLOGY_GENERIC(8, 2, 2, 2, 8),
> +.expect_prefer_cores = CPU_TOPOLOGY_GENERIC(8, 2, 2, 2, 8),
> },
> };
>
As Xiaoyao's suggestion, only the nit in the comment.
Others look good to me, so,
Reviewed-by: Zhao Liu
tively reverts
>
> commit 54c4ea8f3ae614054079395842128a856a73dbf9
> Author: Zhao Liu
> Date: Sat Mar 9 00:01:37 2024 +0800
>
> hw/core/machine-smp: Deprecate unsupported "parameter=1" SMP
> configurations
>
> but is not done as a 'git revert' since the part of the ch
On Wed, May 15, 2024 at 06:06:56PM +0100, Daniel P. Berrangé wrote:
> Date: Wed, 15 May 2024 18:06:56 +0100
> From: "Daniel P. Berrangé"
> Subject: Re: [PATCH 1/2] hw/core: allow parameter=1 for SMP topology on any
> machine
>
> On Tue, May 14, 2024 at 11:4
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