I have a version with this fixed. I will post my patches(v3) with this
changed.
Thanks,
--
Pranith
nd
>>> docs/atomics.txt. Why don't be consistent and avoid introducing yet
>>> another term for the same thing?
>>>
>> Fair point. Do you think tcg_out_mb() is better then?
>
> Yes, if used together with 'INDEX_op_mb', of course.
>
OK. I'll make the change. Thanks for the feedback!
--
Pranith
ve any armv7 images handy to test the backends.
>
Thanks Richard for fixing this up for other archs. You saved me a ton of work :)
I'll rebase my work on top of this patch series.
Regards,
--
Pranith
Hi Richard,
Thank you for the helpful comments.
On Wed, May 25, 2016 at 1:35 PM, Richard Henderson wrote:
> On 05/24/2016 10:18 AM, Pranith Kumar wrote:
>> diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
>> index 92be341..93ea42e 100644
>> --- a/tcg/i386/tcg-
eration for now.
Thanks,
--
Pranith
ors) is enabled since fences
are not necessary on UP systems.
--
Pranith
tend knows when it needs to use the op
>
Sure, I will add this information.
Thanks!
--
Pranith
Signed-off-by: Pranith Kumar
---
target-arm/translate.c | 11 +--
tcg/tcg-op.h | 5 +
tcg/tcg-opc.h | 2 +-
3 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index c946c0e..3407176 100644
--- a/target
This commit introduces the TCGOpcode for fence instruction.
Signed-off-by: Pranith Kumar
---
tcg/i386/tcg-target.inc.c | 4
tcg/tcg-opc.h | 2 ++
tcg/tcg.c | 2 ++
3 files changed, 8 insertions(+)
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg
Signed-off-by: Pranith Kumar
---
tcg/i386/tcg-target.h | 1 +
tcg/i386/tcg-target.inc.c | 9 +
tcg/tcg-opc.h | 2 +-
tcg/tcg.c | 1 +
4 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 92be341
ions found
online. I've previously contributed some patches to the linux kernel and
worked on open source architectural simulators as part of my grad work. You
can find me on IRC(username: pranith) where I except to bother all of you
during the coming months.
I plan to occasionally blog about m
** Changed in: qemu
Status: New => Confirmed
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Title:
Frozen Windows 7 VMs with VGA CVE-2016-3712 fix (2.6.0 and 2.5.1.1)
Status in QEMU:
late can we rename this to
atomic_load_acquire()/atomic_store_release() like in the linux kernel?
Looks good either way.
Reviewed-by: Pranith Kumar
--
Pranith
Add a missing end brace and update doc to point to the latest access
macro. ACCESS_ONCE() is deprecated.
Signed-off-by: Pranith Kumar
---
docs/atomics.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/docs/atomics.txt b/docs/atomics.txt
index ef285e3..bba771e 100644
** Changed in: qemu
Status: New => Confirmed
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Title:
TCG: mov to segment register is incorrectly emulated for AMD CPUs
Status in QEMU:
On Tue, Apr 12, 2016 at 5:20 PM, Paolo Bonzini wrote:
> FWIW I'll be mostly offline this week and on vacation starting from the
> next, so it's probably best if you send the patch at the beginning of
> May. It will be fixed _and_ act as a reminder. :)
Sure, I will do so in May.
--
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On Tue, Apr 12, 2016 at 7:42 AM, Marc-André Lureau
wrote:
> Hi
>
> On Mon, Apr 11, 2016 at 7:30 PM, Pranith Kumar wrote:
>> Add a missing end brace and update doc to point to the latest access
>> macro. ACCESS_ONE() is deprecated.
>
> ONE/ONCE
Right, I missed this o
Add a missing end brace and update doc to point to the latest access
macro. ACCESS_ONE() is deprecated.
Signed-off-by: Pranith Kumar
---
docs/atomics.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/docs/atomics.txt b/docs/atomics.txt
index ef285e3..bba771e 100644
+Raghavendra G who implemented this option in write-behind, to this
upstream patch review discussion
Pranith
On 04/06/2016 06:50 PM, Kevin Wolf wrote:
Am 06.04.2016 um 15:10 hat Jeff Cody geschrieben:
On Wed, Apr 06, 2016 at 01:51:59PM +0200, Kevin Wolf wrote:
Am 06.04.2016 um 13:41 hat
smp_wmb() or smp_rmb() to get
> reordered. In our case it was in thread-pool.c; Kevin Wolf did the
> analysis.
If ordering was crucial for those stores, I think it would have been
better to use atomics on them to enforce ordering.
Also, do you plan to introduce load_acquire/store_release() operations
like done in the linux kernel? They would cleanly map to gcc atomics
and make the ordering requirements explicit.
Thanks!
--
Pranith
stand one barrier(), but having two on both sides seems
unnecessary. I would prefer we clean up and have just one. Although, I
think it is just an annoyance since performance wise there is no
difference. Two consecutive barrier()'s should behave just like one.
Thanks!
--
Pranith
y passing init= option
> to kernel
>
I don't think this is a qemu problem. From the error message it looks
like init in your busybox root image is not configured properly. I
would focus on finding why the init file is not able to
run(permissions, maybe?).
--
Pranith
** Changed in: qemu
Status: New => Confirmed
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https://bugs.launchpad.net/bugs/1565395
Title:
qemu-2.4.1 fails when compiled against pulseaudio
Status in QEMU:
Confirmed
Bug
rdinit=/sbin/init”
>
Can you post the output when you run this command? In particular, does
the /sbin/init exist in the rootfs?
--
Pranith
quot;?
I am not sure busybox has sh shell installed or configured properly.
That is what your error message is pointing to atleast.
> starting init :/bin/sh exists but couldn’t execute it
> kernel panic – not syncing no working init found
Thanks!
--
Pranith
on stages and not during later stages:
http://www.spinics.net/lists/gcchelp/msg39798.html
AFAIU, in these later stages, even adding a barrier() as we are doing will
have no effect.
Can you point me to any docs which talk more about this?
Thanks!
--
Pranith
understand why this is
happening?
Thanks!
--
Pranith
Signed-off-by: Pranith Kumar
---
cpus.c | 4 ++--
qemu-options.hx | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/cpus.c b/cpus.c
index 9592163..bc774e2 100644
--- a/cpus.c
+++ b/cpus.c
@@ -630,7 +630,7 @@ void configure_icount(QemuOpts *opts, Error **errp
icount sleep takes on or off as options. A few places mention sleep=no
which is not accepted. This patch corrects them.
Signed-off-by: Pranith Kumar
---
cpus.c | 4 ++--
qemu-options.hx | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/cpus.c b/cpus.c
index
icount sleep takes on or off as options. A few places mention sleep=no
which is not accepted. This patch corrects them.
Signed-off-by: Pranith Kumar
---
cpus.c | 4 ++--
qemu-options.hx | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/cpus.c b/cpus.c
index
think is going to based on top of Alvise's work. I am comfortable in
working with various memory consistency models and have a decent
programming experience.
Please let me know if you have any other suggestions for projects or
any other related advice.
Thanks!
--
Pranith
** Changed in: qemu
Status: New => Incomplete
** Changed in: qemu
Assignee: (unassigned) => pranith (bobby-prani)
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https://bugs.launchpad.net/bugs/1486911
Title:
Hi Dave,
Commit 334e580a6f97 ("fs: XFS_IOC_FS[SG]SETXATTR to
FS_IOC_FS[SG]ETXATTR promotion") breaks building latest qemu as
follows:
In file included from /usr/include/xfs/xfs.h:58:0,
from /home/pranith/qemu/block/raw-posix.c:96:
/usr/include/xfs/xfs_fs.h:4
23.795721] [] el1_irq+0x64/0xc0
[ 23.796131] [] cpu_startup_entry+0x130/0x204
[ 23.796605] [] rest_init+0x78/0x84
[ 23.797028] [] start_kernel+0x3a0/0x3b8
[ 23.797528] rcu_sched kthread starved for 2101 jiffies!
I will try to debug and see where it is hanging.
Thanks!
--
Pranith
OK. I am closing this then. :)
** Changed in: qemu
Status: New => Invalid
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https://bugs.launchpad.net/bugs/1531632
Title:
Can't compile qemu because of errors in the Xen code
What is your host processor?
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https://bugs.launchpad.net/bugs/1534382
Title:
loadvm makes Windows 7 x86 guest crash with some CPUs
Status in QEMU:
New
Bug description:
Running qe
*** This bug is a duplicate of bug 1505062 ***
https://bugs.launchpad.net/bugs/1505062
** This bug has been marked a duplicate of bug 1505062
Regression: QEMU 2.4 on Linux 4.2 fails to init display with SMM enabled
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** Changed in: qemu
Status: Confirmed => Fix Released
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https://bugs.launchpad.net/bugs/697197
Title:
Empty password allows access to VNC in libvirt
Status in libvirt:
Unknown
** Changed in: qemu
Status: New => Invalid
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Title:
qemu-system-arm hangs at start on OS X
Status in QEMU:
Invalid
Bug description:
** Changed in: qemu
Status: New => Fix Released
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Title:
qemu-img conversion to qcow2 hangs with blank image less than 100kiB
Status in Q
** Changed in: qemu
Status: New => Fix Released
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Title:
qemu-system-i386: -vnc localhost:0,to=99,id=default: Invalid parameter
'to'
St
** Changed in: qemu
Status: New => Fix Released
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Title:
Wrong signal handling in qemu-aarch64.
Status in QEMU:
Fix Released
Bug descr
** Changed in: qemu
Status: New => Fix Released
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Title:
qemu crashes when ctrl-alt-u is pressed
Status in QEMU:
Fix Released
Bug desc
** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
Cant compile on ubuntu 14.04 x64
Status in QEMU:
Fix Released
Bug d
This does not happend anymore with the upstream git. Closing. Please
reopen if you still see this.
** Changed in: qemu
Status: New => Fix Released
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Can you try the latest upstream git version from:
https://github.com/qemu/qemu?
Also can you post your configure command line?
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Title:
Error co
Fix has been committed upstream.
** Changed in: qemu
Status: New => Fix Released
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https://bugs.launchpad.net/bugs/1470170
Title:
Unsupported syscalls 370 and 355
Status in QEM
** Changed in: qemu
Status: New => Confirmed
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Title:
qemu on ARM hosts can't boot i386 image
Status in QEMU:
Confirmed
Status in Linaro
Can you post the `configure` command line you used when you try to
compile?
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Title:
Can't compile qemu because of errors in the Xen code
Status
ig=sig@entry=6) at
../nptl/sysdeps/unix/sysv/linux/raise.c:56
#1 0x722150d8 in __GI_abort () at abort.c:89
#2 0x5572014c in qemu_ram_addr_from_host_nofail
(ptr=0xffc000187863) at /home/pranith/devops/code/qemu/cputlb.c:357
#3 0x557209dd in get_page_addr_code
st annotating the code to generate appropriate
callbacks. You find the patches here:
https://github.com/pranith/qemu/commits/aaa8b521187e4ecd1d35914e9b119f9d6eaa8633
I try to rebase once a release comes out. The current version is based
on 2.4, so it is pretty current. I will rebase onto 2.5 in the
ter/examples/x86/cachesim.cpp
Setup instructions: https://github.com/pranith/qsim-setup
--
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se two are not upstream yet, would be great to see it there.
Thanks!
--
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ut I understand the
apprehension that might be. I will try to reproduce this with an upstream
virgin QEMU.
Thanks!
--
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769ee182 in start_thread (arg=0x7fffc3b94700) at
pthread_create.c:312
#18 0x7671b47d in clone () at
../sysdeps/unix/sysv/linux/x86_64/clone.S:111
--
Pranith
o '-d' option because of which monitor dumps
the logs to stderr.
Fix this by opening the log file when '-D' is specified on the command line.
Also fix an ancient comment which does not hold true since changing location and
log level has now been streamlined.
Signed-off-by: Pra
On Wed, Oct 15, 2014 at 10:12 PM, Max Filippov wrote:
> On Thu, Oct 16, 2014 at 6:00 AM, Pranith Kumar wrote:
>>>> +tcg_gen_add_i32(cpu_fence_count, cpu_fence_count, 1);
>>>
>>> tcg_gen_addi_i32, as you're adding an immediate.
>>> Enabling
Hi Peter,
On Thu, Oct 16, 2014 at 4:05 AM, Peter Maydell wrote:
> On 16 October 2014 03:45, Pranith Kumar wrote:
>> The problem I am facing is that this seems to be crashing when run with a
>> multi-threaded executable.
>
> This is nothing to do with your changes -- us
Hi Max,
On Wed, Oct 15, 2014 at 9:54 PM, Max Filippov wrote:
> Hi,
>
> On Thu, Oct 16, 2014 at 5:45 AM, Pranith Kumar wrote:
>> Is there something obviously wrong with what I am trying to do? Any help is
>> highly appreciated.
>> --- a/target-arm/translate.c
>
Hello,
I am trying to count the number of barrier instructions (dmb) which are being
executed in an multi-threaded ARM executable. I am running the executable using
qemu user mode with the following patch applied.
Basically I created two counters in the ARM cpu state and incrementing them by
gene
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