I have at least one 450Mhz k6 in my spare bedroom. I'll by happy to
sell it to you as a platform for running debian and qemu. I'm sure it's
performance would be lower than most of the current amd processors,
though it might not be slower than some of the current intel chips,
(*grin*).
--ric
> > On top of that try to find a specification for data
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Laurent DESNOGUES wrote:
On top of that try to find a specification for data
side behaviour, these beasts are not documented for
two reasons:
- they are heavily optimized and so not easily
described
- they often define the efficiency of a CPU and
so are considered as secret.
That might be t
> > The most complex thing to accurately simulate a modern
> > CPU (including ARMs) is the data cache and by far.
>
> Hm... you have to elaborate on that one. Aren't those caches like other
> caches, too? With well known algorithms like LRU?
Data caches typically do many things in one cycle; f
Hi,
Laurent DESNOGUES wrote:
The most complex thing to accurately simulate a modern
CPU (including ARMs) is the data cache and by far.
Hm... you have to elaborate on that one. Aren't those caches like other
caches, too? With well known algorithms like LRU?
In
comparison, getting accurate
> Now, CPUs is where I have only a vague idea of what would be needed to
> simulate. I know there are up to three levels of caches and main memory,
> which all have different access times. The CPU itself has a pipeline and
> branch prediction and such which could invalidate the contents of
> pi
> How much do misses on the branch prediction level cost? How much
> pipeline interlocks? I don't think those would be _that_ dramatic. Since
> today's compilers are said to be optimizing quite well...
It all depends on the code you're running. Certainly branch prediction can
have a major effect
Paul Brook wrote:
IMHO a benchmarking setup that doesn't reliably correspond to real system
performance is worse than useless.
Agreed. So let's see what's needed to get a reliably corresponding
system. I'm interested in three layers: CPU, hard disk and network.
Networking is the simplest, I
On Tuesday 12 September 2006 14:19, Markus Schiltknecht wrote:
> Paul Brook wrote:
> > Modern CPUs are complicated, with many factors effecting execution speed
> > (pipeline interlocks, multiple levels of cache). A cycle accurate
> > simulator will generally be orders of magnitude slower than qemu.
Paul Brook wrote:
Modern CPUs are complicated, with many factors effecting execution speed
(pipeline interlocks, multiple levels of cache). A cycle accurate simulator
will generally be orders of magnitude slower than qemu.
Would it be feasible to just limit the number of instructions qemu
sim
On Tuesday 12 September 2006 08:20, Tieu Ma Dau wrote:
> Hi all,
> I found that Qemu ARM system simulates ARM926EJ-S and
> ARM1026EJ-S processor. And I found on ARM website that
> the speed of these CPUs vary from 266 to 540 MHz.
> Could you tell me the exact speed of the ARM926EJ-S
> and ARM1026EJ
Tieu Ma Dau wrote:
Hi all,
I found that Qemu ARM system simulates ARM926EJ-S and
ARM1026EJ-S processor. And I found on ARM website that
the speed of these CPUs vary from 266 to 540 MHz.
Could you tell me the exact speed of the ARM926EJ-S
and ARM1026EJ-S processor simulated by Qemu? It's very
imp
Hi all,
I found that Qemu ARM system simulates ARM926EJ-S and
ARM1026EJ-S processor. And I found on ARM website that
the speed of these CPUs vary from 266 to 540 MHz.
Could you tell me the exact speed of the ARM926EJ-S
and ARM1026EJ-S processor simulated by Qemu? It's very
important for me to fini
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