On 2/17/22 11:31, Joel Stanley wrote:
It was scheduled for removal in 7.0.
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Thanks,
C.
--
v2: also remove from docs/about/deprecated.rst
v3: remove strap define, add note to removed-features.rst
---
docs/about/deprecated.rst
On Wed, 2021-12-22 at 11:05 -0800, Steve Sistare wrote:
> Allocate anonymous memory using memfd_create if the memfd-alloc
> machine
> option is set.
>
> Signed-off-by: Steve Sistare
> ---
> hw/core/machine.c | 19 +++
> include/hw/boards.h | 1 +
> qemu-options.hx | 6 +++
From: Joel Stanley
It was scheduled for removal in 7.0.
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Message-Id: <20220217103141.385345-1-j...@jms.id.au>
Signed-off-by: Cédric Le Goater
---
docs/about/deprecated.rst | 7
docs/about/removed-features.rst | 5 +++
docs
From: Joel Stanley
When time permits, we should introduce defines for the HW strapping
registers to cleanly decode the values.
SCU500 = 0x00422016
Disable ARM JTAG trusted world debug: 0x1
Disable ARM JTAG debug: 0x1
VGA Memory Size: 0x1 [16MB]
Cortex M3: 0x1 [Disabled]
Boot device: 0x
From: Joel Stanley
Just a stub that indicates the system has booted in secure boot mode.
Used for testing the driver:
https://lore.kernel.org/all/20211019080608.283324-1-j...@jms.id.au/
Signed-off-by: Joel Stanley
[ clg: - Fixed typo
- Adjusted Copyright dates ]
Signed-off-by: Cédric L
This is useful to analyze changes in the U-Boot RAM driver when SDRAM
training is performed.
Signed-off-by: Cédric Le Goater
---
hw/misc/aspeed_sdmc.c | 2 ++
hw/misc/trace-events | 4
2 files changed, 6 insertions(+)
diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
index 08f856
Hi,
Here is a set of extensions for the Aspeed machines, the most
important ones being the removal of a deprecated machine and a simple
model for the Secure Boot Controller, both from Joel.
Thanks,
C.
Changes in v2:
- new create_pca9552() helper (Philippe)
- fixed typos
- fixed removal of
From: Joel Stanley
This helps quieten booting the current Rainier kernel.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Joel Stanley
Signed-off-by: Cédric Le Goater
---
hw/arm/aspeed.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
On Thu, Feb 17, 2022 at 06:44:50PM +0100, Lukasz Maniak wrote:
> From: Knut Omang
>
> This patch provides the building blocks for creating an SR/IOV
> PCIe Extended Capability header and register/unregister
> SR/IOV Virtual Functions.
>
> Signed-off-by: Knut Omang
Reviewed-by: Michael S. Tsirk
Only a limited set of bits are used for decoding the Start and End
addresses of the mapping window of a flash device.
Signed-off-by: Cédric Le Goater
---
include/hw/ssi/aspeed_smc.h | 1 +
hw/ssi/aspeed_smc.c | 11 +++
2 files changed, 12 insertions(+)
diff --git a/include/hw/s
On Thu, Feb 17, 2022 at 06:44:49PM +0100, Lukasz Maniak wrote:
> Changes since v4:
> - Added hello world example for SR-IOV to the docs
> - Moved AER initialization from nvme_init_ctrl to nvme_init_state
> - Fixed division by zero issue in calculation of vqfrt and vifrt
> capabilities
So do you
This unifies the way we create the pca9552 devices on the different boards.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
---
hw/arm/aspeed.c | 49 +++--
1 file changed, 27 insertions(+), 22 deletions(-)
diff --git a/hw/arm/asp
On Thu, Feb 17, 2022 at 06:44:49PM +0100, Lukasz Maniak wrote:
> Changes since v4:
> - Added hello world example for SR-IOV to the docs
> - Moved AER initialization from nvme_init_ctrl to nvme_init_state
> - Fixed division by zero issue in calculation of vqfrt and vifrt
> capabilities
BTW you s
On Thu, Feb 17, 2022 at 06:44:51PM +0100, Lukasz Maniak wrote:
> From: Knut Omang
>
> Add a small intro + minimal documentation for how to
> implement SR/IOV support for an emulated device.
>
> Signed-off-by: Knut Omang
Reviewed-by: Michael S. Tsirkin
> ---
> docs/pcie_sriov.txt | 115 +
On Thu, Feb 17, 2022 at 06:44:52PM +0100, Lukasz Maniak wrote:
> From: Łukasz Gieryk
>
> Convenience function for retrieving the PCIDevice object of the N-th VF.
>
> Signed-off-by: Łukasz Gieryk
> Reviewed-by: Knut Omang
Reviewed-by: Michael S. Tsirkin
> ---
> hw/pci/pcie_sriov.c |
On Thu, Feb 17, 2022 at 06:44:53PM +0100, Lukasz Maniak wrote:
> From: Łukasz Gieryk
>
> Signed-off-by: Łukasz Gieryk
Reviewed-by: Michael S. Tsirkin
> ---
> include/hw/pci/pci_regs.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/hw/pci/pci_regs.h b/include/hw/pci/pci_reg
On Feb 18 03:26, Michael S. Tsirkin wrote:
> On Thu, Feb 17, 2022 at 06:44:49PM +0100, Lukasz Maniak wrote:
> > Changes since v4:
> > - Added hello world example for SR-IOV to the docs
> > - Moved AER initialization from nvme_init_ctrl to nvme_init_state
> > - Fixed division by zero issue in calcul
On Wed, 2021-12-22 at 11:05 -0800, Steve Sistare wrote:
> Save accepted socket fds before cpr-save, and look for them after
> cpr-load.
> in the environment after cpr-load. Reject cpr-exec if a socket
> enables
> the TLS or websocket option. Allow a monitor socket by closing it on
> exec.
>
> Si
On Fri, Feb 18, 2022 at 2:38 PM Alistair Francis
wrote:
>
> From: Wilfred Mallawa
>
> This patch updates the SPI_DEVICE, SPI_HOST0, SPI_HOST1
> base addresses. Also adds these as unimplemented devices.
>
> The address references can be found [1].
>
> [1]
> https://github.com/lowRISC/opentitan/bl
On Fri, Feb 18, 2022 at 09:51:12AM +0100, Klaus Jensen wrote:
> On Feb 18 03:26, Michael S. Tsirkin wrote:
> > On Thu, Feb 17, 2022 at 06:44:49PM +0100, Lukasz Maniak wrote:
> > > Changes since v4:
> > > - Added hello world example for SR-IOV to the docs
> > > - Moved AER initialization from nvme_i
On Wed, 2021-12-22 at 11:05 -0800, Steve Sistare wrote:
> Add the only-cpr-capable option, which causes qemu to exit with an
> error
> if any devices that are not capable of cpr are added. This
> guarantees that
> a cpr-exec operation will not fail with an unsupported device error.
>
> Signed-off
On Thu, Feb 17, 2022 at 8:32 AM Michael S. Tsirkin wrote:
>
> On Tue, Feb 15, 2022 at 12:52:31PM +0530, Gautam Dawar wrote:
> > This patch adds the ability to negotiate VIRTIO_F_IN_ORDER bit
> > for vhost-vdpa backend when the underlying device supports this
> > feature.
> > This would aid in reap
Wrong goto label, so msi cleanup would not occur if there is
an error in the ssvid initialization.
Signed-off-by: Jonathan Cameron
---
hw/pci-bridge/xio3130_downstream.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci-bridge/xio3130_downstream.c
b/hw/pci-bridge/xio313
If there is no memdev in numa configuration, it always reports
the error as the following:
total memory for NUMA nodes (0x0) should equal RAM size (0x1)
This error is confusing, and the total memory is the memory of
NUMA nodes with memdev specified actually. The memory size of a node
with
On Thu, Feb 17, 2022 at 3:29 PM Stefano Garzarella wrote:
>
> On Thu, Feb 17, 2022 at 02:32:48AM -0500, Michael S. Tsirkin wrote:
> >On Tue, Feb 15, 2022 at 12:52:31PM +0530, Gautam Dawar wrote:
> >> This patch adds the ability to negotiate VIRTIO_F_IN_ORDER bit
> >> for vhost-vdpa backend when th
Goto label is incorrect so msi cleanup would not occur if there is
an error in the ssvid initialization.
Signed-off-by: Jonathan Cameron
---
Noticed whilst working on equivalent CXL upstream switch port.
hw/pci-bridge/xio3130_upstream.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
dif
On Fri, 18 Feb 2022 10:23:02 +
Jonathan Cameron via wrote:
> Goto label is incorrect so msi cleanup would not occur if there is
> an error in the ssvid initialization.
>
> Signed-off-by: Jonathan Cameron
+Cc: linux...@huawei.com Turns out you get a weird result if you miss
a space in your
From: Shivaprasad G Bhat
A new subclass inheriting NVDIMMDevice is going to be introduced in
subsequent patches. The new subclass uses the realize and unrealize
callbacks. Add them on NVDIMMClass to appropriately call them as part
of plug-unplug.
Signed-off-by: Shivaprasad G Bhat
Acked-by: Dani
s/pull-ppc-20220218
for you to fetch changes up to 65e0446c86ee70d2125c1f1d1e36e6c2dfb08642:
target/ppc: Move common SPR functions out of cpu_init (2022-02-18 08:34:15
+0100)
ppc-7.0 queue
* target/ppc: SPR registration cleanup
From: Nicholas Piggin
In prepartion for implementing a full partition table option for
vhyp, update the get_pate method to take an lpid and return a
success/fail indicator.
The spapr implementation currently just asserts lpid is always 0
and always return success.
Reviewed-by: Cédric Le Goater
From: Fabiano Rosas
init_proc_603 is defined after init_proc_e300, so I had to move some
code around to make it work.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-19-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu_init.c
From: Nicholas Piggin
Invalid or missing partition table entry exceptions should cause HV
interrupts. HDSISR is set to bad MMU config, which is consistent with
the ISA and experimentally matches what POWER9 generates.
Reviewed-by: Fabiano Rosas
Reviewed-by: Daniel Henrique Barboza
Signed-off-b
From: Nicholas Piggin
Machines which don't emulate the HDEC facility are able to use the
timer for something else. Provide functions to start and stop the
hdecr timer.
Signed-off-by: Nicholas Piggin
[ clg: checkpatch fixes ]
Message-Id: <20220216102545.1808018-4-npig...@gmail.com>
Signed-off-by
From: Fabiano Rosas
Put the SPR registration macros in a header that is accessible outside
of cpu_init.c. The following patches will move CPU-specific code to
separate files and will need to access it.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-2
From: Fabiano Rosas
We're considering these two to be from different CPU families, so
duplicate some code to keep them separate.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-10-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc
From: Fabiano Rosas
This function registers just one SPR and has only two callers, so open
code it.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-23-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu_init.c | 21 +++-
From: Fabiano Rosas
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-15-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu_init.c | 68 +++
1 file changed, 11 insertions(+), 57 deletions(-
From: Nicholas Piggin
The radix on vhyp MMU uses a single-level radix table walk, with the
partition scope mapping provided by the flat QEMU machine memory.
A subsequent change will use the two-level radix walk on vhyp in some
situations, so provide a helper which can abstract that logic.
Revie
From: Fabiano Rosas
The top level init_proc calls register_generic_sprs but also registers
some other SPRs outside of that function. Let's group everything into
a single place.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-4-faro...@linux.ibm.com>
S
From: Fabiano Rosas
Make sure that every register_*_sprs function only has calls to
spr_register* to register individual SPRs. Do not allow nesting. This
makes the code easier to follow and a look at init_proc_* should
suffice to know what SPRs a CPU has.
Signed-off-by: Fabiano Rosas
Reviewed-b
From: Fabiano Rosas
The G2LE CPU initialization code is the same as the G2. Use the latter
for both.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-3-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu_init.c | 42 +---
From: Shivaprasad G Bhat
The patch adds support for the SCM flush hcall for the nvdimm devices.
To be available for exploitation by guest through the next patch. The
hcall is applicable only for new SPAPR specific device class which is
also introduced in this patch.
The hcall expects the semanti
From: Fabiano Rosas
This is done to improve init_proc readability and to make subsequent
patches that touch this code a bit cleaner.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-18-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target
From: Fabiano Rosas
This is done to improve init_proc readability and to make subsequent
patches that touch this code a bit cleaner.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-17-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target
From: Nicholas Piggin
The spapr virtual hypervisor does not require the hdecr timer.
Remove it.
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Cédric Le Goater
Signed-off-by: Nicholas Piggin
Message-Id: <20220216102545.1808018-3-npig...@gmail.com>
Signed-off-by: Cédric Le Goater
---
hw/p
From: Fabiano Rosas
The following patches will move CPU-specific code into separate files,
so expose the most used SPR registration functions:
register_sdr1_sprs | 22 callers
register_low_BATs | 20 callers
register_non_embedded_sprs | 19 callers
register_high_BATs | 10 c
From: Nicholas Piggin
This moves the logic to reset the QEMU exception state into its own
function.
Reviewed-by: Cédric Le Goater
Signed-off-by: Nicholas Piggin
[ clg: checkpatch fixes ]
Message-Id: <20220216102545.1808018-8-npig...@gmail.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/e
From: Shivaprasad G Bhat
If the device backend is not persistent memory for the nvdimm, there is
need for explicit IO flushes on the backend to ensure persistence.
On SPAPR, the issue is addressed by adding a new hcall to request for
an explicit flush from the guest when the backend is not pmem.
From: Fabiano Rosas
The important part of this function is that it applies to non-embedded
CPUs, not that it also applies to the 601. We removed support for the
601 anyway, so rename this function.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-22-fa
From: Fabiano Rosas
Now that the 601 was removed, all of our CPUs have a timebase, so that
can be moved into the common function.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-5-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc
From: Fabiano Rosas
The /* XXX : not implemented */ comments all over cpu_init are
confusing and ambiguous.
Do they mean not implemented by QEMU, not implemented in a specific
access mode? Not implemented by the CPU? Do they apply to just the
register right after or to a whole block? Do they mea
From: Fabiano Rosas
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-13-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu_init.c | 17 +++--
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/target/ppc/
From: Nicholas Piggin
The virtual hypervisor currently always intercepts and handles
hypercalls but with a future change this will not always be the case.
Add a helper for the test so the logic is abstracted from the mechanism.
Reviewed-by: Cédric Le Goater
Signed-off-by: Nicholas Piggin
Mess
From: Fabiano Rosas
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-8-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu_init.c | 41 ++---
1 file changed, 22 insertions(+), 19 deletions(-)
From: Fabiano Rosas
We're considering these two to be in different CPU families (6xx and
7xx), so keep their SPR registration separate.
The code was copied into register_G2_sprs and the common function was
renamed to apply only to the 755.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
From: Fabiano Rosas
These will need to be accessed from other files once we move the CPUs
code to separate files.
The check_pow_hid0 and check_pow_hid0_74xx are too specific to be
moved to a header so I'll deal with them later when splitting this
code between the multiple CPU families.
Signed-o
From: Nicholas Piggin
Introduce virtual hypervisor methods that can support a "Nested KVM HV"
implementation using the bare metal 2-level radix MMU, and using HV
exceptions to return from H_ENTER_NESTED (rather than cause interrupts).
HV exceptions can now be raised in the TCG spapr machine when
From: Fabiano Rosas
The 745 and 755 can share the HID registration, so move it all into
register_755_sprs, which applies for both CPUs.
Also rename that function to register_745_sprs, since the 745 is the
earliest of the two. This will help with separating 755-specific
registers in a subsequent
From: Nicholas Piggin
This implements the Nested KVM HV hcall API for spapr under TCG.
The L2 is switched in when the H_ENTER_NESTED hcall is made, and the
L1 is switched back in returned from the hcall when a HV exception
is sent to the vhyp. Register state is copied in and out according to
the
From: Fabiano Rosas
Let's leave cpu_init with just generic CPU initialization and
QOM-related functions.
The rest of the SPR registration functions will be moved in the
following patches along with the code that uses them. These are only
the commonly used ones.
Signed-off-by: Fabiano Rosas
Rev
From: Fabiano Rosas
Initial intent for the spr_tcg header was to expose the spr_read|write
callbacks that are only used by TCG code. However, although these
routines are TCG-specific, the KVM code needs access to env->sprs
which creation is currently coupled to the callback registration.
We are
From: Fabiano Rosas
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-20-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu_init.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/target/ppc/cpu_in
From: Fabiano Rosas
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-7-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu_init.c | 24 +---
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/targ
Peter,
On 2/18/22 09:18, Cédric Le Goater wrote:
Hi,
Here is a set of extensions for the Aspeed machines, the most
important ones being the removal of a deprecated machine and a simple
model for the Secure Boot Controller, both from Joel.
I have a PR ready to be sent if there are no further c
From: Fabiano Rosas
Move some of the 440 registers that are being repeated in the 440*
CPUs to register_440_sprs.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-11-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu_init.c | 1
On Tue, Feb 15, 2022 at 12:52:31PM +0530, Gautam Dawar wrote:
> This patch adds the ability to negotiate VIRTIO_F_IN_ORDER bit
> for vhost-vdpa backend when the underlying device supports this
> feature.
> This would aid in reaping performance benefits with HW devices
> that implement this feature.
From: Fabiano Rosas
This is just to have 755-specific registers contained into a function,
intead of leaving them open-coded in init_proc_755. It makes init_proc
easier to read and keeps later patches that touch this code a bit
cleaner.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Me
On Mon, 17 Jan 2022 at 15:35, Bernhard Beschow wrote:
>
> Applied review comments:
> * Mention the sed-expression used for the cleanup in the commit message
> * Have checkpatch.pl error on further non-const TypeInfo introduction
>
> Bernhard Beschow (2):
> Mark remaining global TypeInfo instance
From: Fabiano Rosas
The init_proc_755 function is identical to the 745 one except for the
755-specific registers. I think it is worth it to make them share
code.
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-21-faro...@linux.ibm.com>
Signed-off-by:
From: Fabiano Rosas
Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
Message-Id: <20220216162426.1885923-12-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu_init.c | 28 +---
1 file changed, 9 insertions(+), 19 deletions(-)
diff --git a/
On Thu, 17 Feb 2022 at 21:39, Stafford Horne wrote:
>
> On Thu, Feb 17, 2022 at 06:18:58PM +, Peter Maydell wrote:
> > If the user doesn't specify a kernel file, we'll still load the FDT,
> > at address zero. Is that sensible/intended behaviour ?
>
> Good point, I guess we can add some space
On 2/17/22 18:52, Paolo Bonzini wrote:
> On 1/28/22 16:47, Stefan Hajnoczi wrote:
>> Dear QEMU, KVM, and rust-vmm communities,
>> QEMU will apply for Google Summer of Code 2022
>> (https://summerofcode.withgoogle.com/) and has been accepted into
>> Outreachy May-August 2022 (https://www.outreachy.o
I've noticed that the meson incremental build doesn't seem to
cleanly handle a config file going away, as ppc64abi32-linux-user
has recently. The build fails with:
../../meson.build:1941:2: ERROR: Failed to load
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu/configs/targets/ppc64abi32-linux-user.mak:
On 18/02/2022 12.59, Peter Maydell wrote:
I've noticed that the meson incremental build doesn't seem to
cleanly handle a config file going away, as ppc64abi32-linux-user
has recently. The build fails with:
../../meson.build:1941:2: ERROR: Failed to load
/mnt/nvmedisk/linaro/qemu-from-laptop/qemu
On 2/18/22 04:40, Jag Raman wrote:
On Feb 17, 2022, at 7:09 AM, Peter Maydell wrote:
On Thu, 17 Feb 2022 at 07:56, Jagannathan Raman wrote:
The compiler path that cmake gets from meson is corrupted. It results in
the following error:
| -- The C compiler identification is unknown
| CMake E
On Tue, 8 Feb 2022 at 20:08, Peter Maydell wrote:
>
> The osdep.h header is included by every C file we compile, so it helps
> build times to keep it small. (As the comment at the top of the file
> notes, in an ideal world this header would contain only things that
> everybody needs and things whe
On 2/17/22 08:49, Jagannathan Raman wrote:
Store and load the device's state during migration. use libvfio-user's
handlers for this purpose
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Why does no one call clear_deferred_backend_init?
Paolo
On Tue, Feb 8, 2022 at 4:23 AM Jason Wang wrote:
>
>
> 在 2022/1/31 下午11:34, Eugenio Perez Martin 写道:
> > On Sat, Jan 29, 2022 at 9:06 AM Jason Wang wrote:
> >>
> >> 在 2022/1/22 上午4:27, Eugenio Pérez 写道:
> >>> Signed-off-by: Eugenio Pérez
> >>> ---
> >>>hw/virtio/vhost-vdpa.c | 20 +++
On Fri, 18 Feb 2022 at 12:08, Thomas Huth wrote:
>
> On 18/02/2022 12.59, Peter Maydell wrote:
> > I've noticed that the meson incremental build doesn't seem to
> > cleanly handle a config file going away, as ppc64abi32-linux-user
> > has recently. The build fails with:
> >
> > ../../meson.build:1
On Tue, 8 Feb 2022 at 21:29, Vineet Gupta wrote:
>
> When doing RV qemu builds with host gcc 11.2, ran into following build failure
>
> | cc -MMD -MP -MT linuxboot_dma.o -MF ./linuxboot_dma.d -O2 -g -march=i486
> -Wall \
> | -Wstrict-prototypes -Wredundant-decls -Wundef -Wwrite-strings
> -Wmis
On Sun, 13 Feb 2022 at 02:12, Akihiko Odaki wrote:
>
> Signed-off-by: Akihiko Odaki
> ---
> MAINTAINERS | 2 ++
> 1 file changed, 2 insertions(+)
Thanks for volunteering to review cocoa-related patches!
Would you mind having a look at these couple of patches
from early January?
https://patchew.
On Mon, 14 Feb 2022 at 07:34, Pavel Dovgalyuk wrote:
>
> ping
>
> On 07.02.2022 11:44, Pavel Dovgalyuk wrote:
> > A9 gtimer includes global control field and number of per-cpu fields.
> > But only per-cpu ones are migrated. This patch adds a subsection for
> > global control field migration.
> >
>
Please? - Steve
On 1/7/2022 1:45 PM, Steven Sistare wrote:
> Hi Dave,
> It has been a long time since we chatted about this series. The vfio
> patches have been updated with feedback from Alex and are close to being
> final (I think). Could you take another look at the patches that you care
On Thu, 3 Feb 2022 at 14:01, Edgar E. Iglesias wrote:
>
> From: "Edgar E. Iglesias"
>
> Add a model of the Xilinx ZynqMP CRF. At the moment this
> is mostly a stub model.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Edgar E. Iglesias
> ---
> +#define TYPE_XLNX_ZYNQMP_CRF "xlnx.zyn
On Fri, Feb 18, 2022 at 03:23:15AM -0500, Michael S. Tsirkin wrote:
> On Thu, Feb 17, 2022 at 06:44:49PM +0100, Lukasz Maniak wrote:
> > Changes since v4:
> > - Added hello world example for SR-IOV to the docs
> > - Moved AER initialization from nvme_init_ctrl to nvme_init_state
> > - Fixed divisio
On Thu, Feb 17, 2022 at 06:45:01PM +0100, Lukasz Maniak wrote:
> From: Łukasz Gieryk
>
> With four new properties:
> - sriov_v{i,q}_flexible,
> - sriov_max_v{i,q}_per_vf,
> one can configure the number of available flexible resources, as well as
> the limits. The primary and secondary controlle
> On Feb 18, 2022, at 7:13 AM, Paolo Bonzini wrote:
>
> On 2/18/22 04:40, Jag Raman wrote:
>>> On Feb 17, 2022, at 7:09 AM, Peter Maydell wrote:
>>>
>>> On Thu, 17 Feb 2022 at 07:56, Jagannathan Raman
>>> wrote:
The compiler path that cmake gets from meson is corrupted. It result
Markus Armbruster (2):
keyval: Fix grammar comment to cover downstream prefix
qapi: Fix stale reference to scripts/qapi.py in a comment
qapi/qapi-util.c | 2 +-
util/keyval.c| 4 +++-
2 files changed, 4 insertions(+), 2 deletions(-)
--
2.35.1
> On Feb 18, 2022, at 7:20 AM, Paolo Bonzini wrote:
>
> On 2/17/22 08:49, Jagannathan Raman wrote:
>> Store and load the device's state during migration. use libvfio-user's
>> handlers for this purpose
>> Signed-off-by: Elena Ufimtseva
>> Signed-off-by: John G Johnson
>> Signed-off-by: Jagann
Signed-off-by: Markus Armbruster
---
qapi/qapi-util.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qapi/qapi-util.c b/qapi/qapi-util.c
index fda7044539..63596e11c5 100644
--- a/qapi/qapi-util.c
+++ b/qapi/qapi-util.c
@@ -113,7 +113,7 @@ bool qapi_bool_parse(const char *name
According to the grammar, a key __com.redhat_foo would be parsed as
two key fragments __com and redhat_foo. It's actually parsed as a
single fragment. Fix the grammar.
Signed-off-by: Markus Armbruster
---
util/keyval.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/util
Hi; is anybody else seeing 'make check-acceptance' fail on some of
the s390 tests?
(009/183) tests/avocado/boot_linux.py:BootLinuxS390X.test_s390_ccw_virtio_tcg:
INTERRUPTED: Test interrupted by SIGTERM\nRunner error occurred:
Timeout reached\nOriginal status: ERROR\n{'name':
'009-tests/avocado/b
Markus Armbruster writes:
> John Snow writes:
>
>> Get isort and pylint tools passing again.
>>
>> Signed-off-by: John Snow
>> ---
>> scripts/qapi/commands.py | 2 +-
>> scripts/qapi/pylintrc| 15 +--
>> scripts/qapi/types.py| 6 +-
>> scripts/qapi/visit.py| 6 ++
On Tue, 8 Feb 2022 at 23:31, Patrick Venture wrote:
>
> This is the BMC attached to the OpenBMC Mori board.
>
> Signed-off-by: Patrick Venture
> Reviewed-by: Chris Rauer
> Reviewed-by: Ilkyun Choi
> ---
> docs/system/arm/nuvoton.rst | 1 +
> hw/arm/npcm7xx_boards.c | 32 ++
> On Feb 18, 2022, at 9:49 AM, Jag Raman wrote:
>
>
>
>> On Feb 18, 2022, at 7:13 AM, Paolo Bonzini wrote:
>>
>> On 2/18/22 04:40, Jag Raman wrote:
On Feb 17, 2022, at 7:09 AM, Peter Maydell
wrote:
On Thu, 17 Feb 2022 at 07:56, Jagannathan Raman
wrote:
>
>
On Mon, 14 Feb 2022 at 18:56, Philippe Mathieu-Daudé wrote:
>
> Few patches to be able to build QEMU on macOS 12 (Monterey).
>
> This basically consists of adapting deprecated APIs.
>
> CI job added to avoid bitrotting.
Hi; I'm going to take the "obviously correct (to me)" cocoa
patches from here
On 2/18/22 02:46, Richard Henderson wrote:
I don't have gobjc/g++ installed, so ./configure defaulted to Clang to
compile these languages, but compiled C files using GCC. At the end the
Clang linker is used (the default c++ symlink).
This is another form of compiler mis-configuration.
If you d
On 2/15/22 18:01, Philippe Mathieu-Daudé via wrote:
+
+case "$cpu" in
+ aarch64)
+write_c_skeleton;
+if compile_prog "$CPU_CFLAGS -Werror -mno-outline-atomics" "" ; then
+ CPU_CFLAGS="-mno-outline-atomics $CPU_CFLAGS"
+fi
+;;
Apart from the question of whether/how to work
On 2/15/22 18:01, Philippe Mathieu-Daudé via wrote:
Filter unsupported Objective-C options, to avoid
'unknown-warning-option' warnings when using Clang:
[34/373] Compiling Objective-C object libcommon.fa.p/audio_coreaudio.m.o
warning: unknown warning option '-Wold-style-declaration'; did y
On 2/8/22 22:19, Vineet Gupta wrote:
When doing RV qemu builds with host gcc 11.2, ran into following build failure
| cc -MMD -MP -MT linuxboot_dma.o -MF ./linuxboot_dma.d -O2 -g -march=i486
-Wall \
| -Wstrict-prototypes -Wredundant-decls -Wundef -Wwrite-strings
-Wmissing-prototypes \
| -W
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