Module Name:src
Committed By: skrll
Date: Fri May 19 07:40:58 UTC 2017
Modified Files:
src/sys/arch/evbmips/ingenic: autoconf.c clock.c cpu.c machdep.c
mainbus.c
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/
Module Name:src
Committed By: skrll
Date: Sat Aug 27 05:52:43 UTC 2016
Modified Files:
src/sys/arch/evbmips/ingenic: intr.c
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/evbmips/ingenic/intr.c
Please note tha
Module Name:src
Committed By: skrll
Date: Fri Aug 26 13:54:18 UTC 2016
Modified Files:
src/sys/arch/evbmips/ingenic: cpu.c
Log Message:
#include "opt_multiprocessor.h"
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/evbmips/ingenic/cpu.c
Please
Module Name:src
Committed By: skrll
Date: Fri Aug 26 13:53:36 UTC 2016
Modified Files:
src/sys/arch/evbmips/ingenic: machdep.c
Log Message:
#include "opt_multiprocessor.h"
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/evbmips/ingenic/machdep.
Module Name:src
Committed By: macallan
Date: Thu Oct 8 17:51:15 UTC 2015
Modified Files:
src/sys/arch/evbmips/ingenic: autoconf.c
Log Message:
add mechanism to pass a MAC address to dme
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/evbmips/ing
Module Name:src
Committed By: macallan
Date: Tue Jun 30 04:10:10 UTC 2015
Modified Files:
src/sys/arch/evbmips/ingenic: clock.c
Log Message:
don't mess with the cycle counter event counter, out timer interrupt comes
from elsewhere and is counted there
To generate a diff
Module Name:src
Committed By: macallan
Date: Thu Jun 11 15:38:19 UTC 2015
Modified Files:
src/sys/arch/evbmips/ingenic: machdep.c
Log Message:
use kcpuset_isset()
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/evbmips/ingenic/machdep.c
Please n
Module Name:src
Committed By: macallan
Date: Sat Apr 4 13:06:01 UTC 2015
Modified Files:
src/sys/arch/evbmips/ingenic: intr.c machdep.c mainbus.c
Log Message:
add IPI support
compile-tested only since we don't actually spin up the 2nd core yet
To generate a diff of this
Module Name:src
Committed By: macallan
Date: Sat Mar 28 16:57:23 UTC 2015
Modified Files:
src/sys/arch/evbmips/ingenic: intr.c
Log Message:
PIC -> INTC to match documentation
no functional change
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/ev
Module Name:src
Committed By: macallan
Date: Wed Mar 11 12:40:36 UTC 2015
Modified Files:
src/sys/arch/evbmips/ingenic: intr.c
Log Message:
add an event counter for clock interrupts
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/evbmips/ingenic/
Module Name:src
Committed By: macallan
Date: Tue Mar 10 22:39:38 UTC 2015
Modified Files:
src/sys/arch/evbmips/ingenic: machdep.c
Log Message:
enable the full 1GB of RAM
TODO: actually probe for it
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/
Module Name:src
Committed By: macallan
Date: Sat Mar 7 15:38:32 UTC 2015
Modified Files:
src/sys/arch/evbmips/ingenic: machdep.c
Log Message:
only use the first 256MB for now until I figure out how to properly access
the rest
To generate a diff of this commit:
cvs rdiff
Module Name:src
Committed By: macallan
Date: Sat Mar 7 15:37:46 UTC 2015
Modified Files:
src/sys/arch/evbmips/ingenic: intr.c
Log Message:
count all interrupts, not just the ones we have handlers for
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/ar
Module Name:src
Committed By: macallan
Date: Thu Mar 5 17:42:29 UTC 2015
Modified Files:
src/sys/arch/evbmips/ingenic: intr.c
Log Message:
disable interrupts while processing them, reenable when we're done
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/
Module Name:src
Committed By: martin
Date: Wed Dec 31 15:25:08 UTC 2014
Modified Files:
src/sys/arch/evbmips/ingenic: clock.c
Log Message:
Move struct clockframe cf as extern declaration into ingenic_clockintr(),
to avoid a duplicate common.
To generate a diff of this co
Module Name:src
Committed By: macallan
Date: Fri Dec 26 18:06:52 UTC 2014
Modified Files:
src/sys/arch/evbmips/ingenic: intr.c
Log Message:
make interrupt names part of the handler struct so event counters will show
up correctly
also reshuffle debug code a bit
To generat
Module Name:src
Committed By: macallan
Date: Fri Dec 26 17:43:32 UTC 2014
Modified Files:
src/sys/arch/evbmips/ingenic: clock.c
Log Message:
use #ifdef USE_OST to switch between OS Timer and timer 5
always enable interrupts, not just with INGENIC_CLOCK_DEBUG
To generate
Module Name:src
Committed By: macallan
Date: Tue Dec 23 16:17:39 UTC 2014
Modified Files:
src/sys/arch/evbmips/ingenic: intr.c
Log Message:
use separate debugging flag for interrupts
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/evbmips/ingenic
Module Name:src
Committed By: macallan
Date: Tue Dec 23 15:09:13 UTC 2014
Modified Files:
src/sys/arch/evbmips/ingenic: machdep.c mainbus.c
Log Message:
use defflag-ed debug options
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/evbmips/ingenic/
Module Name:src
Committed By: macallan
Date: Tue Dec 23 15:08:26 UTC 2014
Modified Files:
src/sys/arch/evbmips/ingenic: intr.c
Log Message:
preliminary support for the interrupt controller
didn't get much testing yet
To generate a diff of this commit:
cvs rdiff -u -r1.1
Module Name:src
Committed By: macallan
Date: Tue Dec 23 15:07:33 UTC 2014
Modified Files:
src/sys/arch/evbmips/ingenic: clock.c
Log Message:
use defflag-ed debug options
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/evbmips/ingenic/clock.c
Ple
Module Name:src
Committed By: macallan
Date: Sat Dec 6 14:30:11 UTC 2014
Modified Files:
src/sys/arch/evbmips/ingenic: machdep.c mainbus.c
Log Message:
apbus attachment goop, move interrupt stuff to intr.c
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/
Module Name:src
Committed By: macallan
Date: Sat Dec 6 14:26:40 UTC 2014
Added Files:
src/sys/arch/evbmips/ingenic: intr.c
Log Message:
timer interrupt and IPIs
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1 src/sys/arch/evbmips/ingenic/intr.c
Please note th
Module Name:src
Committed By: macallan
Date: Sat Dec 6 14:24:58 UTC 2014
Modified Files:
src/sys/arch/evbmips/ingenic: clock.c
Log Message:
add timecounter, timer interrupt and plenty of debugging goop
very much work in progress
To generate a diff of this commit:
cvs rd
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