On 07/21/2011 08:44 PM, Jim Lux wrote:
On 7/21/11 8:30 AM, Luis Cupido wrote:
Magnus,
It crossed my mind of messing somehow with the phase
accumulator metrics but did not figure a way...
that is a good suggestion I will investigate in that direction...
(or maybe... if you do have a bit of free
On 7/21/11 8:30 AM, Luis Cupido wrote:
Magnus,
It crossed my mind of messing somehow with the phase
accumulator metrics but did not figure a way...
that is a good suggestion I will investigate in that direction...
(or maybe... if you do have a bit of free time to drop me
a couple of lines more,
On 07/21/2011 07:10 PM, dk...@arcor.de wrote:
IMHO, that would require a sine table with a steerable number
of entries. Very problematic for a tunable DDS, but doable
for a fixed frequency application, although address mirroring
for ROM size reduction would require real address comparators
inste
Your algorithm looks very much like the solution to the problem how to
find divider values in a rf receiver having a very low IF and *not* full
length divider chains for dividing all the needed reference frequencies.
So how to find two values connected.
Interesting.
- Henry
--
ehydra.dyndns
Gerhard.
This was an old thing I asked a month ago or so...
Only the MSB of the accumulator is used to serve
as reference to a pll. No sin or DAC involved ;-)
Luis Cupido.
ct1dmk
On 7/21/2011 6:10 PM, dk...@arcor.de wrote:
IMHO, that would require a sine table with a steerable number
of entri
IMHO, that would require a sine table with a steerable number
of entries. Very problematic for a tunable DDS, but doable
for a fixed frequency application, although address mirroring
for ROM size reduction would require real address comparators
instead just using the 2 MSBs as a selector.
The t
Dear Luis,
On 07/21/2011 05:30 PM, Luis Cupido wrote:
Magnus,
It crossed my mind of messing somehow with the phase
accumulator metrics but did not figure a way...
that is a good suggestion I will investigate in that direction...
(or maybe... if you do have a bit of free time to drop me
a couple
Magnus,
It crossed my mind of messing somehow with the phase
accumulator metrics but did not figure a way...
that is a good suggestion I will investigate in that direction...
(or maybe... if you do have a bit of free time to drop me
a couple of lines more, could you please detail
a bit more as so
On 21/06/11 12:48, Luis Cupido wrote:
Yes that right. Is clear that I would have a 10ns jitter,
So the catch would be to find a scheme to spread spurs out or to push
them away from carrier. Then they would not bother me (would not pass
the PLL).
You want to consider a phase-accumulator with a s
Thanks Jim,
Joseph already pointed me to a pdf in a previous post.
Now it is digestion time... should I say congestion !!!
those MASH delta-sigmas are killing me...
lc.
ct1dmk.
On 6/23/2011 4:30 AM, Jim Lux wrote:
On 6/22/11 3:36 PM, Luis Cupido wrote:
I knew I must not have been the fist on
On 6/22/11 3:36 PM, Luis Cupido wrote:
I knew I must not have been the fist one to be looking for such.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=4014919
(unfortunately I'm not ieee member and $30 looks more like a
book price to me... not an article... bahhh!)
Luis Cupido.
ct1dmk
ion of precise time and frequency
measurement
Date: 06/22/2011 06:37 PM
Subject: Re: [time-nuts] DDS'ery narrow scoped.
Sent by:time-nuts-boun...@febo.com
I knew I must not have been the fist one to be looking for such.
http://ieeexplore.ieee.org/xpl/freeabs_all.j
:37 PM
Subject: Re: [time-nuts] DDS'ery narrow scoped.
Sent by:time-nuts-boun.
I knew I must not have been the fist one to be looking for such.
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=4014919
(unfortunately I'm not ieee member and $30 looks more like a
book price to me... not an article... bahhh!)
Luis Cupido.
ct1dmk.
On 6/21/2011 11:48 AM, Luis Cupido w
I've played with the core from altera for a while, but since I was only
interested in 1 bit I'm now playing with my own code. Trivial variations
on the plain old clocked accumulator architecture.
lc
On 6/21/2011 7:37 AM, Javier Herrero wrote:
What it the topology you're using now? Also, I wo
Yes that right. Is clear that I would have a 10ns jitter,
So the catch would be to find a scheme to spread spurs out or to push
them away from carrier. Then they would not bother me (would not pass
the PLL).
lc
ct1dmk.
On 6/21/2011 7:43 AM, Javier Herrero wrote:
But I forgot to add that t
Hi Ulrich,
Loop bandwidth could be in the KHz region
or even less.
I could choose more or less freely from Hz to many KHz
but there are obvious tradeoffs and it is hard to decide.
The phase noise of the VCO when I go too narrow versus
the ammount of spurs when I go too wide.
Application is the fi
i 2011 02:20
> An: Discussion of precise time and frequency measurement
> Betreff: [time-nuts] DDS'ery narrow scoped.
>
>
> Folks,
>
> Many thanks to you all, for the info.
> This is indeed a great forum.
>
> My aplic. is a DDS signal that
> will serve
But I forgot to add that the resultant jitter will be also the sampling
rate period (10ns at 100MHz), so I think that the output will not be too
clean... so I'm afraid it will not be a great improvement over using
only the MSB :)
Regards,
Javier
El 21/06/2011 08:37, Javier Herrero escribió:
Hello,
El 21/06/2011 02:19, Luis Cupido escribió:
Imagine an FPGA and a square wave coming out.
Just that. Nothing more.
(That is what I had in mind when querying about the MSB usage in
the first place.)
My first approach was the ACC MSB
(and that is working already on the bench.)
I supppo
That is maybe interesting to you:
http://www.holmea.demon.co.uk/Projects.htm#Frac
- Henry
--
ehydra.dyndns.info
Luis Cupido schrieb:
P.S. At the moment I'm testing on the bench with a real FPGA cyclone III
with a 48bit dds at 100MHz fclock and at circa 6 and 18MHz output and it
is not that b
Folks,
Many thanks to you all, for the info.
This is indeed a great forum.
My aplic. is a DDS signal that
will serve as reference for a pll with a relatively
narrow loop filter. As I said before.
Most replies presume the analog world with DAC
filters etc etc. But that I know ;-)
I'm digging out
22 matches
Mail list logo
