On Monday 17 August 2009 17:14:28 Stefan Roese wrote:
This patch fixes the chip_config command for I2C bootstrap EEPROM
configuration. First it changes the I2C bootstrap EEPROM address to
0x54 as this is used on Arches (instead of 0x52 on Canyonlands/
Glacier). Additionally, the NAND bootstrap
Hi Wolfgang,
please pull the following bug fix:
Thanks,
Stefan
The following changes since commit 7dedefdf749ff02c1086f7ddb8cb83a77b00d030:
John Schmoller (1):
flash: Fix CFI buffer size bug
are available in the git repository at:
git://www.denx.de/git/u-boot-ppc4xx.git master
The MPC8536E is capable of booting form NAND/eSDHC/eSPI, this patchset
implements these three bootup methods in a unified way - all of these
use the general cpu/mpc85xx/start.S, and load the second stage image
to L2SRAM which lets us use the SPD to initialize the SDRAM.
[PATCH 01/10] mkconfig:
So that we can set the NAND loader's relocate stack pointer
to the value other than the relocate address + 0x1.
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
board/freescale/mpc8313erdb/mpc8313erdb.c |2 +-
board/sheldon/simpc8313/simpc8313.c |2 +-
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
cpu/mpc85xx/cpu_init.c |5 +++--
include/asm-ppc/immap_85xx.h |5 +
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 41de694..c4d1a9d 100644
---
The MPC8536E is capable of booting from the on-chip ROM - boot from
eSDHC and boot from eSPI. When power on, the porcessor excutes the
ROM code to initialize the eSPI/eSDHC controller, and loads the mian
U-Boot image from the memory device that interfaced to the controller,
such as the SDCard or
Add boot from NAND/eSDHC/eSPI description
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
doc/README.mpc8536ds | 127 ++
1 files changed, 127 insertions(+), 0 deletions(-)
create mode 100644 doc/README.mpc8536ds
diff --git
MPC8536E can support booting from NAND flash which uses the
image u-boot-nand.bin. This image contains two parts: a 4K
NAND loader and a main U-Boot image. The former is appended
to the latter to produce u-boot-nand.bin. The 4K NAND loader
includes the corresponding nand_spl directory, along with
If the environment variables are saved on the MMC/SD card,
env_relocat can't relocate env from MMC/SD card without mmc init.
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
lib_ppc/board.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/lib_ppc/board.c
Whether booting from MMC/SD card or not, the environment variables
can be saved on it, this patch add the operation support.
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
common/Makefile |1 +
common/cmd_nvedit.c |3 +-
common/env_sdcard.c | 135
Both the save env and load env operation will call this function
to get the address of env on the SDCard, so the user can control
where to put the env freely.
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
board/freescale/mpc8536ds/mpc8536ds.c | 43 +
1
Hello,
2009/8/13 Eric Millbrandt emillbra...@coldhaus.com:
Support USB on PSC3 on the mpc5200. Before this patch, enabling USB support
would reconfigure PSC4 and PSC5 to USB. The mpc5200 does not support USB
enabled on both the standard USB port and PSC3. This patch masks the
appropriate
Hi Mike,
my patch for USB2.0 on MPC5121e is for u-boot-2009.03. I released for that
version, so it's reasonable that doesn't fit well on 2009.06.
Regard to your problem and log, as soon as I have time, I see your problem.
Regards,
Francesco.
-Messaggio originale-
Da: Mike Timmons
On Tue, Aug 18, 2009 at 12:48:02AM +0200, Jean-Christophe PLAGNIOL-VILLARD
wrote :
On 00:13 Tue 18 Aug , Albin Tonnerre wrote:
On Mon, Aug 17, 2009 at 11:41:06PM +0200, Jean-Christophe PLAGNIOL-VILLARD
wrote :
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#if
Dear Peter Chen,
In message 1250571462.6548.21.ca...@nchen-desktop you wrote:
The jump table provided by U-Boot exactly for this purpose is the
list of functions exported through the include/_exports.h header
file.
...
If you set up your own list of function pointers (in addition
On Tue, Aug 18, 2009 at 12:51:48AM +0200, Jean-Christophe PLAGNIOL-VILLARD
wrote :
no please take a look on the other LED thread
Would you please provide a pointer to this thread ? THe only one remotely
related I can find is
http://lists.denx.de/pipermail/u-boot/2009-May/052160.html, and you
Hi,
I am trying to bring up a AMCC 440EP yosemite eval board using wind river
linux 2.0/I cross compiled busy box 1.4.1 and the kernel . I tried to bring
up the board using TFTP.
It loads the kernel and the file system.I get an error message when init is
spawned.
EXT2-fs warning: mounting
On Monday 17 August 2009 19:37:53 you wrote:
-Original Message-
From: u-boot-boun...@lists.denx.de
[mailto:u-boot-boun...@lists.denx.de] On Behalf Of Tuma
Sent: Monday, August 17, 2009 7:26 PM
To: Wolfgang Denk; U-Boot Mailing List
Subject: Re: [U-Boot] BMP display.
On
Hi again!
This patch series is an update to [PATCH 0/8]: Fixes for ubifs build
on ARM sent in july:
http://lists.denx.de/pipermail/u-boot/2009-July/055594.html
and contains the patches which were not accepted. The patches are:
0001-Move-__set-clear_bit-from-ubifs.h-to-bitops.h.patch
-
Move __set/clear_bit from ubifs.h to bitops.h
__set_bit and __clear_bit are defined in ubifs.h as well as in
asm/include/bitops.h for some architectures. This patch moves
the generic implementation to include/linux/bitops.h and uses
that unless it's defined by the architecture.
v2: Unify code
Hello Sridhar,
Sridhar M wrote:
I am trying to bring up a AMCC 440EP yosemite eval board using wind river
linux 2.0/I cross compiled busy box 1.4.1 and the kernel . I tried to bring
up the board using TFTP.
It loads the kernel and the file system.I get an error message when init is
Define ffs/fls for all architectures
UBIFS requires fls(), which is not defined for arm (and some other
architectures) and this patch adds it. The implementation is taken from
Linux and is generic. ffs() is also defined for those that miss it.
v2: Unify code style (empty line between ffs/fls)
Remove duplicate set_cr
set_cr is defined in both asm-arm/proc-armv/system.h and
include/asm-arm/system.h. This patch removes it (and some duplicate
defines) from the former.
Signed-off-by: Simon Kagstrom simon.kagst...@netinsight.net
---
include/asm-arm/proc-armv/system.h | 30
Define test_and_set_bit and test_and_clear bit for ARM
Needed for (e.g.) ubifs support to work.
Signed-off-by: Simon Kagstrom simon.kagst...@netinsight.net
---
include/asm-arm/bitops.h | 27 ---
1 files changed, 24 insertions(+), 3 deletions(-)
diff --git
Hi,
Thanks a lot. I tried the same but it still gives me the same error. These
are the one that gets displayed.
## Booting image at 0020 ...
Image Name: Linux-2.6.21
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size:1311814 Bytes = 1.3 MB
Load Address:
See to it that sent data is 8-byte aligned
U-boot might use non-8-byte-aligned addresses for sending data, which
the kwgbe_send doesn't accept (bootp does this for me). This patch
copies the data to be sent to a malloced temporary buffer if it is
non-aligned.
v2: Malloc send buffer (comment from
Dear Wolfgang Denk,
On Tue, 2009-08-18 at 10:35 +0200, Wolfgang Denk wrote:
Dear Peter Chen,
In message 1250571462.6548.21.ca...@nchen-desktop you wrote:
The jump table provided by U-Boot exactly for this purpose is the
list of functions exported through the include/_exports.h
-Original Message-
From: u-boot-boun...@lists.denx.de
[mailto:u-boot-boun...@lists.denx.de] On Behalf Of Simon Kagstrom
Sent: Tuesday, August 18, 2009 3:02 PM
To: U-Boot ML
Subject: [U-Boot] [PATCH] arm:kirkwood See to it that sent
data is 8-byte aligned
See to it that sent
Hi Wolfgang,
Wolfgang Denk wrote:
Dear Matthew Lear,
In message 4a896ed5.3010...@bubblegen.co.uk you wrote:
[snip]
I've got netconsole running via netcat on a host pc but this is console
only and is not ideal for a multi-platform deployment model. Although,
not ideal? What exactly are
Hi kumar,
The CONFIG_PHYS_64BIT was not defined on the header file of HPCN
but extended address translation was enabled on the start.S irrespective of
the MPC8641D_hpcn compilation option why?.
Regards,
T.
CAUTION - Disclaimer *This email may
-Original Message-
From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagn...@jcrosoft.com]
Sent: Tuesday, August 18, 2009 4:24 AM
To: Wolfgang Denk
Cc: Prafulla Wadaskar; u-boot@lists.denx.de; Ashish Karkare;
Prabhanjan Sarnaik
Subject: Re: [U-Boot] [PATCH v2] arm: Kirkwood: add
Hi Sridhar,
[4.106288] init has generated signal 11 but has no handler for it
[4.112525] Kernel panic - not syncing: Attempted to kill init!
[4.118461] Rebooting in 3 seconds..
My /etc doesnt have this ld.so.cache.
Your init/busybox obviously has problems. Did you try to boot
Thanks for the review Prafulla!
On Tue, 18 Aug 2009 03:12:07 -0700
Prafulla Wadaskar prafu...@marvell.com wrote:
v2: Malloc send buffer (comment from Stefan Roese)
Malloc will always be an overhead.
It's only allocated once (the first time a non-aligned buffer is
passed), so the overhead is
Dear Tuma,
In message 200908181300.25197.chernigovs...@spb.gs.ru you wrote:
Oo, thank you! I forgot about CROSS_COMPILE=. In my old U-Boot this parameter
was set in Makefile. In 2009 CROSS_COMPILE= in Makefile was ignored.
This statement is plain wrong. CROSS_COMPILE= has never been ignored
Dear Wolfgang Denk,
I tested your patch against 7dedefdf749ff02c1086f7ddb8cb83a77b00d030
(latest revision at the moment of writing of u-boot.git).
My toolchain is a home-made toolchain and contains gcc-4.4.1,
binutils-2.19.1, eglibc-2.10.1, kernel headers 2.6.30.4, configured to
generate binaries
Dear Sridhar M,
In message 25021185.p...@talk.nabble.com you wrote:
Thanks a lot. I tried the same but it still gives me the same error. These
are the one that gets displayed.
YOU ARE OFF TOPIC HERE.
YOU ARE OFF TOPIC HERE.
YOU ARE OFF TOPIC HERE.
Do you get it?
[0.00] Linux
Dear Peter Chen,
In message 1250589013.6208.40.ca...@nchen-desktop you wrote:
The functions which in my function list are written by our own.
and do not call any other functions at original u-boot code. In that
case,
Then just link them against your standalone application, and keep the
Dear Matthew Lear,
In message 4a8a7fa3.2090...@bubblegen.co.uk you wrote:
Firstly, perhaps the problems I have with netcat and U-Boot netconsole
are partly to do with the 'listener' software itself (ie netcat),
running on server ip. AFAIK the 'mapping' of netcat to target ip
address in
Dear Gaye Abdoulaye Walsimou,
In message 4a8a8b27.7080...@walsimou.com you wrote:
I tested your patch against 7dedefdf749ff02c1086f7ddb8cb83a77b00d030
Thanks for testing!
Results:
I was unable to compile without the patch in this thread
Wolfgang Denk wrote:
For some time there have been repeated reports about build problems
with some ARM (cross) tool chains. Especially issues about
(in)compatibility with the tool chain provided runtime support
library libgcc.a caused to add and support a private implementation
of such
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20090817234931.ge4...@game.jcrosoft.org you wrote:
Hi,
please pull
The following changes since commit 7dedefdf749ff02c1086f7ddb8cb83a77b00d030:
John Schmoller (1):
flash: Fix CFI buffer size bug
are available in the git
Dear Kumar Gala,
In message pine.lnx.4.64.0908141748540.3...@localhost.localdomain you wrote:
This fixes an issue that cropped in v2009.08-rc testing.
The following changes since commit 7dedefdf749ff02c1086f7ddb8cb83a77b00d030:
John Schmoller (1):
flash: Fix CFI buffer size bug
Dear Stefan Roese,
In message 200908180923.10022...@denx.de you wrote:
Hi Wolfgang,
please pull the following bug fix:
Thanks,
Stefan
The following changes since commit 7dedefdf749ff02c1086f7ddb8cb83a77b00d030:
John Schmoller (1):
flash: Fix CFI buffer size bug
are
Dear Prafulla Wadaskar,
In message 1250380700-15636-1-git-send-email-prafu...@marvell.com you wrote:
uninitialized retval variable warning fixed
crc32 APIs moved to crc.h (newly added) and build warnings fixed
some indentation tabs fixed
Signed-off-by: Prafulla Wadaskar prafu...@marvell.com
Dear Prafulla,
In message 2009081813.73095833d...@gemini.denx.de I wrote:
In message 1250380700-15636-1-git-send-email-prafu...@marvell.com you wrote:
uninitialized retval variable warning fixed
crc32 APIs moved to crc.h (newly added) and build warnings fixed
some indentation tabs
Hello Kim,
I actually work on an u-boot mpc8321 port (mostly identical with the kmeter1
port already in mainline), and I have to set the LCRR (Clock Ratio Register
Reference Manual 10.3.1.14). As I see in
cpu/mpc83xx/cpu_init.c cpu_init_f()
this is done while running from flash. Hmm... the
I posted a message before about this, but I didn't really give it the most
descriptive subject (I went off to find the chip model and then forgot to
add it to the subject, doh!)
Basically I'm trying to port uboot to the Broadcom BCM7038 chip, the current
bootloader I have is specific to the board
+static void nand_davinci_4bit_enable_hwecc(struct mtd_info *mtd, int
mode)
+{
+ u32 val;
+
+ switch (mode) {
+ case NAND_ECC_WRITE:
+ case NAND_ECC_READ:
+ /*
+* Start a new ECC calculation for reading or writing 512
bytes
+* of
From: Sandeep Paulraj s-paul...@ti.com
This patch adds 4 BIT ECC support in the DaVinci NAND
driver. Tested on both the DM355 and DM365.
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
---
I had earlier sent another patch along with this patch to add 4 BIT ECC support
[PATCH] ARM: DaVinci
On Aug 18, 2009, at 5:12 AM, Thirumalai wrote:
Hi kumar,
The CONFIG_PHYS_64BIT was not defined on the header file
of HPCN but extended address translation was enabled on the start.S
irrespective of the MPC8641D_hpcn compilation option why?.
Regards,
T.
Are you running into
On Aug 18, 2009, at 2:37 AM, Mingkai Hu wrote:
To simplify the top level makefile it useful to be able to paree
the top level makefile target to multiple individual target, then
put them to the config.h and config.mk, leave the board config file
and board makefile to handle the different
On Tue, Aug 18, 2009 at 08:56:03AM -0500, Paulraj, Sandeep wrote:
+ case NAND_ECC_READSYN:
+ val = emif_regs-NAND4BITECC1;
Use I/O accessors.
I could not understand this one. It is done similarly
nand_davinci_enable_hwecc which is used for 1 BIT ECC.
NANDFCR is a control
I don't see a next branch in u-boot-arm. Am I missing something?
Thanks
John
On Mon, Aug 17, 2009 at 4:01 PM, Jean-Christophe PLAGNIOL-VILLARD
plagn...@jcrosoft.com wrote:
On 11:20 Sat 15 Aug , s-paul...@ti.com wrote:
From: Sandeep Paulraj s-paul...@ti.com
This patch adds support
-Original Message-
From: Scott Wood [mailto:scottw...@freescale.com]
Sent: Tuesday, August 18, 2009 11:12 AM
To: Paulraj, Sandeep
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH] NAND: DaVinci: Adding 4 BIT ECC support
On Tue, Aug 18, 2009 at 08:56:03AM -0500, Paulraj,
John,
Yesterday night after J-C mentioned that he applied 2 of my patches to
u-boot-arm next I tried to checkout that branch
to add some more stuff on top of my Dm365 patches.
I could not see it either. But I have used that branch in the recent past. I
don't know what is wrong.
Thanks,
Paulraj, Sandeep wrote:
What I mean is using accessors such as readl/writel -- though we're still
in a pretty sorry state with respect to what accessors we provide cross
architectures (you have to pick between native endian with no barriers,
or little endian with barriers).
Scott, I am
Paulraj, Sandeep wrote:
And please correct me if I am wrong, but J-C can't actually pull these
patches into his next branch correct?
Right, not yet.
That is because it will require 2 of the NAND patches that I sent a week ago.
Thus you might have to accept the DM355 EVM config update
The following fixes since commit 2bcbd429f44e32ead38a33f372e4c027e66710f9:
Wolfgang Denk (1):
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
are available in the git repository at:
git://git.denx.de/u-boot-nand-flash.git master
Giulio Benetti (1):
add
On Mon, Aug 10, 2009 at 01:27:56PM -0400, s-paul...@dal.design.ti.com wrote:
From: Sandeep Paulraj s-paul...@ti.com
This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to
support 4-bit ECC on TI DaVinci devices with large page (up to 2K) NAND
chips. This ECC mode is similar
On Tue, Aug 18, 2009 at 10:10:42AM -0400, s-paul...@ti.com wrote:
From: Sandeep Paulraj s-paul...@ti.com
This patch adds 4 BIT ECC support in the DaVinci NAND
driver. Tested on both the DM355 and DM365.
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
When I build with this patch, but
Sorry, I forgot it. And thanks for your tips.
2009/8/18 Wolfgang Denk w...@denx.de:
Dear Gao Ya'nan,
In message d15e5cf90908171607i1d81d5aby3bcd0c4c28ba7...@mail.gmail.com you
wrote:
And is there any successful stories about Xenomai/SOLO?
This is the U-Bootmailing list - you are off
From: Sandeep Paulraj s-paul...@ti.com
This patch enables NAND support on the DM355 EVM.
Changes in this patch mostly relate to adding the NAND support.
This patch also defines a boot delay.
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
---
include/configs/davinci_dm355evm.h | 22
From: Sandeep Paulraj s-paul...@ti.com
This patch adds 4 BIT ECC support in the DaVinci NAND
driver. Tested on both the DM355 and DM365.
V3 version of the patch resolves compilation warnings pointed to by
Scott Wood. These compilation warnings occur when 4 BIT ECC support
is not enabled
Hi Wolfgang,
On Tuesday 18 August 2009 13:58:54 Wolfgang Denk wrote:
The following changes since commit
7dedefdf749ff02c1086f7ddb8cb83a77b00d030: John Schmoller (1):
flash: Fix CFI buffer size bug
are available in the git repository at:
Wolfgang,
2009/8/17 Wolfgang Denk w...@denx.de:
Dear Magnus Lilja,
In message 59b21cf20908171317s10d7fdb5t631c37f06707e...@mail.gmail.com you
wrote:
This way we use a similar logic for the compile options as the
Linux kenrel does.
kenrel = kernel :-)
Thanks, will try to remember
-Original Message-
From: Wolfgang Denk [mailto:w...@denx.de]
Sent: Tuesday, August 18, 2009 8:16 PM
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik
Subject: Re: [U-Boot] [PATCH 2/2] tools: mkimage: split code
into core, default and FIT image
-Original Message-
From: Wolfgang Denk [mailto:w...@denx.de]
Sent: Tuesday, August 18, 2009 6:23 PM
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik
Subject: Re: [U-Boot] [PATCH v2 1/2] tools: mkimage: Fixed
build warnings
Dear Prafulla,
Wolfgang Denk wrote:
For some time there have been repeated reports about build problems
with some ARM (cross) tool chains. Especially issues about
(in)compatibility with the tool chain provided runtime support
library libgcc.a caused to add and support a private implementation
of such
Dear Stefan Roese,
In message 200908181906.03021...@denx.de you wrote:
Umm... what about this patch:
07/30 Dirk Eibach ppc4xx: Support PPC460EX rev B on gdsys CompactCenter
Not needed any more. It's been superseded by this patch which is already in
mainline:
ppc4xx: Remove check
Dear Scott Wood,
In message 20090818151213.gb26...@b07421-ec1.am.freescale.net you wrote:
On Tue, Aug 18, 2009 at 08:56:03AM -0500, Paulraj, Sandeep wrote:
+ case NAND_ECC_READSYN:
+ val = emif_regs-NAND4BITECC1;
Use I/O accessors.
I could not understand this
Dear Paulraj, Sandeep,
In message 0554bef07d437848af01b9c9b5f0bc5d7e996...@dlee01.ent.ti.com you
wrote:
What I mean is using accessors such as readl/writel -- though we're still
in a pretty sorry state with respect to what accessors we provide cross
architectures (you have to pick
Dear Scott Wood,
In message 4a8acbd0.6060...@freescale.com you wrote:
Paulraj, Sandeep wrote:
And please correct me if I am wrong, but J-C can't actually pull these
patches into his next branch correct?
Right, not yet.
That is because it will require 2 of the NAND patches that I sent
Dear Heiko Schocher,
In message 4a827a7f.30...@denx.de you wrote:
Signed-off-by: Heiko Schocher h...@denx.de
---
lib_ppc/bootm.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang
Dear Ilya Yanok,
In message 1250080968-10923-1-git-send-email-ya...@emcraft.com you wrote:
We should call jffs2_clean_cache() if we return from jffs2_build_lists()
with an error to prevent usage of incomplete lists. Also we should
free() a local buffer to prevent memory leaks.
Dear Albin Tonnerre,
In message
1250170272-25909-1-git-send-email-albin.tonne...@free-electrons.com you wrote:
In the process, also remove backward-compatiblity macros BIN_TO_BCD and
BCD_TO_BIN and update the sole board using them to use the new bin2bcd
and bcd2bin instead
Signed-off-by:
Dear Albin Tonnerre,
In message
1250170272-25909-2-git-send-email-albin.tonne...@free-electrons.com you wrote:
Signed-off-by: Albin Tonnerre albin.tonne...@free-electrons.com
---
drivers/rtc/ds12887.c | 12
drivers/rtc/ds1306.c | 18 --
Dear Albin Tonnerre,
In message 1250183564-6140-1-git-send-email-albin.tonne...@free-electrons.com
you wrote:
This RTC is used in some Calao boards. The driver code is taken from the
linux rtc-m41t94 driver
Signed-off-by: Albin Tonnerre albin.tonne...@free-electrons.com
---
Changelog
Dear Remy Bohmer,
In message 3efb10970908180032w57826ddexeae344ae52a8b...@mail.gmail.com you
wrote:
Except from the fact that IMHO this driver belongs in the drivers/usb
section (and being merged into the existing ohci-driver):
Agreed...
Acked-by: Remy Bohmer li...@bohmer.net
Thanks.
Dear Eric Millbrandt,
In message 20090813131409.m57...@coldhaus.com you wrote:
Support USB on PSC3 on the mpc5200. Before this patch, enabling USB support
would reconfigure PSC4 and PSC5 to USB. The mpc5200 does not support USB
enabled on both the standard USB port and PSC3. This patch
Jean-Christophe has acked this one - see
http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/65792/focus=6614
He said he'll ACK if this patch is ACK'ed. He has not acked yet.
But I'm concerned about direct register accesses. We really should
insist on using proper accessor calls.
I'll
Dear Paulraj, Sandeep,
In message 0554bef07d437848af01b9c9b5f0bc5d7e996...@dlee01.ent.ti.com you
wrote:
Yesterday night after J-C mentioned that he applied 2 of my patches to u-bo
ot-arm next I tried to checkout that branch
to add some more stuff on top of my Dm365 patches.
I could not
Dear s-paul...@ti.com,
In message 1250613233-3362-1-git-send-email-s-paul...@ti.com you wrote:
From: Sandeep Paulraj s-paul...@ti.com
This patch adds 4 BIT ECC support in the DaVinci NAND
driver. Tested on both the DM355 and DM365.
V3 version of the patch resolves compilation warnings
Dear Magnus Lilja,
In message 59b21cf20908181008t75a981d8g512c10687c0b8...@mail.gmail.com you
wrote:
Tested-by: Magnus Lilja lilja.mag...@gmail.com
Run-time tested on i.MX31 PDK board using the above toolchains.
Thanks a lot!
Best regards,
Wolfgang Denk
--
DENX Software Engineering
Dear Tom,
In message 4a8af7d9.7070...@windriver.com you wrote:
MAKEALL arm with CodeSourcery's
arm-2008q3-72-arm-none-linux-gnueabi-i686-pc-linux-gnu
arm-2009q1-203-arm-none-linux-gnueabi-i686-pc-linux-gnu
and this patch differ from
USE_PRIVATE_LIBGCC=yes ./MAKEALL arm
only in these
The mac id command took a 4-character parameter as the identifier string.
However, for any given board, only one kind of identifier is acceptable, so it
makes no sense to ask the user to type it in. Instead, if the user enters
mac id, the identifier (and also the version, if it's NXID) will
On Aug 18, 2009, at 9:14 AM, Kumar Gala wrote:
On Aug 18, 2009, at 5:12 AM, Thirumalai wrote:
Hi kumar,
The CONFIG_PHYS_64BIT was not defined on the header file
of HPCN but extended address translation was enabled on the start.S
irrespective of the MPC8641D_hpcn compilation
Hi all,
How do i go about the SDRAM/DDR initialization on my board. IS the
function partitoned or is it just done in a single place.
I would think that board specifc dram_init is just a generic
function. There has to be a specific place where the SDRAM controller
is told about the DRR/SDRAM.
Is
This feature can be used to trigger special command sysrstcmd using
reset key long press event and environment variable sysrstdelay is set
(useful for reset to factory or manufacturing mode execution)
Kirkwood SoC implements a hardware-based SYSRSTn duration counter.
When SYSRSTn is asserted low,
Hi
2009/8/19 alfred steele alfred.jaq...@gmail.com:
Hi all,
How do i go about the SDRAM/DDR initialization on my board. IS the
function partitoned or is it just done in a single place.
I would think that board specifc dram_init is just a generic
function. There has to be a specific place
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