On 07/18/11 13:19, Chander Kashyap wrote:
> Origen board is based upon S5PV310 SoC which is similiar to
> S5PC210 SoC.
>
> Signed-off-by: Chander Kashyap
> ---
> Changes for v2:
> - None
> Changes for v3:
> - Board entry added Alphabetically in boards.cfg
> - Used get_Ram_size
Dear Simon,
Am 25.07.2011 um 20:05 schrieb Simon Schwarz:
> Add NAND SPL support to the devkit8000 config
>
> ---
> V1 changes:
> ADD devkit8000_nand to board.cfg
> ADD nand_spl Makefile, llinker script, spl-devkit8000.c
> ADD config ecc, SRAM, SPL to board config
> ADD CONFIG_SYS_SRAM_START and
Dear Simon,
Am 25.07.2011 um 20:05 schrieb Simon Schwarz:
> Support for the new spl structure. Using the interface defined by Aneesh V for
> OMAP4
> ---
> V1 changes:
> ADD support for early console output in SPL
>
> V2 changes:
> ADD include omap_common.h in board.c
> ADD implement new omap com
Dear Simon,
Am 25.07.2011 um 20:05 schrieb Simon Schwarz:
> Add NAND support for the new SPL structure.
>
> ---
> This patch didn't exist before V2!
>
> V2 changes:
> ADD Some define-barriers for OMAP3 to only use NAND
> ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
Dear Albert
Am 23.05.2011 11:49, schrieb Albert ARIBAUD:
> Le 23/05/2011 11:30, Alexander Holler a écrit :
>> Am 23.05.2011 11:06, schrieb Matthias Weisser:
>>> In some cases (e.g. bootm with a elf payload which is already at the right
>>> position) there is a in place copy of data to the same add
Dear Chander Kashyap,
On 18 July 2011 19:19, Chander Kashyap wrote:
> Origen board is based upon S5PV310 SoC which is similiar to
> S5PC210 SoC.
>
> Signed-off-by: Chander Kashyap
> ---
> Changes for v2:
> - None
> Changes for v3:
> - Board entry added Alphabetically in boards.cf
Dear Lukasz Majewski,
On 19 July 2011 03:05, Mike Frysinger wrote:
> On Fri, Jul 15, 2011 at 06:16, Lukasz Majewski wrote:
>> This change is driven by need of general gpio_* functions,
>> which as their parameter are accepting the GPIO pin number, NOT
>> block and pin.
>
> Acked-by: Mike Frysinge
Dear Simon,
Am 25.07.2011 um 20:05 schrieb Simon Schwarz:
> Insert some NAND driver sources into NAND SPL library.
>
> ---
> V1 changes:
> CHG Default to HW ecc in SPL build
> ADD nand_read_buf16 function, read buffer
> ADD omap_dev_ready function, indicte if chip is ready
>
> V2 changes:
> DEL
On Jul 25, 2011, at 12:57 PM, Wolfgang Denk wrote:
> Dear Kumar Gala,
>
> In message you
> wrote:
>>
>>> DRAM: __fsl_ddr_set_lawbar: ERROR (ctrl #0, intrlv=3D0)
>>> 256 MiB (DDR1, 64-bit, CL=3D2, ECC off)
> ...
>> On this board what is 'reset' really doing? I have a theory but would
>> be h
From: sardamaxima
>
> In the first processor (configured as RC) I get the following
...
> ...PCIE LTSSM=0x16, Negotiated link width=1
Good.
>Scanning PCI bus 01
> PCIE1 on bus 00 - 01
...
> In the second processor (configured as EP) I get the
> following output:
> "
>
Dear Jens Scharsig,
In message <4e23d6c2.7070...@bus-elektronik.de> you wrote:
> * Fix: if using crc32 command watchdog timed out
> * change function call crc32(..) to the watchdog-safe variant
> crc_32_wd(..) to support watchdog reset
>
>
> Signed-off-by: Jens Scharsig
> ---
> common/cmd_me
Dear Matthias Weisser,
In message <1306141435-24001-1-git-send-email-weiss...@arcor.de> you wrote:
> In some cases (e.g. bootm with a elf payload which is already at the right
> position) there is a in place copy of data to the same address. Catching this
> saves some ms while booting.
>
> Signed
How odd, I have the thread where I sent out the second version of the
patch and even have Detlev's Ack to it (the u-boot list is in the list
of recipients), but it isn't reflected on gmane or the u-boot list
archives. I'll send it again and keep an eye on the list.
Thanks,
Anton
On Mon, Jul
Dear Rob Herring,
In message <1310004816-18266-1-git-send-email-robherri...@gmail.com> you wrote:
> From: Rob Herring
>
> Add support for AHCI controllers that are not PCI based.
>
> Signed-off-by: Rob Herring
> Cc: Wolfgang Denk
> ---
> changes in v2:
> - fix checkpatch.pl warnings/errors
>
On Jul 25, 2011, at 2:28 PM, Wolfgang Denk wrote:
> Dear Kumar,
>
> In message <20110725175756.d2bd8138e...@gemini.denx.de> I wrote:
>>
>> This is a MPC8555 based board:
>>
>> CPU: 8555E, Version: 1.1, (0x80790011)
>> Core: Unknown, Version: 2.0, (0x80200020)
>>
>> THe do_reset()
Dear Rob Herring,
In message <1308692003-2488-4-git-send-email-robherri...@gmail.com> you wrote:
> From: Rob Herring
>
> The ata id string always needs swapping, not just on BE machines.
>
> Signed-off-by: Rob Herring
> Cc: Wolfgang Denk
> ---
> drivers/block/ahci.c |2 +-
> 1 files chan
Dear Anton Staaf,
In message
you wrote:
> Just checking, will this will make it into the next release?
I'm still waiting for a resubmit of patch 1/2 as requested by Detlev:
06/30 Detlev Zundel Re: [U-Boot] [PATCH 1/2] ext2: Fix checkpatch
violations
http://article.gmane.org/
Dear Rod Boyce,
In message <4dfc750f.7050...@teamboyce.co.uk> you wrote:
>
> Free private_data member element before freeing file structure. This
> was causing malloc to crash. Also remove unnecessary variable
> assigments after file structure was free'd.
>
> Signed-off-by: Rod Boyce
Changes
Dear Heiko Schocher,
In message <1306909447-19603-3-git-send-email...@denx.de> you wrote:
> This include is needed, if this memory test is used "outside"
> from post code, for example booting with nand_spl, and using
> this memory test before copying u-boot code to RAM and jumping
> to it.
>
> Si
Dear Macpaul Lin,
In message <1303718498-20740-1-git-send-email-macp...@andestech.com> you wrote:
> andes_spi is an spi interface developed by Andes Tech.
>
> Signed-off-by: Macpaul Lin
> Cc: Wolfgang Denk
> Cc: Mike Frysinger
> ---
> Changes for v2:
> - Replace redundant length checking by
Dear "Jason Hobbs",
In message <1309366710-17400-2-git-send-email-jason.ho...@calxeda.com> you
wrote:
> Signed-off-by: Jason Hobbs
...
> +void uuid_str_to_bin(const char *uuid, unsigned char *out)
> +{
> + uint16_t tmp16;
> + uint32_t tmp32;
> + uint64_t tmp64;
> +
> + if (!uuid
Dear "Jason Hobbs",
In message <1309364719-16219-5-git-send-email-jason.ho...@calxeda.com> you
wrote:
> Signed-off-by: Jason Hobbs
> ---
> changes in v2:
> - new in v2
>
> common/main.c | 12 ++--
> 1 files changed, 6 insertions(+), 6 deletions(-)
Applied, thanks.
Best regards,
Wo
Dear "Jason Hobbs",
In message <1309364719-16219-3-git-send-email-jason.ho...@calxeda.com> you
wrote:
> Remove an unneeded prototype declaration from the top of main.c,
> and use plain inline instead of __inline__ to please checkpatch.
>
> Signed-off-by: Jason Hobbs
> ---
> changes in v3:
> -
Dear "Jason Hobbs",
In message <1309364719-16219-2-git-send-email-jason.ho...@calxeda.com> you
wrote:
> This will be used first by the pxecfg code, but is intended to be
> generic and reusable for other jobs in U-boot.
>
> Signed-off-by: Jason Hobbs
> ---
> changes in v2:
> - new in v2
>
> ch
Dear "Jason Hobbs",
In message <1309364719-16219-7-git-send-email-jason.ho...@calxeda.com> you
wrote:
> Add pxecfg command, which is intended to mimic PXELINUX functionality.
> 'pxecfg get' uses tftp to retrieve a file based on UUID, MAC address or
> IP address. 'pxecfg boot' interprets the conte
Dear "Jason Hobbs",
In message <1309364719-16219-6-git-send-email-jason.ho...@calxeda.com> you
wrote:
> Signed-off-by: Jason Hobbs
> ---
> changes in v2:
> - whitespace correction
...
> --- a/common/main.c
> +++ b/common/main.c
> @@ -333,12 +333,7 @@ void main_loop (void)
> int pre
Introduce the CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW
macros, which contain the high and low portions of CONFIG_SYS_CCSRBAR_PHYS.
This is necessary for the assembly-language code that relocates CCSR, since
the assembler does not understand 64-bit constants.
CONFIG_SYS_CCSRBAR_
Before main memory (DDR) is initialized, the on-chip L1 cache is used as a
memory area for the stack and the global data (gd_t) structure. This is
called the initial RAM area, or initram. The L1 cache is locked and the TLBs
point to a non-existent address (so that there's no chance it will overla
Dear Mike Frysinger,
In message <1307027978-13418-2-git-send-email-vap...@gentoo.org> you wrote:
> When CONFIG_DW_SEARCH_PHY is disabled, the local phy_addr variable never
> gets initialized causes random behavior at runtime and a gcc warning. So
> set it by default to the stored phy address.
>
Dear Mike Frysinger,
In message <1307027978-13418-1-git-send-email-vap...@gentoo.org> you wrote:
> The ctrl variable is only used when autoneg support is disabled, so only
> declare it under those conditions to avoid an unused variable warning.
>
> Signed-off-by: Mike Frysinger
> ---
> drivers/
Dear Mike Frysinger,
In message <1307317382-22108-1-git-send-email-vap...@gentoo.org> you wrote:
> Rather than having a bunch of random commands handle autostart behavior,
> unify the logic in a single place. This also fixes building of these
> different commands when bootm is disabled.
>
> Acke
Dear Kumar Gala,
In message you
wrote:
> The following changes since commit 74fac70084bb040342fafc3b0d2ef50fbe35646f:
>
> Merge branch 'master' of git://git.denx.de/u-boot-mmc (2011-07-19 22:27:07
> +0200)
>
> are available in the git repository at:
>
> git://git.denx.de/u-boot-mpc85xx.g
Dear Kumar,
In message <20110725175756.d2bd8138e...@gemini.denx.de> I wrote:
>
> This is a MPC8555 based board:
>
> CPU: 8555E, Version: 1.1, (0x80790011)
> Core: Unknown, Version: 2.0, (0x80200020)
>
> THe do_reset() code is supposed to be the one from
> "arch/powerpc/cpu/mpc85x
Hello all,
I really appreciate all of your replies and sorry for not being responsive for
sometime. But I am glad to say that I was able to flash new u-boot along with
fman ucode and rcw. I am using p4080DS dev board from freescale and the rcw is
important in terms of which ports to be enabled
Dear Mike,
In message
you wrote:
>
> On Mon, Jul 25, 2011 at 2:05 PM, Wolfgang Denk wrote:
...
> > It appears the Redwood board is unmaintained. =A0No updates for this
> > board have ever been posted since the initial addition more than 3
> > years ago, nor is there any board maintainer regist
Wolfgang,
On Mon, Jul 25, 2011 at 2:05 PM, Wolfgang Denk wrote:
> Dear Stefan,
>
> In message <201107251711.21381...@denx.de> you wrote:
>>
>> I also don't have access to an 460SX board. And yes, perhaps its best to
>> split
>> the code now (460EX/GT vs. 460SX).
>>
>> Marri, what do you think? P
Add NAND SPL support to the devkit8000 config
---
V1 changes:
ADD devkit8000_nand to board.cfg
ADD nand_spl Makefile, llinker script, spl-devkit8000.c
ADD config ecc, SRAM, SPL to board config
ADD CONFIG_SYS_SRAM_START and _SIZE to board config
ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK
Support for the new spl structure. Using the interface defined by Aneesh V for
OMAP4
---
V1 changes:
ADD support for early console output in SPL
V2 changes:
ADD include omap_common.h in board.c
ADD implement new omap common interface omap_boot_device, omap_boot_mode and
omap_rev_string (ve
Insert some NAND driver sources into NAND SPL library.
---
V1 changes:
CHG Default to HW ecc in SPL build
ADD nand_read_buf16 function, read buffer
ADD omap_dev_ready function, indicte if chip is ready
V2 changes:
DEL GPMC_WAIT0_PIN_ACTIVE define
CHG omap_dev_ready() renamed to omap_spl_dev_read
Add NAND support for the new SPL structure.
---
This patch didn't exist before V2!
V2 changes:
ADD Some define-barriers for OMAP3 to only use NAND
ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
header
CHG cosmetic
ADD do_reset() implementation for omap-common s
OMAP3 relied on the memory config done by X-loader or Configuration Header. This
has to be reworked for the implementation of a SPL. This patch configures RAM
bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
are added to mem.h
---
V1 changes:
ADD Settings for Micron RA
This patch series adds a NAND SPL to OMAP3 and the devkit8000 board.
I tried to clean-up the mess of the former patches as good as possible.
Note that rebasing this patch on the patches mentioned below renders Patch 1/5
of the old series obsolete. Most other patches have heavy changes.
I not
Dear Stefan,
In message <201107251711.21381...@denx.de> you wrote:
>
> I also don't have access to an 460SX board. And yes, perhaps its best to
> split
> the code now (460EX/GT vs. 460SX).
>
> Marri, what do you think? Perhaps you could test the resulting code on an SX
> board?
It appears th
Dear Kumar Gala,
In message you wrote:
>
> > DRAM: __fsl_ddr_set_lawbar: ERROR (ctrl #0, intrlv=3D0)
> > 256 MiB (DDR1, 64-bit, CL=3D2, ECC off)
...
> On this board what is 'reset' really doing? I have a theory but would
> be helpful to understand what's happening.
This is a MPC8555 based boa
You have a transfer of £1,000,000.00. from Western Union® For more information
(Contact This Office Email: western.uni...@w.cn) Mr.Frank Ban
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Alex Zeffertt writes:
> and then I burn the .kwb file into the flash using openocd.
>
> Unfortunately I cannot get the Gig Eth ports to work in u-boot at the
> moment. When I run the following at the command prompt the console just
> hangs and I have to reboot:
>
> Marvell>> setenv ipaddr
Hi list,
I've just bought an OpenRD Ultimate board and I've managed to get u-boot
running on it. I am building it like this, using the latest u-boot GIT
repo:
make mrproper CROSS_COMPILE=arm-none-linux-gnueabi-
make openrd_ultimate_config CROSS_COMPILE=arm-none-linux-gnueabi-
make u-boot.kwb
Mike,
[Added Marri from APM to CC]
On Monday 25 July 2011 16:42:14 Mike Williams wrote:
> > (first use in this function) make[1]: *** [speed.o] Error 1
> > make[1]: *** Waiting for unfinished jobs
> > make: *** [arch/powerpc/cpu/ppc4xx/libppc4xx.o] Error 2
> > make: *** Waiting for unfinished
Hi Aneesh,
I'am nearly done with OMAP3 - I think I can release the patch today.
I have just one problem left:
You implemented preloader_console_init() in omap-common to call
setup_clocks_for_console(). This is a OMAP4 specific call - OMAP3 only
has per_clocks_init() - which inits a bunch of clo
Stefan,
On Mon, Jul 25, 2011 at 7:55 AM, Stefan Roese wrote:
> Hi Mike,
>
> On Thursday 21 July 2011 17:06:03 Mike Williams wrote:
>> This code has been changed to read the CPU speed information from the
>> CPR registers rather than the bootstrap registers. This is useful when
>> changing the clo
On Jul 25, 2011, at 3:18 AM, Wolfgang Denk wrote:
> Dear Kumar,
>
> I'm seeing the following problem on a MPC8555 board:
>
> Power-on reset works fine:
>
> ...
> I2C: ready
> DRAM: 256 MiB (DDR1, 64-bit, CL=2, ECC off)
> Flash: 64 MiB
> L2:256 KB enabled
> ...
>
> But a soft-reset resu
Some boards have the environment variables defined in a slow EEPROM. post_run
accesses these environment variables to define which tests have to be run (in
post_get_flags). This is very slow before the code relocation on some boards
with a slow I2C EEPROM for environement variables.
This patch add
We also have to shift TEXT_BASE to accomodate for the additional
code size.
Signed-off-by: Wolfgang Denk
Cc: Kumar Gala
---
board/stx/stxssa/stxssa.c |8
include/configs/stxssa.h |7 ++-
2 files changed, 14 insertions(+), 1 deletions(-)
diff --git a/board/stx/stxssa/stxs
Hi Mike,
On Thursday 21 July 2011 17:06:03 Mike Williams wrote:
> This code has been changed to read the CPU speed information from the
> CPR registers rather than the bootstrap registers. This is useful when
> changing the clock speed to something other than the default on boot.
Thanks. Unfortun
This deletes the integrator split_by_variant.sh script and
defines a number of unique board types for the core modules
that are meaningful to support for the Integrator AP/CP, i.e.
the ones that did not just say "unsupported core module" in
split_by_variant.sh. If more core modules need to be suppo
This defines the requires CONFIG_SYS_* variables to make the
Integrator CP board compile.
Signed-off-by: Linus Walleij
---
include/configs/integratorcp.h |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h
The default configuration for the Integrator AP forces memory to be
32 MB on the command line to the kernel, while we have perfect
information and detection of the actual memory size in the ATAGs.
Delete the confusion.
Signed-off-by: Linus Walleij
---
include/configs/integratorap.h |2 +-
1
This adds support for a subset of the default commands for the
Integrator, however since the card does not have Ethernet (unless
you plug in a PCI card) we can not use the default command set.
Signed-off-by: Linus Walleij
---
include/configs/integratorap.h |6 ++
1 files changed, 6 inser
Give us some kind of sane shell environment so the bootloader can
be used.
Signed-off-by: Linus Walleij
---
include/configs/integratorap.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index 1650c03..2754
The integrator board was apparently never converted over to support
relocation until now. After this the integrator u-boot both compiles
and boots on the Integrator AP.
This also fixes the SDRAM memory size detection.
Signed-off-by: Linus Walleij
---
board/armltd/integrator/integrator.c | 15
The integratorap/cp config for u-boot was outdated and would not
even compile, so fix the obvious missing bits for it to start
building. After this "make ap920t_config/make all" starts working
again.
Signed-off-by: Linus Walleij
---
board/armltd/integrator/lowlevel_init.S |2 +-
include/conf
- Take maintainership of the unlisted integratorap, and the
integratorcp boards
- Orphan the versatile maintained by Peter Pearse, as he has retired
from ARM
Cc: Philippe Robin
Signed-off-by: Linus Walleij
---
MAINTAINERS | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
DETAILED CHANGELOG:
Changes v3 patchset to v4:
- One line for versatile in MAINTAINERS patch 1 instead of two.
- Squashed patch 3 (relocation) and patch 6 (SDRAM size detection).
The former was introducing a whitespace bug and the latter was
fixing it, and since both patches are strongly relat
On Mon, Jul 25, 2011 at 1:22 PM, Linus Walleij wrote:
> On Mon, Jul 25, 2011 at 12:46 PM, Sergei Shtylyov
> wrote:
>>> -int dram_init (void)
>>> +void dram_init_banksize(void)
>>> {
>>> gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
>>> - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
>>>
On Mon, Jul 25, 2011 at 12:46 PM, Sergei Shtylyov wrote:
>> -int dram_init (void)
>> +void dram_init_banksize(void)
>> {
>> gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
>> - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
>> + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
>
> You'r
On Mon, Jul 25, 2011 at 12:44 PM, Sergei Shtylyov wrote:
>> @@ -550,6 +550,9 @@ Unknown / orphaned boards:
>>
>> EVB64260 MPC7xx_74xx
>>
>> + versatile ARM926EJ-S
>> + versatile ARM926EJ-S
>
> What's the difference between these? :-)
Haha yeah I just moved
Dear Becky Bruce,
In message <13110329582097-git-send-email-bec...@kernel.crashing.org> you wrote:
> We need a TLB entry to call get_ram_size(); the common code
> doesn't create one until *after* fixed_sdram() has determined
> the size. So we set up tlbs for the max possible size
> and tear them
Dear Becky Bruce,
In message <13110329572704-git-send-email-bec...@kernel.crashing.org> you wrote:
> This is useful when we just want to wipe out the TLBs. There's
> currently a function that resets the ddr tlbs to a different value;
> it is changed to utilize this function. The new function can
Hello.
On 23-07-2011 17:37, Linus Walleij wrote:
> The integrator board was apparently never converted over to support
> relocation until now. After this the integrator u-boot both compiles
> and boots on the Integrator AP.
> Signed-off-by: Linus Walleij
> ---
> board/armltd/integrator/integra
Hello.
On 23-07-2011 17:37, Linus Walleij wrote:
> - Take maintainership of the unlisted integratorap, and the
>integratorcp boards
> - Orphan the versatile maintained by Peter Pearse, as he has retired
>from ARM
> Cc: Philippe Robin
> Signed-off-by: Linus Walleij
> ---
> MAINTAINERS |
Dear Kumar,
I'm seeing the following problem on a MPC8555 board:
Power-on reset works fine:
...
I2C: ready
DRAM: 256 MiB (DDR1, 64-bit, CL=2, ECC off)
Flash: 64 MiB
L2:256 KB enabled
...
But a soft-reset results in this:
=> reset
...
I2C: ready
DRAM: __fsl_ddr_set_lawbar: ERROR (ctrl
lc_common_dimm_params.c was too verbose and corrupted the boot
message display like this:
...
DRAM: Detected UDIMM M2U25664DS88C3G-6K
DDR: 256 MiB (DDR1, 64-bit, CL=2, ECC off)
...
Turn printf() into debug() so we het the expected output again:
...
Current code would print RAM size information like this:
DRAM: DDR: 256 MiB (DDR1, 64-bit, CL=2, ECC off)
Turn a number of printf()s into debug() to get rid of the redundant
"DDR: " string like this:
DRAM: 256 MiB (DDR1, 64-bit, CL=2, ECC off)
Signed-off-by: Wolfgang Denk
Cc:
Hi Albert,
On 07/18/2011 02:39 PM, Albert ARIBAUD wrote:
> Hi Eric,
>
> Le 18/07/2011 04:52, Hong Xu a écrit :
> > Hi Reinhard,
> >
> > It's a pity to see that some of the AT91 boards are planed to be removed
> > by Wolfgang.
> >
> > Several weeks ago, the patches for SAM9261/9G10 have got A
The PHY driver was too verbose and corrupted the boot message display
like this:
...
Net: TSEC0 connected to Marvell 88ES
TSEC1 connected to Marvell 88ES
TSEC0, TSEC1
...
Turn printf() into debug() so we het the expected output again:
...
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