Dear Markus Hubig,
In message CAGws1Ttp+LsKa18DpmWz-Q4d94sEeM84rOJZ+9=ks_yngx0...@mail.gmail.com
you wrote:
Now I'm in the process of adapting this patch to the new u-boot. Up to now
I can compile a u-boot.bin and download it to the board. But after starting up
the new u-boot I just see this
Dear Joe Hershberger,
In message CANr=Z=yrww27x1zhdw4wqtdoy1vdaxy+rax1brbluluh5qh...@mail.gmail.com
you wrote:
It also breaks a number of ARM boards...
LOG/at91sam9263ek_norflash_boot.ERR:3:/home/joe/u-boot/include/config.h:5:0:
warning: CONFIG_SYS_BOARD redefined [enabled by default]
Dear Joe Hershberger,
In message CANr=Z=bEP2KPJhDKH68J4pi=2qEN_dT=esto5pcyehyxq2w...@mail.gmail.com
you wrote:
Hi Wolfgang,
Please pull a few bug fixes.
The following changes since commit 211e47549b668c7cdd8658c0413a272f0d0495d4:
Wolfgang Denk (1):
Prepare v2012.07-rc1
are
Dear Heiko Schocher,
In message 4ffd4d8f.7050...@denx.de you wrote:
Hello Wolfgang,
Sorry for the late pull request, but it seems my Pull request Email
got lost ... Sorry. A MAKEALL arm with ELDK-5.2 compiled fine.
The following changes since commit
Hello,
I resolved u-boot issues in u-boot level
but i am facing an issue in kernel level usb
detection can any suggest me to resolve this
issue.
manukumar
signal-networks
On Tue, 2012-07-10 at 04:17 +0200, Marek Vasut wrote:
Dear Manukumar,
hello
I checked with the hardware spec
in
Hi Scott and Stefano,
You will find below the newest patch for the NAND flash access problem on the
TX25 module.
I hope this version is fulfilling all your expectations.
Cordially,
Daniel
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 936186f..08fbb12 100644
---
Hi Scott and Stefano,
You will find below the newest patch for the NAND flash access problem on the
TX25 module.
I hope this version is fulfilling all your expectations.
Cordially,
Daniel
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 936186f..08fbb12 100644
---
Dear Joe Hershberger,
In message CANr=Z=bce0rtb_Lud=bhh_xxx4zbqmhmeaqpx_u_wpns4sz...@mail.gmail.com
you wrote:
The following changes since commit 211e47549b668c7cdd8658c0413a272f0d0495d4:
Wolfgang Denk (1):
Prepare v2012.07-rc1
are available in the git repository at:
Dear Joe Hershberger,
How is this patch's status?
(2012/07/04 17:25), Tetsuyuki Kobayashi wrote:
NFS_TIMEOUT is constant value defined in net/nfs.c. But sometimes it needs to
adjust.
This patch enables to override NFS_TIMEOUT by defining CONFIG_NFS_TIMEOUT in a
board specific config file.
On Mon Jul 09, 2012 at 10:52:43PM +0400, Mikhail Kshevetskiy wrote:
also fix NS16550_init() as we need 16x divider
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com
Acked-by: Christian Riesch christian.rie...@omicron.at
Tested-by: Christian Riesch christian.rie...@omicron.at
On Mon Jul 09, 2012 at 10:52:42PM +0400, Mikhail Kshevetskiy wrote:
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com
---
Change for v3:
* split DDR and UART bugfixes to separate patch series (series 1/3)
Change for v2:
* fix checkpatch warnings
---
Hi Thierry,
On Wed, Jul 11, 2012 at 7:48 AM, Thierry Reding
thierry.red...@avionic-design.de wrote:
On Wed, Jul 11, 2012 at 06:44:10AM +0200, Simon Glass wrote:
Hi Stephen,
On Fri, Jun 15, 2012 at 1:32 AM, Stephen Warren swar...@wwwdotorg.orgwrote:
On 06/13/2012 10:19 AM, Simon Glass
snip
I am missing how you want to pass driver configuration data(addresses,
settings) to the driver. I expect that this must be done out of device
drivers.
thats what platform_data is for, if i understand what you mean
That's my understanding too. But the point is how it is passed to the
On Thu, Jul 12, 2012 at 10:21:01AM +0200, Simon Glass wrote:
Hi Thierry,
On Wed, Jul 11, 2012 at 7:48 AM, Thierry Reding
thierry.red...@avionic-design.de wrote:
On Wed, Jul 11, 2012 at 06:44:10AM +0200, Simon Glass wrote:
Hi Stephen,
On Fri, Jun 15, 2012 at 1:32 AM, Stephen Warren
On Wed, Jul 11, 2012 at 07:08:50AM -0600, Gary Thomas wrote:
I just tried rev 211e47549b668c7cdd8658c0413a272f0d0495d4 (v2012.07-rc1)
for my PandaBoard. Sadly, this is failing when I try to use the onboard
ethernet (EHCI USB based) controller:
Sorry for the late response, at a conference.
Dear Markus Hubig,
On 11.07.2012 21:28, Markus Hubig wrote:
Hello @all,
as part of my bachelor thesis I'm working with the stamp9g20 / portuxg20
board from taskit (http://www.taskit.de/produkte/stamp9g20/index.htm). I
have a patch for a older version (2010.somewhat) of u-boot to get it
Dear Albert Aribaud,
On 09.07.2012 23:58, Albert ARIBAUD wrote:
Hi Andreas,
On Fri, 06 Jul 2012 12:25:00 +0200, Andreas Bießmann
andreas.de...@googlemail.com wrote:
Dear Yann Vernier,
On 06.07.2012 11:14, Yann Vernier wrote:
On Friday 06 July 2012 10:43:40 you wrote:
snip
Could I
On Thu, Jul 12, 2012 at 02:20:18AM -0700, Tom Rini wrote:
On Wed, Jul 11, 2012 at 07:08:50AM -0600, Gary Thomas wrote:
I just tried rev 211e47549b668c7cdd8658c0413a272f0d0495d4 (v2012.07-rc1)
for my PandaBoard. Sadly, this is failing when I try to use the onboard
ethernet (EHCI USB
On 10.07.2012 14:19, Greg Ungerer wrote:
On 07/10/2012 07:58 AM, Albert ARIBAUD wrote:
Hi Andreas,
On Fri, 06 Jul 2012 12:25:00 +0200, Andreas Bießmann
andreas.de...@googlemail.com wrote:
Dear Yann Vernier,
On 06.07.2012 11:14, Yann Vernier wrote:
On Friday 06 July 2012 10:43:40 you
Dear Albert Aribaud,
On 09.07.2012 16:20, Albert ARIBAUD wrote:
Hi Andreas,
On Mon, 09 Jul 2012 13:21:12 +0200, Andreas Bießmann
andreas.de...@googlemail.com wrote:
Dear Zhong Hongbo,
On 07.07.2012 15:19, Zhong Hongbo wrote:
On 07/07/2012 05:58 PM, Albert ARIBAUD wrote:
Hi Zhong Hongbo,
Hi
On Wednesday 11 of July 2012 11:52:13 Michal Simek wrote:
On 07/10/2012 03:12 PM, Marek Vasut wrote:
Dear Wolfgang Denk,
Dear Michal Simek,
In message4ffc1ef8.9060...@monstr.eu you wrote:
The hardest part I have identify on microblaze was about u-boot
variables. Because based
On Thu 12 Jul 2012 05:40:51 PM JST, Thierry Reding wrote:
Linux has a generic PWM backlight driver. This is currently solved by
using this in the DT:
backlight {
compatible = pwm-backlight;
pwms = pwm 0 500;
brightness-levels = 0 4 8
Dear Gachet Daniel,
In message 7605b15734f74b40a124aed46b25250a0102f...@hefrmbx01.sofr.hefr.lan
you wrote:
Hi Scott and Stefano,
You will find below the newest patch for the NAND flash access problem on the
TX25 module.
I hope this version is fulfilling all your expectations.
PHYs on SGMII riser card are used in SGMII mode with different external
IRQs from eTSEC. This means in SGMII mode phy-handle and phy-connection-type
under ethernet node should be updated. Otherwise the PHY interrupt can not
be handled therefor PHY link state change can not be auto detected.
For
Note that this patch works with new dts.
Please refer to:
http://patchwork.ozlabs.org/patch/170617/
-Hongtao.
-Original Message-
From: Jia Hongtao-B38951
Sent: Thursday, July 12, 2012 5:40 PM
To: u-boot@lists.denx.de
Cc: aflem...@gmail.com; sun york-R58495; Li Yang-R58472; Jia
On Wed, 11 Jul 2012 04:54:31 -0700
Tom Rini tr...@ti.com wrote:
On Tue, Jul 10, 2012 at 12:38:54PM +0200, Lukasz Majewski wrote:
Hi Tom,
On Wed, Jul 04, 2012 at 05:48:39PM +0200, Lukasz Majewski wrote:
Support for MMC storage devices to work with DFU framework.
On Thu, Jul 12, 2012 at 02:39:27PM +0200, Lukasz Majewski wrote:
On Wed, 11 Jul 2012 04:54:31 -0700
Tom Rini tr...@ti.com wrote:
On Tue, Jul 10, 2012 at 12:38:54PM +0200, Lukasz Majewski wrote:
Hi Tom,
On Wed, Jul 04, 2012 at 05:48:39PM +0200, Lukasz Majewski wrote:
Support
On 2012-07-12 03:30, Tom Rini wrote:
On Thu, Jul 12, 2012 at 02:20:18AM -0700, Tom Rini wrote:
On Wed, Jul 11, 2012 at 07:08:50AM -0600, Gary Thomas wrote:
I just tried rev 211e47549b668c7cdd8658c0413a272f0d0495d4 (v2012.07-rc1)
for my PandaBoard. Sadly, this is failing when I try to use the
Make sure that $(LDSCRIPT) is not empty before calling process_lds
with 'cat $(LDSCRIPT)' else cat will block waiting for input from
stdin.
Signed-off-by: Horst Kronstorfer hkron...@frequentis.com
---
dts/Makefile | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git
On Thu, Jul 12, 2012 at 07:06:02AM -0600, Gary Thomas wrote:
On 2012-07-12 03:30, Tom Rini wrote:
On Thu, Jul 12, 2012 at 02:20:18AM -0700, Tom Rini wrote:
On Wed, Jul 11, 2012 at 07:08:50AM -0600, Gary Thomas wrote:
I just tried rev 211e47549b668c7cdd8658c0413a272f0d0495d4 (v2012.07-rc1)
On 2012-07-12 07:15, Tom Rini wrote:
On Thu, Jul 12, 2012 at 07:06:02AM -0600, Gary Thomas wrote:
On 2012-07-12 03:30, Tom Rini wrote:
On Thu, Jul 12, 2012 at 02:20:18AM -0700, Tom Rini wrote:
On Wed, Jul 11, 2012 at 07:08:50AM -0600, Gary Thomas wrote:
I just tried rev
On Thu, Jul 12, 2012 at 07:17:59AM -0600, Gary Thomas wrote:
On 2012-07-12 07:15, Tom Rini wrote:
On Thu, Jul 12, 2012 at 07:06:02AM -0600, Gary Thomas wrote:
On 2012-07-12 03:30, Tom Rini wrote:
On Thu, Jul 12, 2012 at 02:20:18AM -0700, Tom Rini wrote:
On Wed, Jul 11, 2012 at 07:08:50AM
On 2012-07-12 07:20, Tom Rini wrote:
On Thu, Jul 12, 2012 at 07:17:59AM -0600, Gary Thomas wrote:
On 2012-07-12 07:15, Tom Rini wrote:
On Thu, Jul 12, 2012 at 07:06:02AM -0600, Gary Thomas wrote:
On 2012-07-12 03:30, Tom Rini wrote:
On Thu, Jul 12, 2012 at 02:20:18AM -0700, Tom Rini wrote:
On 2012-07-12 07:27, Gary Thomas wrote:
On 2012-07-12 07:20, Tom Rini wrote:
On Thu, Jul 12, 2012 at 07:17:59AM -0600, Gary Thomas wrote:
On 2012-07-12 07:15, Tom Rini wrote:
On Thu, Jul 12, 2012 at 07:06:02AM -0600, Gary Thomas wrote:
On 2012-07-12 03:30, Tom Rini wrote:
On Thu, Jul 12,
On 2012-07-02 03:42, Tetsuyuki Kobayashi wrote:
Recent compiler generates unaligned memory access in armv7 default.
But current U-Boot does not allow unaligned memory access, so it causes
data abort exception.
This patch add compile option -mno-unaligned-access if it is available.
This series adds support for the Tegra2x's display peripheral. This
supports the LCD display on Seaboard and we use this to enable console
output in U-Boot on the LCD.
Configuration is via the device tree. Proposed bindings are included
in this series, taken from pwm bindings that should be in
This makes it easier to include this header from other headers.
Signed-off-by: Simon Glass s...@chromium.org
---
include/fdtdec.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index fab577e..c30947a 100644
--- a/include/fdtdec.h
Add support for a default pin mapping for display1.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Use const where possible in funcmux
Changes in v3:
- Remove LPW1 pin which is not needed by display
arch/arm/cpu/armv7/tegra2/funcmux.c | 38
This binding will apparently soon be in linux-next. Bring it in now
since we need to do something, and may as well try to target what
Linux will have.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Add new commit for pwm binding and node
arch/arm/dts/tegra20.dtsi
These two functions don't actually modify their arguments so add a const
keyword.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add new patch to use const in pinmux_config_pingroup/table()
arch/arm/cpu/armv7/tegra2/pinmux.c|4 ++--
The new debugging shows the value of integers and addresses read
from the device tree and tidy up GPIO output.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Remove spurious newline from fdtdec_get_addr() debug output
- Tidy up fdtdec_decode_gpios() debug output
lib/fdtdec.c
The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled
by one of the PWMs.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Update seaboard LCD definitions for new fdt binding
Changes in v3:
- Use new upstream proposed LCD definitions
This provides an option for the LCD to flush the dcache after each update
(puts, scroll or clear).
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Put the LCD cache flush logic into lcd_putc() instead of lcd_puts()
Changes in v3:
- Put the LCD cache flush logic back into
Add support for selecting the required cache mode for the LCD:
off, write-through or write-back.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Handle a cached frame buffer out of normal U-Boot memory
drivers/video/tegra.c | 11 +++
1 files changed, 11
From: Wei Ni w...@nvidia.com
Add support for the LCD peripheral at the Tegra2 SOC level. A separate
LCD driver will use this functionality to configure the display.
Mayuresh Kulkarni:
- changes to remove bitfields and clean up for submission
Simon Glass:
- simplify code, move clock control into
Add calls to the LCD driver from Nvidia board code.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Add separate call to pwm_init() in board_init()
board/nvidia/common/board.c | 24 +++-
1 files changed, 23 insertions(+), 1 deletions(-)
diff --git
Add support for adjusting the cachability of an L1 section by updating
the MMU. The mmu_set_region_dcache() function allows drivers to make
these changes after the MMU is set up.
It is implemented only for ARMv7 at present.
This is needed for LCD support, where we want to make the LCD frame
Add LCD definitions and also a proposed binding for LCD displays.
The PWM is as per what will likely be committed to linux-next soon.
The displaymode binding comes from a proposal here:
http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html
The panel binding is new, and fills a
For tegra we want to enable the cache for the LCD. This is easier if
we can avoid using L2 page tages, so align the LCD to a section
boundary.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Align tegra display using new CONFIG_LCD_ALIGNMENT feature
From: Mayuresh Kulkarni mkulka...@nvidia.com
Enable the Seaboard's 16-bit LCD and use it as the console.
Signed-off-by: Mayuresh Kulkarni mkulka...@nvidia.com
Signed-off-by: Simon Glass s...@chromium.org
---
include/configs/seaboard.h | 11 +--
1 files changed, 9 insertions(+), 2
The pulse width/frequency modulation peripheral supports generating
a repeating pulse. It is useful for controlling LCD brightness.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Decode fdt node within the pwm driver
- Introduce concept of a pwm channel, rather than separate
This driver supports driving a single LCD and providing a U-Boot console
on it.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Update LCD driver to deal with new fdt bindings
Changes in v3:
- Adjust LCD driver to use new SOC display driver structures
- Move some fdt decode
When the cursor position gets to the end of the LCD console we normally
scroll by one line. This adds an option to increase that value.
Console scrolling is often slow, and if a large amount of output is
being sent, increasing this option to 10 or so will speed things up
considerably.
The normal alignment is PAGE_SIZE, but if this is defined, we can support
other alignments.
The motivation for this change is to make the display section-aligned on
ARM so that we can easily turn off data caching for the frame buffer region
without resorting to level 2 page tables.
Hi Tetsuyuki Kobayashi,
On Thu, Jul 12, 2012 at 2:30 AM, Tetsuyuki Kobayashi k...@kmckk.co.jp wrote:
Dear Joe Hershberger,
How is this patch's status?
Someone marked it as RFC in patchwork, so I lost track of it.
I'll apply it to next.
Thanks,
-Joe
On Thu, Jul 12, 2012 at 08:26:55AM -0600, Gary Thomas wrote:
On 2012-07-12 07:27, Gary Thomas wrote:
On 2012-07-12 07:20, Tom Rini wrote:
On Thu, Jul 12, 2012 at 07:17:59AM -0600, Gary Thomas wrote:
On 2012-07-12 07:15, Tom Rini wrote:
On Thu, Jul 12, 2012 at 07:06:02AM -0600, Gary Thomas
On Thu, Jul 12, 2012 at 11:16:00AM -0500, Joe Hershberger wrote:
Hi Tetsuyuki Kobayashi,
On Thu, Jul 12, 2012 at 2:30 AM, Tetsuyuki Kobayashi k...@kmckk.co.jp wrote:
Dear Joe Hershberger,
How is this patch's status?
Someone marked it as RFC in patchwork, so I lost track of it.
That
Hi Michal,
On Wed, Jul 11, 2012 at 6:21 AM, Michal Simek mon...@monstr.eu wrote:
On 07/11/2012 12:59 PM, Simon Glass wrote:
Hi,
On Wed, Jul 11, 2012 at 12:43 PM, Michal Simek mon...@monstr.eu
mailto:mon...@monstr.eu wrote:
On 07/11/2012 11:59 AM, Simon Glass wrote:
Hi
Hi Tom,
On Thu, Jul 12, 2012 at 11:30 AM, Tom Rini tr...@ti.com wrote:
On Thu, Jul 12, 2012 at 11:16:00AM -0500, Joe Hershberger wrote:
Hi Tetsuyuki Kobayashi,
On Thu, Jul 12, 2012 at 2:30 AM, Tetsuyuki Kobayashi k...@kmckk.co.jp
wrote:
Dear Joe Hershberger,
How is this patch's
On 2012-07-12 10:16, Tom Rini wrote:
On Thu, Jul 12, 2012 at 08:26:55AM -0600, Gary Thomas wrote:
On 2012-07-12 07:27, Gary Thomas wrote:
On 2012-07-12 07:20, Tom Rini wrote:
On Thu, Jul 12, 2012 at 07:17:59AM -0600, Gary Thomas wrote:
On 2012-07-12 07:15, Tom Rini wrote:
On Thu, Jul 12,
This erratum applies to the following SoCs:
P4080 rev 1.0, 2.0, fixed in rev 3.0
P2041 rev 1.0, 1.1, fixed in rev 2.0
P3041 rev 1.0, 1.1, fixed in rev 2.0.
Workaround for erratum NMG_CPU_A011 is now enabled by default. It can be
disabled by hwconfig with syntax:
fsl_cpu_a011:disable
Hi Simon,
On Thu, 12 Jul 2012 08:25:11 -0700, Simon Glass s...@chromium.org wrote:
Add support for adjusting the cachability of an L1 section by updating
the MMU. The mmu_set_region_dcache() function allows drivers to make
these changes after the MMU is set up.
It is implemented only for
Hi Peter,
On Tue, 10 Jul 2012 20:21:28 +0200 (CEST), Peter Meerwald pme...@pmeerw.net
wrote:
So, why? Are you doing custom builds for beagleboard, but with the dss
stuff removed? To try and make beagle an easier starting point for
custom hardware? Thanks!
I consider a CONFIG
On 07/12/2012 11:27 AM, Albert ARIBAUD wrote:
Hi Peter,
On Tue, 10 Jul 2012 20:21:28 +0200 (CEST), Peter Meerwald pme...@pmeerw.net
wrote:
So, why? Are you doing custom builds for beagleboard, but with the dss
stuff removed? To try and make beagle an easier starting point for
custom
Hi Graeme,
On Tue, 10 Jul 2012 10:57:39 +1000, Graeme Russ graeme.r...@gmail.com wrote:
Hi Allen
On Tue, Jul 10, 2012 at 10:45 AM, Allen Martin amar...@nvidia.com wrote:
On Sat, Jul 07, 2012 at 03:15:36AM -0700, Albert ARIBAUD wrote:
Hi Allen,
On Fri, 6 Jul 2012 16:17:19 -0700, Allen
Hi Zhong Hongbo,
On Sat, 7 Jul 2012 21:24:33 +0800, Zhong Hongbo bocui...@gmail.com wrote:
From: Zhong Hongbo bocui...@gmail.com
In currently, when __bss_start is equal to __bss_end__,
The bss loop will clear all the things in memory space.
But just only when __bss_end__ greater than
Hi Yann,
On Thu, 05 Jul 2012 17:19:00 +0200,
Andreas Bießmann andreas.de...@googlemail.com wrote:
Dear Yann Vernier,
On 05.07.2012 15:22, Yann Vernier wrote:
Changed CONFIG_SYS_TEXT_BASE to actual address (required for
board_init_f) and moved it into cm4008.h, along with a warning that
[adding u-boot list]
On 07/12/2012 01:52 AM, Mitch Bradley wrote:
On 7/8/2012 6:30 PM, Nicolas Pitre wrote:
On Fri, 6 Jul 2012, Mitch Bradley wrote:
On 7/6/2012 3:23 PM, David VomLehn (dvomlehn) wrote:
The kernel *must* go where it is linked, but the FDT contains only relative
references
On Thu, Jul 12, 2012 at 11:28:13AM +0200, Andreas Bießmann wrote:
On 11.07.2012 21:28, Markus Hubig wrote:
as part of my bachelor thesis I'm working with the stamp9g20 / portuxg20
board from taskit (http://www.taskit.de/produkte/stamp9g20/index.htm). I
have a patch for a older version
On Thu, Jul 12, 2012 at 08:07:17AM +0200, Wolfgang Denk wrote:
In message
CAGws1Ttp+LsKa18DpmWz-Q4d94sEeM84rOJZ+9=ks_yngx0...@mail.gmail.com you
wrote:
I include the old patch (portuxg20.patch) and the three patches I made in
this
email. My patches are based on u-boot v2012.04.01.
I've currently got a custom Freescale P2020 board that I'd like to
evaluate Das U-Boot on.
Is there a good guide to defining a configuration for a new board
somewhere? Most of what I see in the documentation assumes that you
are using an evaluation board that U-Boot has already been compiled
Hi Rob,
On Thu, 12 Jul 2012 15:34:17 -0500, Rob Herring robherri...@gmail.com wrote:
[adding u-boot list]
On 07/12/2012 01:52 AM, Mitch Bradley wrote:
On 7/8/2012 6:30 PM, Nicolas Pitre wrote:
On Fri, 6 Jul 2012, Mitch Bradley wrote:
On 7/6/2012 3:23 PM, David VomLehn (dvomlehn)
Hi Luciano,
On Thu, 12 Jul 2012 13:36:40 -0500, Luciano Moretti luciano.more...@gmail.com
wrote:
I've currently got a custom Freescale P2020 board that I'd like to
evaluate Das U-Boot on.
Is there a good guide to defining a configuration for a new board
somewhere? Most of what I see in
The NXID v1 EEPROM format has the CRC at offset 0xFC, but for some reason it
was placed at address 0xCC instead. To retain compatibility with existing
boards, we check the CRC in the old location if necessary.
Signed-off-by: Timur Tabi ti...@freescale.com
---
board/freescale/common/sys_eeprom.c
Dear Albert ARIBAUD,
In message 20120712233801.0411daa7@lilith you wrote:
If I'm not mistaken, yes U-Boot loads itself as high as it can, and I don't
know about the FDT, but no, U-Boot does not like to load initrd just
below that: it loads initrd where the boot commands tell it to, and the
Hi Joe, Tom,
(2012/07/13 1:40), Joe Hershberger wrote:
Hi Tom,
On Thu, Jul 12, 2012 at 11:30 AM, Tom Rini tr...@ti.com wrote:
On Thu, Jul 12, 2012 at 11:16:00AM -0500, Joe Hershberger wrote:
Hi Tetsuyuki Kobayashi,
On Thu, Jul 12, 2012 at 2:30 AM, Tetsuyuki Kobayashi k...@kmckk.co.jp wrote:
Timur,
That patch itself is OK. But the comment is incorrect. We keep adding more mac
addresses to this data structure. The CRC was at the end. The offset 0xCC was
correct.
York
On Jul 12, 2012, at 2:46 PM, Timur Tabi wrote:
The NXID v1 EEPROM format has the CRC at offset 0xFC, but for
On 07/12/2012 05:03 PM, sun york-R58495 wrote:
Timur,
That patch itself is OK. But the comment is incorrect. We keep adding more
mac addresses to this data structure. The CRC was at the end. The offset 0xCC
was correct.
Is there anything in the data structure to indicate that this growth
Scott Wood wrote:
That patch itself is OK. But the comment is incorrect. We keep adding more
mac addresses to this data structure. The CRC was at the end. The offset
0xCC was correct.
Is there anything in the data structure to indicate that this growth has
happened?
The version number
On 07/12/2012 05:46 PM, sun york-R58495 wrote:
On Jul 12, 2012, at 3:37 PM, Scott Wood wrote:
On 07/12/2012 05:03 PM, sun york-R58495 wrote:
Timur,
That patch itself is OK. But the comment is incorrect. We keep adding more
mac addresses to this data structure. The CRC was at the end.
Scott Wood wrote:
If the 0xCC version is already in real use, then this change should bump
the version number.
I can't, because I don't control the spec. Like I said, it was just wrong
before. No one has more than 23 MAC addresses anyway.
My patch provides transparent updates to handle it.
On Jul 12, 2012, at 3:37 PM, Scott Wood wrote:
On 07/12/2012 05:03 PM, sun york-R58495 wrote:
Timur,
That patch itself is OK. But the comment is incorrect. We keep adding more
mac addresses to this data structure. The CRC was at the end. The offset
0xCC was correct.
Is there anything
Dear Markus Hubig,
On 12.07.12 17:49, Markus Hubig wrote:
On Thu, Jul 12, 2012 at 11:28:13AM +0200, Andreas Bießmann wrote:
On 11.07.2012 21:28, Markus Hubig wrote:
as part of my bachelor thesis I'm working with the stamp9g20 / portuxg20
board from taskit
On 07/12/2012 04:47 PM, Wolfgang Denk wrote:
Dear Albert ARIBAUD,
In message 20120712233801.0411daa7@lilith you wrote:
If I'm not mistaken, yes U-Boot loads itself as high as it can, and I don't
know about the FDT, but no, U-Boot does not like to load initrd just
below that: it loads
Dear York,
In message 9f5356fb-8ca2-44de-9089-64abd82ca...@freescale.com you wrote:
That patch itself is OK. But the comment is incorrect. We keep
adding more mac addresses to this data structure. The CRC was at the
end. The offset 0xCC was correct.
This is a totally broken design then,
Dear Timur Tabi,
In message 4fff5524.2080...@freescale.com you wrote:
My patch provides transparent updates to handle it. It will read broken
EEPROMs and verify the CRC in the old location, and if you have re-save
the EEPROM, it will put the CRC in the right place.
It will work by chance,
On Jul 12, 2012, at 9:30 PM, Wolfgang Denk wrote:
Dear York,
In message 9f5356fb-8ca2-44de-9089-64abd82ca...@freescale.com you wrote:
That patch itself is OK. But the comment is incorrect. We keep
adding more mac addresses to this data structure. The CRC was at the
end. The offset 0xCC
Hi All,
Iam using smdkv310 board of SAMSUNG EXYNOS SOC. How bl1.bin file copy the
uboot.bin file from SD/MMC card to DDR2 RAM.
by using the following device copy functions
#define SDMMC_ReadBlocks_eMMC_ByCPU(uNumOfBlks, uDstAddr) \
(((void(*)(u32, u32*))(*((u32
Hi Joe,
snip
This is generic gpio cleanup but I don't think this is the same thing.
I think you should get some warnings for fdtdec compilation around
missing gpio_request
declaration or you include gpio.h in any other header file which is in
fdtdec.c/h.
Sorry I don't really
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