On 15 December 2014 at 19:21, Bin Meng bmeng...@gmail.com wrote:
Hi Jagan,
On Thu, Dec 11, 2014 at 3:40 PM, Bin Meng bmeng...@gmail.com wrote:
Hi Jagan,
On Thu, Dec 11, 2014 at 3:26 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Bin,
On 11 December 2014 at 08:34, Bin Meng
Hi Jagan,
On Wed, Dec 17, 2014 at 3:59 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
On 15 December 2014 at 19:21, Bin Meng bmeng...@gmail.com wrote:
Hi Jagan,
On Thu, Dec 11, 2014 at 3:40 PM, Bin Meng bmeng...@gmail.com wrote:
Hi Jagan,
On Thu, Dec 11, 2014 at 3:26 PM, Jagan Teki
Hi,
On Wed, Dec 17, 2014 at 3:50 PM, Bin Meng bmeng...@gmail.com wrote:
From: Simon Glass s...@chromium.org
To avoid having two microcode formats, adjust the build system to support
obtaining the microcode from the device tree, even in the case where it
must be made available before the
Hi Simon,
On Wed, Dec 17, 2014 at 10:49 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 16 December 2014 at 03:01, Bin Meng bmeng...@gmail.com wrote:
On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass s...@chromium.org wrote:
To avoid having two microcode formats, adjust the build system to
Hi Pavel,
On Tue, Dec 16, 2014 at 6:34 AM, Pavel Machek pa...@denx.de wrote:
Hi!
+Status
+--
+U-Boot supports running as a coreboot [1] payload on x86. So far only link
+(Chromebook pixel) has been tested, but it should work with minimal
adjustments
Link is codeword for Chromebook
Hi Pavel,
On Tue, Dec 16, 2014 at 6:34 AM, Pavel Machek pa...@denx.de wrote:
Hi!
+static char *hob_type[] = {
+ reserved,
+ Hand-off,
+ Memory Allocation,
+ Resource Descriptor,
+ GUID Extension,
+ Firmware Volumn,
volume? ?
+int do_hob(cmd_tbl_t *cmdtp, int
Add serdes protocol 0x40 and 0x5f.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
v2: fix a typo.
arch/powerpc/cpu/mpc85xx/t1024_serdes.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c
b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c
index
Add missing T1024QDS_defconfig for NOR boot on T1024QDS.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
configs/T1024QDS_defconfig | 4
1 file changed, 4 insertions(+)
create mode 100644 configs/T1024QDS_defconfig
diff --git a/configs/T1024QDS_defconfig
On 17 December 2014 at 13:32, Bin Meng bmeng...@gmail.com wrote:
Hi Jagan,
On Wed, Dec 17, 2014 at 3:59 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
On 15 December 2014 at 19:21, Bin Meng bmeng...@gmail.com wrote:
Hi Jagan,
On Thu, Dec 11, 2014 at 3:40 PM, Bin Meng bmeng...@gmail.com
Hello Simon,
On 12/16/2014 09:41 PM, Simon Glass wrote:
Hi Przemyslaw,
On 12 December 2014 at 08:54, Przemyslaw Marczak p.marc...@samsung.com wrote:
Hello,
On 12/12/2014 04:52 PM, Przemyslaw Marczak wrote:
-
mktest_files: script for
Hello,
On 12/16/2014 11:26 PM, Simon Glass wrote:
Hi Przemyslaw,
On 12 December 2014 at 08:30, Przemyslaw Marczak p.marc...@samsung.com wrote:
Hello,
On 12/12/2014 01:32 AM, Simon Glass wrote:
Hi Przemyslaw,
On 11 December 2014 at 05:01, Przemyslaw Marczak p.marc...@samsung.com
wrote:
Hello,
On 12/16/2014 11:26 PM, Simon Glass wrote:
Hi Przemyslaw,
On 12 December 2014 at 08:30, Przemyslaw Marczak p.marc...@samsung.com wrote:
Hello,
On 12/12/2014 01:32 AM, Simon Glass wrote:
Hi Przemyslaw,
On 11 December 2014 at 05:01, Przemyslaw Marczak p.marc...@samsung.com
wrote:
T1024RDB-PB board adds 2.5G SGMII support with AQR105 PHY.
rcw_0x095 is used for 10G XFI + 3x PCIex1
rcw_0x135 is used for 2.5G SGMII + 2x PCIex1
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
based on u-boot-fsl-qoriq.git, master branch
board/freescale/t102xrdb/cpld.h |
Public exponentiation which is required in rsa verify
functionality is currently tightly integrated with
verification code in rsa_verify.c. Currently this
implementation is software based. Some platforms
having support of the exponentiation in hardware.
To enable the rsa verify functionality to
Currently the hash functions used in RSA are called
directly from the sha1 and sha256 libraries.
Change the RSA checksum library to use the progressive
hash API's registered with struct hash_algo. This will
allow the checksum library to use the support of hardware
accelerated progressive hash
Hi Gerald,
Last pull-req for mmc was last Friday, I intend to issue another this Friday
too.
Regards
— Pantelis
On Dec 17, 2014, at 11:22 , drEagle drea...@doukki.net wrote:
Hi,
Any chance to be included in the next release of u-boot ?
Regards,
Gérald
Le 15/12/2014 12:14, Mario
The rsa-verify functionality is a two step operation involving:
1. Checksum (hash) Calculation over image regions
2. Public Key Modular exponentiation over signature to generate hash
The following patch set modifies the rsa library to use hw
acceleration if available in platform.
The first two
Support added for offloading Modular Exponentiation required
in RSA Verify functionality to hardware which depends on
CONFIG_RSA_MOD_EXP_HW.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
CC: Simon Glass s...@chromium.org
---
drivers/crypto/fsl/Makefile | 1 +
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
CC: Simon Glass s...@chromium.org
---
common/hash.c | 35 ++-
include/hash.h | 15 +++
2 files changed, 41 insertions(+), 9 deletions(-)
diff --git a/common/hash.c b/common/hash.c
index
Is there a reason you can't implement write_hwaddr() so that it will
behave like other NICs (u-boot is the highest priority source of the
MAC address).
The AX88179 uses an external flash to store the MAC address. So for my
application I do not want the user to be able to change it,
Hi,
On 17-12-14 03:22, Chen-Yu Tsai wrote:
Hi,
On Wed, Dec 17, 2014 at 4:31 AM, Hans de Goede hdego...@redhat.com wrote:
sun8i (A23) introduces a new bus for communicating with the pmic, the rsb,
the rsb is also used to communicate with the pmic on the A80, and is
documented in the A80 user
-Original Message-
From: Gérald Kerma [mailto:drea...@doukki.net]
Sent: 17 December 2014 19:33
To: u-boot@lists.denx.de; Prafulla Wadaskar
Cc: albert.u.b...@aribaud.net; l...@openwrt.org; Gérald
Kerma
Subject: [PATCH v3 0/6] SHEEVAPLUG : REFRESH 201412
Prepare ENV settings for
Hi Pavel,
On 15 December 2014 at 15:34, Pavel Machek pa...@denx.de wrote:
Hi!
+Status
+--
+U-Boot supports running as a coreboot [1] payload on x86. So far only link
+(Chromebook pixel) has been tested, but it should work with minimal
adjustments
Link is codeword for Chromebook
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
Integrate the processor microcode version 1.05 for Tunnel Creek,
CPUID device 20661h.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
Changes in v4:
- Switch to use dtsi format microcode
Changes in v3: None
Changes in v2:
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
This is the follow-on patch to clean up the FSP support codes:
- Remove the _t suffix on the structures defines
- Use __packed for structure defines
- Use U-Boot's assert()
- Use standard bool true/false
- Remove
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
Implement minimum required functions for the basic support to
queensbay platform and crownbay board.
Currently the implementation is to call fsp_init() in the car_init().
We may move that call to cpu_init_f() in the future.
On 17 December 2014 at 07:40, Simon Glass s...@chromium.org wrote:
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
Integrate the processor microcode version 1.05 for Tunnel Creek,
CPUID device 20661h.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
Changes in v4:
- Switch
On 17 December 2014 at 07:41, Simon Glass s...@chromium.org wrote:
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
Implement minimum required functions for the basic support to
queensbay platform and crownbay board.
Currently the implementation is to call fsp_init() in the
On 17 December 2014 at 01:05, Bin Meng bmeng...@gmail.com wrote:
Hi,
On Wed, Dec 17, 2014 at 3:50 PM, Bin Meng bmeng...@gmail.com wrote:
From: Simon Glass s...@chromium.org
To avoid having two microcode formats, adjust the build system to support
obtaining the microcode from the device
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
Intel Tunnel Creek GPIO register block is compatible with current
ich6-gpio driver, except the offset and content of GPIO block base
address register in the LPC PCI configuration space are different.
Use u16 instead of u32 to
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Fix several typos in queensbay/Kconfig
- Change FSP_FILE and CMC_FILE
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
configs/crownbay_defconfig | 6 ++
include/configs/crownbay.h | 52
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/x86/cpu/Makefile | 1 +
1 file changed, 1 insertion(+)
Applied to
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Update ifdtool flags to indicate FSP and CMC files are in
the board directory
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- New patch to use consistent name XXX_ADDR for binary blobs
Makefile
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
The Crown Bay board has an SST25VF016B flash connected to the Tunnel
Creek processor SPI controller used as the BIOS media where U-Boot
is stored. Enable this flash support.
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by:
On 17 December 2014 at 07:41, Simon Glass s...@chromium.org wrote:
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
This is the follow-on patch to clean up the FSP support codes:
- Remove the _t suffix on the structures defines
- Use __packed for structure defines
- Use
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
There are two standard SD card slots on the Crown Bay board, which
are connected to the Topcliff PCH SDIO controllers. Enable the SDHC
support so that we can use them.
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
We don't have driver for the Intel Topcliff PCH Gigabit Ethernet
controller for now, so enable the Intle E1000 NIC support, which
can be plugged into any PCIe slot on the Crown Bay board.
Signed-off-by: Bin Meng
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- New patch to rename coreboot-serial to x86-serial
arch/x86/dts/coreboot.dtsi
On 17 December 2014 at 00:50, Bin Meng bmeng...@gmail.com wrote:
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in v4:
- Minor update per review comments from Pavel Machek
Changes in v3: None
Changes in v2:
- Remove the 'make menuconfig'
On Wed, Dec 17, 2014 at 02:04:32AM +0100, Marek Vasut wrote:
On Wednesday, December 17, 2014 at 12:56:46 AM, Tom Rini wrote:
On Tue, Dec 16, 2014 at 02:56:44PM -0600, mgerlach wrote:
Hello Masahiro Yamada,
Even the with this patch, we encountered a false error of generic board
Hi Tom,
Following the experiment that yielded the following results:
U-Boot time sf read ${loadaddr} 0x20 ${loadsize}
I get the following back:
SF: 2541352 bytes @ 0x20 Read: OK
time: 2.447 seconds
I have done some reading and poking around and have added the
On 16 December 2014 at 17:03, Nobuhiro Iwamatsu
nobuhiro.iwamatsu...@renesas.com wrote:
This adds driver model support with this driver. This was tested by Koelsch
board and Gose board.
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
V3: Add function of checking
On Wed, Dec 17, 2014 at 6:33 AM, René Griessl
rgrie...@cit-ec.uni-bielefeld.de wrote:
Is there a reason you can't implement write_hwaddr() so that it will
behave like other NICs (u-boot is the highest priority source of the MAC
address).
The AX88179 uses an external flash to store the MAC
On Fri, Nov 7, 2014 at 9:53 AM, Rene Griessl
rgrie...@cit-ec.uni-bielefeld.de wrote:
This patch adds driver support for the ASIX AX88179 USB3.0 to GbE network
adapter.
Driver has been tested on the RECS5250 COM module (similar to ARDALE5250).
Testcase was DHCP and PXE boot.
Signed-off-by:
Hi Andrew,
On 11/05/2014 08:31 PM, Andrew Ruder wrote:
The UBI layer will disable much of its error reporting when it is
compiled into the linux kernel to avoid stopping boot. We want this
error reporting in U-Boot since we don't initialize the UBI layer until
it is used and want the error
On Wed, Dec 17, 2014 at 04:27:37PM -, Andy Pont wrote:
Hi Tom,
Following the experiment that yielded the following results:
U-Boot time sf read ${loadaddr} 0x20 ${loadsize}
I get the following back:
SF: 2541352 bytes @ 0x20 Read: OK
time: 2.447 seconds
I have
Hi Ruchika,
On 17 December 2014 at 03:05, Ruchika Gupta ruchika.gu...@freescale.com wrote:
Public exponentiation which is required in rsa verify
functionality is currently tightly integrated with
verification code in rsa_verify.c. Currently this
implementation is software based. Some
Hi Ruchika,
On 17 December 2014 at 03:05, Ruchika Gupta ruchika.gu...@freescale.com wrote:
Support added for offloading Modular Exponentiation required
in RSA Verify functionality to hardware which depends on
CONFIG_RSA_MOD_EXP_HW.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
Hi,
On 17 December 2014 at 03:05, Ruchika Gupta ruchika.gu...@freescale.com wrote:
Currently the hash functions used in RSA are called
directly from the sha1 and sha256 libraries.
Change the RSA checksum library to use the progressive
hash API's registered with struct hash_algo. This will
Hi,
On 17 December 2014 at 03:05, Ruchika Gupta ruchika.gu...@freescale.com wrote:
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
CC: Simon Glass s...@chromium.org
---
common/hash.c | 35 ++-
include/hash.h | 15 +++
2 files changed,
On Wednesday, December 17, 2014 at 01:33:57 PM, René Griessl wrote:
Is there a reason you can't implement write_hwaddr() so that it will
behave like other NICs (u-boot is the highest priority source of the
MAC address).
The AX88179 uses an external flash to store the MAC address. So for
On 10/21/2014 04:36 AM, Ramneek Mehresh wrote:
Add USB XHCI support for ls1021aqds platform and
making this as default mode
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
---
include/configs/ls1021aqds.h | 21 -
1 file changed, 16 insertions(+), 5
On 10/21/2014 04:36 AM, Ramneek Mehresh wrote:
Add USB EHCI/XHCI support for ls1021atwr platform and
making xHCI as default mode
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
---
include/configs/ls1021atwr.h | 28
1 file changed, 28
A new deep sleep interface is introduced to support generic
board structure. Converts it to use new interface.
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
board/freescale/t102xqds/ddr.c | 19 +++
board/freescale/t102xqds/t102xqds.c | 23
A new deep sleep interface is introduced to support generic
board structure. Converts it to use new interface.
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
board/freescale/t1040qds/ddr.c | 19 +++
board/freescale/t1040qds/t1040qds.c | 23
All the boards that support deep sleep feature are converted
to deep sleep generic board interface. The old interface which
support non-generic board is not used anymore. So clean it up.
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 10
On 12/17/2014 06:26 PM, Tang Yuantian wrote:
All the boards that support deep sleep feature are converted
to deep sleep generic board interface. The old interface which
support non-generic board is not used anymore. So clean it up.
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
Hello York,
The following 3 patches, which are independent to each other, should be applied
first before this one get applied.
You can apply these 4 patches in the order I sent them.
1. mpc85xx/t102xrdb: convert deep sleep to generic board interface
http://patchwork.ozlabs.org/patch/422189/
2.
Hello York,
This patch's dependent patch is merged into mainline. So there is no dependency
for this patch anymore.
Thanks,
Yuantian
-Original Message-
From: Tang Yuantian [mailto:yuantian.t...@freescale.com]
Sent: Wednesday, December 17, 2014 12:58 PM
To:
On 12/17/2014 06:43 PM, Tang Yuantian-B29983 wrote:
Hello York,
The following 3 patches, which are independent to each other, should be
applied first before this one get applied.
You can apply these 4 patches in the order I sent them.
1. mpc85xx/t102xrdb: convert deep sleep to generic
Hi Przemyslaw,
On 17 December 2014 at 02:03, Przemyslaw Marczak p.marc...@samsung.com wrote:
Hello,
On 12/16/2014 11:26 PM, Simon Glass wrote:
Hi Przemyslaw,
On 12 December 2014 at 08:30, Przemyslaw Marczak p.marc...@samsung.com
wrote:
Hello,
On 12/12/2014 01:32 AM, Simon Glass
Hi,
On 16 December 2014 at 01:03, Sjoerd Simons
sjoerd.sim...@collabora.co.uk wrote:
On Mon, 2014-12-15 at 23:34 +0100, Pavel Machek wrote:
On Thu 2014-11-27 16:34:08, Sjoerd Simons wrote:
The ChromeOS EC keyboard is used by various different chromebooks. Peach
pi being the third board in
Hi Marek,
On Wed, Dec 17, 2014 at 10:00 AM, Marek Vasut ma...@denx.de wrote:
On Wednesday, December 17, 2014 at 01:33:57 PM, René Griessl wrote:
Is there a reason you can't implement write_hwaddr() so that it will
behave like other NICs (u-boot is the highest priority source of the
MAC
On 17 December 2014 at 06:44, Peter Howard p...@northern-ridge.com.au wrote:
Add defines to use CONFIG_SYS_GENERIC_BOARD and CONFIG_OF_LIBFDT.
Semi-separate to this: the size of the image for the da850evm has
increased to the point that the size in da850evm.h and the offset for
the environment
On 12 December 2014 at 18:35, Bin Meng bmeng...@gmail.com wrote:
The Crown Bay board has an SST25VF016B flash connected to the Tunnel
Creek processor SPI controller used as the BIOS media where U-Boot
is stored. Enable this flash support.
Is this necessary to enable flash at BIOS media?
How
Hi Tom,
On Wed, 10 Dec 2014 20:34:03 -0500
Tom Rini tr...@ti.com wrote:
On Thu, Dec 11, 2014 at 10:01:38AM +0900, Masahiro Yamada wrote:
If CONFIG_SPL_NOR_SUPPORT is defined, spl_nor_load_image() requires
spl_start_uboot(), CONFIG_SYS_OS_BASE, CONFIG_SYS_SPL_ARGS_ADDR,
Hi Jagan,
On Thu, Dec 18, 2014 at 3:06 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
On 12 December 2014 at 18:35, Bin Meng bmeng...@gmail.com wrote:
The Crown Bay board has an SST25VF016B flash connected to the Tunnel
Creek processor SPI controller used as the BIOS media where U-Boot
is
On 18 December 2014 at 12:48, Bin Meng bmeng...@gmail.com wrote:
Hi Jagan,
On Thu, Dec 18, 2014 at 3:06 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
On 12 December 2014 at 18:35, Bin Meng bmeng...@gmail.com wrote:
The Crown Bay board has an SST25VF016B flash connected to the Tunnel
Creek
Hi,
Any chance to be included in the next release of u-boot ?
Regards,
Gérald
Le 15/12/2014 12:14, Mario Schuknecht a écrit :
2014-12-13 21:35 GMT+01:00 Gérald Kerma drea...@doukki.net
mailto:drea...@doukki.net:
This serie of patches speed up access time of MVEBUMMC driver
Signed-off-by: Gérald Kerma drea...@doukki.net
---
include/configs/sheevaplug.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index 393fdd4..589655a 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@
Signed-off-by: Gérald Kerma drea...@doukki.net
---
include/configs/sheevaplug.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index 589655a..77e8d17 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@
Prepare ENV settings for sheevaplugs to be OpenWRT ready.
+--+
| UBOOT| 896 Kb (7x128) = uboot
+--+
| ENV | 128 Kb = uboot_env
+--+
| ROOT(FS) | 511 Mb @ 1 Mb = root - rootfs (ubifs)
LIBFDT feature is required to support new kernel
Signed-off-by: Gérald Kerma drea...@doukki.net
---
include/configs/sheevaplug.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index 77e8d17..0f523c5 100644
---
Prepare ENV settings for sheevaplugs to be OpenWRT ready.
+--+
| UBOOT| 896 Kb (7x128) = uboot
+--+
| ENV | 128 Kb = uboot_env
+--+
| ROOT(FS) | 511 Mb @ 1 Mb = root - rootfs (ubifs)
Signed-off-by: Gérald Kerma drea...@doukki.net
---
include/configs/sheevaplug.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index 829c57a..393fdd4 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@
Signed-off-by: Gérald Kerma drea...@doukki.net
---
include/configs/sheevaplug.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index 71be823..829c57a 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@
Le 17/12/2014 15:24, Prafulla Wadaskar a écrit :
-Original Message-
From: Gérald Kerma [mailto:drea...@doukki.net]
Sent: 17 December 2014 19:33
To: u-boot@lists.denx.de; Prafulla Wadaskar
Cc: albert.u.b...@aribaud.net; l...@openwrt.org; Gérald
Kerma
Subject: [PATCH v3 0/6]
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