On Thu, Feb 12, 2015 at 08:13:40PM +0100, Marco Cavallini wrote:
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For some long time, yes, you must be subscribed and certain emails
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Hi,
On a custom i.MX28 board I am using u-boot-2015.01.
The debug port DUART is not the same as i.MX28, so I changed these
settings in iomux.c:
const iomux_cfg_t iomux_setup[] = {
/* DUART */
// MX28_PAD_PWM0__DUART_RX,
// MX28_PAD_PWM1__DUART_TX,
/* DUART */
/* Unconfigure BOOT ROM
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2:
- move boot image generation to mkimage framework
common/image.c | 1 +
include/image.h | 1 +
scripts/Makefile.spl | 9 +++
tools/Makefile | 1 +
tools/lpc32xximage.c | 178
This series extends functionality for the LPC32xx platform and
introduces the WORK Microwave work_92105 board which makes use
of the extended functionality.
NOTES:
The series is not entirely checkpatch-clean. The following warnings
and checks were not fixed:
1. warning: arch/arm/Kconfig,241:
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This patch adds generic board support for MCF547X/8X and MCF5445X.
It is based on the patch about common generic board support for
M68K architecture sent by Angelo.
Signed-off-by: Alison Wang alison.w...@freescale.com
---
common/board_f.c | 8
common/board_r.c |
Based on Tom's announce mail
(http://lists.denx.de/pipermail/u-boot/2015-February/203606.html),
let's start removing non-generic ARM boards.
No conversion patches have been posted for these boards.
Changes in v3:
- Do not remove devkit3250 because Vladimir has post a patch
to convert it
This is still a non-generic board.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Chan-Taek Park c-p...@ti.com
---
Changes in v3: None
Changes in v2: None
arch/arm/Kconfig | 5 -
arch/arm/cpu/arm1176/Makefile | 1 -
Hi,
I'm doing some work with U-Boot SPL, and noticed the following code in the
spl_parse_image_header function (common/spl/spl.c):
if (image_get_magic(header) == IH_MAGIC) {
if (spl_image.flags SPL_COPY_PAYLOAD_ONLY) {
...
} else {
These are still non-generic boards.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Greg Ungerer greg.unge...@opengear.com
---
Changes in v3: None
Changes in v2: None
arch/arm/Kconfig| 10 -
arch/arm/cpu/arm920t/Makefile | 1 -
Hi Simon,
great to hear! Currently I'm a little bit busy (bringing up of a E3800
board arriving yesterday from production), but as soon as possible
I'll give it a try!
Thank you very much for your work!
Best Regards,
Martin
-Ursprüngliche Nachricht-
Von: elinux-MinnowBoard
Hi Peng,
On 12/02/2015 02:36, Peng Fan wrote:
This patch set is extracted from the previous imx:mx6 add ldo bypass
patch set, with only one return value change.
patch 1/3 is add pad settings for I2C1
patch 2/3 is add I2C and PMIC support in board header file
patch 3/3 is to add pmic
On 11 February 2015 at 21:48, Nobuhiro Iwamatsu
nobuhiro.iwamatsu...@renesas.com wrote:
This adds driver model support with this driver. This was tested by Koelsch
board and Gose board.
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
V5: Fix build with SH7723 and
On Thursday, February 12, 2015 at 09:29:47 PM, Pavel Machek wrote:
Hi!
I think we can improve this later. In the end, the structure should be
either the way DTs are structured in kernel OR we should have just one
single config for all SoCFPGA boards. The later is of course preferred.
On 10 February 2015 at 17:37, Simon Glass s...@chromium.org wrote:
On 9 February 2015 at 23:46, Peng Fan peng@freescale.com wrote:
Add a new entry in platdata structure and intialize
bank_index in mxc_plat array.
This new entry can avoid using `plat - mxc_plat` by using
`plat-bank_index`.
On 10 February 2015 at 17:37, Simon Glass s...@chromium.org wrote:
On 10 February 2015 at 00:46, Igor Grinberg grinb...@compulab.co.il wrote:
On 02/10/15 08:46, Peng Fan wrote:
This patch add DT support for mxc gpio driver.
There are one place using CONFIG_OF_CONTROL macro.
1. The
On 11 February 2015 at 16:33, Simon Glass s...@chromium.org wrote:
These are now in Kconfig so we can drop them from the header file.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
include/config_defaults.h | 12
1 file changed, 12
On 10 February 2015 at 02:55, Michal Simek michal.si...@xilinx.com wrote:
On 02/09/2015 11:14 PM, Simon Glass wrote:
Hi MIchal,
On 9 February 2015 at 03:27, Michal Simek michal.si...@xilinx.com wrote:
Hi Simon,
On 02/06/2015 06:45 AM, Simon Glass wrote:
With a heavy heart:
Hello,
I am working on adding support for the Olimex A20-SOM-EVB development
board to mainline u-boot (and to the mainline Linux kernel, but that is
a topic for a different thread). The board package actually consists
of two parts, the A20-SOM-EVB baseboard providing I/O and power supply,
and
Hi!
I think we can improve this later. In the end, the structure should be either
the way DTs are structured in kernel OR we should have just one single config
for all SoCFPGA boards. The later is of course preferred.
For now, I'm tempted to apply this as-is so we at least have the
On 12 February 2015 at 15:14, Simon Glass s...@chromium.org wrote:
On 11 February 2015 at 21:48, Nobuhiro Iwamatsu
nobuhiro.iwamatsu...@renesas.com wrote:
This adds driver model support with this driver. This was tested by Koelsch
board and Gose board.
Signed-off-by: Nobuhiro Iwamatsu
On 12 February 2015 at 02:14, Andreas Bießmann
andreas.de...@googlemail.com wrote:
On 02/12/2015 12:32 AM, Simon Glass wrote:
With driver model the number of PIO ports is defined by platform data, so
remove it from the header file.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by:
On 11 February 2015 at 16:32, Simon Glass s...@chromium.org wrote:
Remove driver model CONFIGs from the board config headers and use Kconfig
instead.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Split out the ATMEL_PIO_PORTS change into its own patch
Changes in v2:
On 10 February 2015 at 17:37, Simon Glass s...@chromium.org wrote:
On 9 February 2015 at 23:46, Peng Fan peng@freescale.com wrote:
Abstracting dev_get_addr can improve drivers that want to
get device's address.
Signed-off-by: Peng Fan peng@freescale.com
Acked-by: Igor Grinberg
On 11 February 2015 at 16:32, Simon Glass s...@chromium.org wrote:
Move this option to Kconfig and update all boards.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Add CONFIG_SYS_MALLOC_F as well as CONFIG_SYS_MALLOC_F_LEN
Applied to u-boot-dm.
On Wed, Feb 11, 2015 at 7:47 AM, Tim Harvey thar...@gateworks.com wrote:
On Wed, Feb 11, 2015 at 2:49 AM, Robin Gong b38...@freescale.com wrote:
snip
This is very board dependent. Here you are referring to a board that
has a reset input to the PMIC's from the IMX6's watchdog output. In
this
Hello Simon,
On 11-02-15 02:52, Simon Glass wrote:
An option is provided to avoid using SDL in U-Boot sandbox (and drop
support for the LCD). However the check in the Makefile is too late
and warnings are printed even if NO_SDL=y is given.
Adjust the order to avoid this warning.
Hi, Albert and Tom
On 2/4/2015 7:02 PM, Marc Zyngier wrote:
On 04/02/15 10:15, Peng Fan wrote:
If CONFIG_ARMV7_PSCI is not defined and CONFIG_ARMV7_SECURE_BASE is defined,
smp_kicl_all_cpus may enable secondary cores and runs into secure_ram_addr(
_smp_pen), before code is relocated to secure
Hi Steve,
On 11 February 2015 at 05:25, Steve Rae s...@broadcom.com wrote:
Hi, Dileep
On 15-02-10 12:49 AM, Dileep Katta wrote:
Adds the fastboot erase functionality, to erase a partition
specified by name. The erase is performed based on erase group size,
to avoid erasing other
Currently only normal hashing is supported using hardware acceleration.
Added support for progressive hashing using hardware.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
Signed-off-by: Gaurav Rana gaurav.r...@freescale.com
CC: Simon Glass s...@chromium.org
---
Changes in v4:
Add
This patch does the following:
1. The function names for encapsulation and decapsulation
were inconsistent in freescale's implementation and cmd_blob file.
This patch corrects the issue.
2. The function prototype is also modified to change the length parameter
from u8 to u32 to allow
Currently only normal hashing is supported using hardware acceleration.
Added support for progressive hashing using hardware.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
Signed-off-by: Gaurav Rana gaurav.r...@freescale.com
CC: Simon Glass s...@chromium.org
---
Changes in v5:
Modify
Hi Rob,
On 12 February 2015 at 14:35, Rob Herring robherri...@gmail.com wrote:
On Tue, Feb 10, 2015 at 2:49 AM, Dileep Katta dileep.ka...@linaro.org wrote:
Adds the fastboot erase functionality, to erase a partition
specified by name. The erase is performed based on erase group size,
to avoid
[ imported from Linux Kernel, commit 74981fb81d83 ]
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Acked-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
doc/device-tree-bindings/gpio/gpio.txt | 5 +++--
1 file changed, 3
On 12 February 2015 at 10:37, Albert ARIBAUD (3ADEV)
albert.arib...@3adev.fr wrote:
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2:
- move boot image generation to mkimage framework
common/image.c | 1 +
include/image.h | 1 +
The bcm2835 and bcm2836 are essentially identical, except:
- The CPU is an ARM1176 v.s. a quad-core Cortex-A7.
- The physical address of many IO controllers has moved.
Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH),
update the existing bcm2835 code to handle the minor
Hi Michal,
On 11 February 2015 at 10:16, Michal Suchanek hramr...@gmail.com wrote:
Hello,
I changed the SYS_START to work around the bug in the manufacturer
firmware, applied snow_defconfig, built u-boot.bin, packed it into
kernel uimage, signed it, copied it to a kernel partition, bumped
On silicon VER1.0, there is an interleaving issue on CCI400
slave interface S2. The workaround is to enable regulation
of outstanding read transactions for slave interface S2.
Signed-off-by: Alison Wang alison.w...@freescale.com
---
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 ++
For LS102xA, some workarounds are only used in VER1.0, so silicon
version detection are added for QDS and TWR boards.
Signed-off-by: Alison Wang alison.w...@freescale.com
---
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 3 +
board/freescale/ls1021aqds/ls1021aqds.c | 69
Hi Albert,
On 12 February 2015 at 10:37, Albert ARIBAUD (3ADEV)
albert.arib...@3adev.fr wrote:
This driver only supports Driver Model, not legacy model.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2:
- move from legacy to Driver Model support
Hi Joe,
On 10 February 2015 at 23:08, Joe Hershberger joe.hershber...@gmail.com wrote:
Hi Simon,
On Tue, Feb 10, 2015 at 10:39 PM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 10 February 2015 at 18:30, Joe Hershberger joe.hershber...@ni.com
wrote:
Before this patch, if the sequence
Dear Tom Rini.
Please pull u-boot-sh rmobile branch.
The following changes since commit a4fb5df214c7e8d5bc949c1068d92252f105427a:
Merge branch 'microblaze' of git://git.denx.de/u-boot-microblaze
(2015-02-09 11:44:46 -0500)
are available in the git repository at:
Hi Joe,
On 10 February 2015 at 23:25, Joe Hershberger joe.hershber...@gmail.com wrote:
On Fri, Feb 6, 2015 at 7:25 PM, Simon Glass s...@chromium.org wrote:
Hi Joe,
On 2 February 2015 at 17:38, Joe Hershberger joe.hershber...@ni.com
wrote:
First just add support for MAC drivers.
USB doesn't seem to work yet; the controller detects the on-board Hub/
Ethernet device but can't read the descriptors from it. I haven't
investigated yet.
Signed-off-by: Stephen Warren swar...@wwwdotorg.org
---
V2: Implement new board_rev decoding scheme, to avoid hard-coding the
board revision
Signed-off-by: Stephen Warren swar...@wwwdotorg.org
---
V2: No changes.
arch/arm/cpu/arm1176/bcm2835/Makefile | 12 ++--
arch/arm/include/asm/arch-bcm2835/sdhci.h | 12 +---
arch/arm/include/asm/arch-bcm2835/timer.h | 12 +---
arch/arm/include/asm/arch-bcm2835/wdog.h
Hello,
I am curious about the setting of the SS_EN bit in the
DDR_SDRAM_CLK_CNLT register:
Source synchronous enable. This bit field must be set during
initialization. See Section 9.6.1, “DDR SDRAM Initialization
Sequence,” for details.
0 - Reserved
1 - The address and command
On Tue, 2015-02-10 at 13:38 +0300, Alexey Brodkin wrote:
ARC HS and ARC EM are new cores based on ARCv2 ISA which is binary
incompatible with ISAv1 (AKA ARCompact).
Significant difference between ISAv2 and v1 is implementation of
interrupt vector table.
In v1 it is implemented in the same
OUT transactions must be aligned to wMaxPacketSize for each transfer,
or else transfer will not complete successfully. This patch modifies
rx_bytes_expected to return a transfer length that is aligned to
wMaxPacketSize.
Note that the value of ep-desc-wMaxPacketSize and ep-maxpacket
may not be the
If the string is copied without NULL termination using strncpy(),
then strncat() on the next line, may concatenate the string after
some stale (or random) data, if the response string was not
zero-initialized.
Signed-off-by: Dileep Katta dileep.ka...@linaro.org
---
common/fb_mmc.c | 4 ++--
1
Configure the serial number using the serial# environment variable
during the fastboot bind.
This enables fastboot devices to return the serial number for
the attached devices.
Signed-off-by: Dileep Katta dileep.ka...@linaro.org
---
drivers/usb/gadget/f_fastboot.c | 5 +
1 file changed, 5
Enable the power for MMC/SD port.
Signed-off-by: Bo Shen voice.s...@atmel.com
---
board/atmel/sama5d4_xplained/sama5d4_xplained.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/board/atmel/sama5d4_xplained/sama5d4_xplained.c
b/board/atmel/sama5d4_xplained/sama5d4_xplained.c
index
Dear Tom,
The following changes since commit
bd2a4888b123713adec271d6c8040ca9f609aa2f:
sunxi: configs/sunxi-common.h: Enable CONFIG_CMD_PART (2015-02-11
19:43:45 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-arc.git
for you to fetch changes up to
Hi Simon,
Le Thu, 12 Feb 2015 22:06:51 -0700, Simon Glass s...@chromium.org a
écrit :
Hi Albert,
On 12 February 2015 at 10:37, Albert ARIBAUD (3ADEV)
albert.arib...@3adev.fr wrote:
This driver only supports Driver Model, not legacy model.
Signed-off-by: Albert ARIBAUD (3ADEV)
Hi Masahiro,
On 12/02/15 11:17, Masahiro Yamada wrote:
Hi Greg,
On Tue, 10 Feb 2015 18:12:25 +1000
Greg Ungerer greg.unge...@opengear.com wrote:
Hi Masahiro,
On 10/02/15 17:00, Masahiro Yamada wrote:
These are still non-generic boards.
Signed-off-by: Masahiro Yamada
For example on a raspberry pi the u-boot environment can be
saved in a file on the first VFAT partition.
This example illustrates how to use it with fw_printenv/fw_setenv.
Signed-off-by: Waldemar Brodkorb w...@openadk.org
---
tools/env/fw_env.config | 3 +++
1 file changed, 3 insertions(+)
diff
Hello all,
I have a board with CPU powerpc-p1015 and DDR RAM. I am using VxWorks
application executed in the following way:
1. The application load is saved on NOR flash.
2. The application is copied to RAM with: cp.l $source_address
$dest_address $size
3. Then the
On Sun, Feb 01, 2015 at 03:38:42AM +0100, Albert ARIBAUD wrote:
Hello Przemyslaw,
On Wed, 28 Jan 2015 13:55:42 +0100, Przemyslaw Marczak
p.marc...@samsung.com wrote:
For ARM architecture, enable the CONFIG_USE_ARCH_MEMSET/MEMCPY,
will highly increase the memset/memcpy performance. This is
On Sat, Jan 31, 2015 at 11:08:54AM +0800, feng...@phytium.com.cn wrote:
From: David Feng feng...@phytium.com.cn
Armv7 and Armv8 allow outer cache exist, it is outside of the architecture
defined cache hierarchy and can not be manipulated by architecture defined
instructions. It's processor
On 15-02-12 01:21 AM, Dileep Katta wrote:
Hi Rob,
On 12 February 2015 at 14:35, Rob Herring robherri...@gmail.com wrote:
On Tue, Feb 10, 2015 at 2:49 AM, Dileep Katta dileep.ka...@linaro.org wrote:
Adds the fastboot erase functionality, to erase a partition
specified by name. The erase is
On Sat, Jan 31, 2015 at 03:08:54AM +, feng...@phytium.com.cn wrote:
From: David Feng feng...@phytium.com.cn
Armv7 and Armv8 allow outer cache exist, it is outside of the architecture
defined cache hierarchy and can not be manipulated by architecture defined
instructions. It's processor
On Thu, Feb 05, 2015 at 10:51:00AM +0100, Lukasz Majewski wrote:
Hi Simon,
Hi Lukasz,
On 2 February 2015 at 01:46, Lukasz Majewski l.majew...@samsung.com
wrote:
Dear All,
And the next is interesting.
odroid_defconfig has more than 80MB for malloc (we need about
64mb
From: Raul Cardenas ulises.carde...@freescale.com
Freescale's SEC block has built-in Data Encryption
Key(DEK) Blob Protocol which provides a method for
protecting a DEK for non-secure memory storage.
SEC block protects data in a data structure called
a Secret Key Blob, which provides both
- mpc512x_fec.c: 'fec' was not being memset while dev was, just call
calloc() instead for both. 'bd' was being memset afterwards but given
that it's an awkward looking call, just calloc() it directly.
- bzlib.c: Some fields to 'bzf' are being set to NULL later but for
clarity calloc() the
On Tue, Feb 10, 2015 at 06:33:38AM -0800, Tim Harvey wrote:
On Fri, Jan 9, 2015 at 12:59 AM, Peng Fan peng@freescale.com wrote:
The basic graph for voltage input is:
VDDARM_IN --- LDO_DIG(ARM) --- VDD_ARM_CAP
VDDSOC_IN --- LDO_DIG(SOC) --- VDD_SOC_CAP
Hi Peng,
Glad to see
Hello,
That would be the most obvious thing, wouldn't it. I thought of that,
but am not sure of the answer in u-boot.
Thanks,
Brian
On 2/11/2015 12:09 AM, Joe Hershberger wrote:
On Tue, Feb 10, 2015 at 7:18 PM, Brian Smucker b...@bsmucker.eu.org
mailto:b...@bsmucker.eu.org wrote:
On 02/12/2015 12:32 AM, Simon Glass wrote:
With driver model the number of PIO ports is defined by platform data, so
remove it from the header file.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Andreas Bießmann andreas.de...@googlemail.com
---
Changes in v3:
- Split out the
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 11 ++
arch/arm/include/asm/arch-lpc32xx/clk.h | 4 +
arch/arm/include/asm/arch-lpc32xx/cpu.h | 2 +
This driver only supports Driver Model, not legacy model.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2:
- move from legacy to Driver Model support
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 5 +
arch/arm/include/asm/arch-lpc32xx/gpio.h | 43 +
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 9 +
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 7 +
arch/arm/include/asm/arch-lpc32xx/config.h| 3 +
The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.
The SPL framework is supported.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2: None
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2:
- added MUX setting for SSP0
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 14 +++
arch/arm/include/asm/arch-lpc32xx/clk.h | 3 +
arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 +
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2:
- cosmetic: added a blank line before copyright
drivers/hwmon/Makefile | 1 +
drivers/hwmon/ds620.c | 65 ++
include/dtt.h | 15 ++--
3 files
Work_92105 from Work Microwave is an LPC3250-
based board with the following features:
- 64MB SDR DRAM
- 1 GB SLC NAND, managed through MLC controller.
- Ethernet
- Ethernet + PHY SMSC8710
- I2C:
- EEPROM (24M01-compatible)
- RTC (DS1374-compatible)
- Temperature sensor (DS620)
- DACs (2 x
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