On Sun, Oct 18, 2015 at 11:45 AM, Vadzim Dambrouski wrote:
> On 18.10.2015 12:20, Linus Walleij wrote:
>> Hey, cool. Technically the (ulong) typecasts should be another patch
>
> Sorry about that, this is my first time sending a patch.
>
>> Are you using this with the smload commands?
>
> Yes, I d
On Sat, Oct 17, 2015 at 12:27 AM, Simon Glass wrote:
> On 16 October 2015 at 15:23, Linus Walleij wrote:
>> Again: get this merged in the Linux kernel FIRST. Is it?
>
> We had a little bit of a chat about this at ELCE. It would be great to
> get these changes merged with the kernel but the amoun
On Thu, Jul 16, 2015 at 9:41 AM, Geert Uytterhoeven
wrote:
>> Ah right. I don't think that naming is super critical though, as a lot
>> of properties in the DT just describe how things are at boot time.
>
> Hence those don't describe the hardware...
> Shouldn't they be in /chosen instead?
/chose
Hi Albert,
On Mon, Oct 19, 2015 at 08:48:56AM +0200, Albert ARIBAUD wrote:
>Hello Peng,
>
>On Mon, 19 Oct 2015 13:40:51 +0800, Peng Fan
>wrote:
>> On Tue, Oct 06, 2015 at 05:13:24PM -0500, Frank Li wrote:
>> >When added above configuration, iram fix up plus relocate offset may locate
>> >in invali
Hi Lukasz,
On Tue, Oct 13, 2015 at 7:17 PM, Lukasz Majewski wrote:
> Hi Bin,
>
>> Hi,
>>
>> On Fri, Oct 2, 2015 at 6:34 AM, Tom Rini wrote:
>> > On Thu, Oct 01, 2015 at 10:38:50AM +0200, Lukasz Majewski wrote:
>> >
>> >> Hi Tom,
>> >>
>> >> Is there any schedule for our ELCE2015 u-boot mini summ
Hi Fabio,
> Hi Lukasz,
>
> On Tue, Sep 22, 2015 at 4:46 AM, Lukasz Majewski
> wrote:
> > Hi Fabio,
> >
> >> From: Fabio Estevam
> >>
> >> SPI NOR flashes need to erase the entire sector size and we cannot
> >> pass any arbitrary length for the erase operation.
> >>
> >> To illustrate the proble
On Sat, Oct 17, 2015 at 04:42:09PM +0200, Hans de Goede wrote:
> Hi,
>
> On 17-10-15 15:59, Hans de Goede wrote:
> >Hi,
> >
> >On 15-10-15 14:34, Maxime Ripard wrote:
> >>Hi everyone,
> >>
> >>Here is the second attempt at getting fastboot flashing functions
> >>working on top of a NAND, for arbit
Hi Albert,
On 10/19/2015 01:52 PM, Albert ARIBAUD wrote:
Not sure I'm getting this, so for my own education: what prevents from
invalidating the cache, or IOW, what would happen if it was invalidated
at this point rather than flushed?
This is a hardware limitation. The nios2 cpu with 4 bytes d
Hello Peng,
On Mon, 19 Oct 2015 15:19:09 +0800, Peng Fan
wrote:
> Hi Albert,
> On Mon, Oct 19, 2015 at 08:48:56AM +0200, Albert ARIBAUD wrote:
> >Hello Peng,
> >
> >On Mon, 19 Oct 2015 13:40:51 +0800, Peng Fan
> >wrote:
> >> On Tue, Oct 06, 2015 at 05:13:24PM -0500, Frank Li wrote:
> >> >When ad
Hello Thomas,
On Mon, 19 Oct 2015 16:18:06 +0800, Thomas Chou
wrote:
> Hi Albert,
>
> On 10/19/2015 01:52 PM, Albert ARIBAUD wrote:
> > Not sure I'm getting this, so for my own education: what prevents from
> > invalidating the cache, or IOW, what would happen if it was invalidated
> > at this p
Hi,
On 18-10-15 14:18, Simon Glass wrote:
Hi,
On 9 September 2015 at 12:06, Simon Glass wrote:
Hi,
On Saturday, 5 September 2015, Siarhei Siamashka
wrote:
On Sat, 5 Sep 2015 15:52:03 +0200
Hans de Goede wrote:
Hi,
On 05-09-15 15:45, Simon Glass wrote:
Add a README with a brief guide
Hi,
On 19-10-15 01:17, Simon Glass wrote:
Hi Hans,
On 12 September 2015 at 09:15, Hans de Goede wrote:
Hi,
On 08-09-15 19:15, Simon Glass wrote:
Switch USB keyboards over to use driver model instead of scanning with the
horrible usb_get_dev_index() function. This involves creating a new uc
Hi Bin,
> Hi Lukasz,
>
> On Tue, Oct 13, 2015 at 7:17 PM, Lukasz Majewski
> wrote:
> > Hi Bin,
> >
> >> Hi,
> >>
> >> On Fri, Oct 2, 2015 at 6:34 AM, Tom Rini
> >> wrote:
> >> > On Thu, Oct 01, 2015 at 10:38:50AM +0200, Lukasz Majewski wrote:
> >> >
> >> >> Hi Tom,
> >> >>
> >> >> Is there any
Hi Albert,
On Mon, Oct 19, 2015 at 10:23:40AM +0200, Albert ARIBAUD wrote:
>Hello Peng,
>
>On Mon, 19 Oct 2015 15:19:09 +0800, Peng Fan
>wrote:
>> Hi Albert,
>> On Mon, Oct 19, 2015 at 08:48:56AM +0200, Albert ARIBAUD wrote:
>> >Hello Peng,
>> >
>> >On Mon, 19 Oct 2015 13:40:51 +0800, Peng Fan
>>
Hi Lukasz,
On Mon, Oct 19, 2015 at 4:36 PM, Lukasz Majewski wrote:
> Hi Bin,
>
>> Hi Lukasz,
>>
>> On Tue, Oct 13, 2015 at 7:17 PM, Lukasz Majewski
>> wrote:
>> > Hi Bin,
>> >
>> >> Hi,
>> >>
>> >> On Fri, Oct 2, 2015 at 6:34 AM, Tom Rini
>> >> wrote:
>> >> > On Thu, Oct 01, 2015 at 10:38:50AM
Hi Sinan Akman,
Yes, I mean the Rev 1.0 silicon.
Sorry, I can't guarantee that there aren't any boards with Rev1.0 silicon are
in user's hands.
Because we have also delivery very little board with Rev1.0 silicon to
customer or developer for developing, assessing and verifying in the early
s
Hi Simon,
On 19 October 2015 at 01:57, Simon Glass wrote:
> Hi Jagan,
>
> On 12 October 2015 at 09:00, Jagan Teki wrote:
>> Previous version link:
>> http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/233262
>>
>> spi-flash layer need to tune a lot for better code handling and
>> to sync
On 19.10.2015 09:06, Albert ARIBAUD wrote:
Hello Vadzim,
On Mon, 19 Oct 2015 00:13:29 +0300, Vadzim Dambrouski
wrote:
Signed-off-by: Vadzim Dambrouski
---
arch/arm/lib/semihosting.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/lib/semihosting.c b/arch/a
On 19 October 2015 at 10:10, Liviu Dudau wrote:
> On Fri, 16 Oct 2015 17:58:44 +0100
> Ryan Harkin wrote:
>
> > Hi Liviu,
> >
> > These patches work well for me, so at the very least, you can add my
> > Test-by for both:
> >
> > Tested-by: Ryan Harkin
>
> Hi Ryan,
>
> Thanks for testing this pa
On 19 October 2015 at 11:08, Liviu Dudau wrote:
> Juno R1 has an XpressRICH3 PCIe host bridge that needs to be initialised
> in order for the Linux kernel to be able to enumerate the bus. Add
> support code here that enables the host bridge, trains the links and
> sets up the Address Translation
Hi Hans,
On 17.10.2015 15:47, Hans de Goede wrote:
On 01-10-15 11:41, Stefan Roese wrote:
The ICnova-A20-SWAC is a baseboard, equipped with the ICnova-A20 SoM from
In-Circuit:
http://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM
http://linux-sunxi.org/In-Circuit_ICnova_A20
This patch
Hi Hans,
On 17.10.2015 15:47, Hans de Goede wrote:
On 01-10-15 11:41, Stefan Roese wrote:
The ICnova-A20-SWAC is a baseboard, equipped with the ICnova-A20 SoM from
In-Circuit:
http://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM
http://linux-sunxi.org/In-Circuit_ICnova_A20
This patch
Hi Maxime,
On 18.10.2015 11:34, Maxime Ripard wrote:
On 01-10-15 11:41, Stefan Roese wrote:
The ICnova-A20-SWAC is a baseboard, equipped with the ICnova-A20 SoM from
In-Circuit:
http://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM
http://linux-sunxi.org/In-Circuit_ICnova_A20
This patc
Hi Simon,
On 10/19/2015 09:53 AM, Simon Glass wrote:
Please do create a test for this uclass using a fake sandbox timer.
Note also time_ut.c which might have some ideas.
I am learning sandbox and working on a sandbox timer now.
Best regards,
Thomas
On Mon, Oct 19, 2015 at 6:07 AM, Lukasz Majewski wrote:
>> On Tue, Sep 22, 2015 at 4:46 AM, Lukasz Majewski
>> wrote:
>> >> From: Fabio Estevam
>> >>
>> >> SPI NOR flashes need to erase the entire sector size and we cannot
>> >> pass any arbitrary length for the erase operation.
>> >>
>> >> To i
Hi Otavio,
> On Mon, Oct 19, 2015 at 6:07 AM, Lukasz Majewski
> wrote:
> >> On Tue, Sep 22, 2015 at 4:46 AM, Lukasz Majewski
> >> wrote:
> >> >> From: Fabio Estevam
> >> >>
> >> >> SPI NOR flashes need to erase the entire sector size and we
> >> >> cannot pass any arbitrary length for the erase
Dear Cliff,
On 10/16/2015 01:46 PM, Cliff Brust wrote:
> I have the need to erase our eMMC from U-Boot on our custom board due to a
> hard wired
> boot up configuration. Our design is based on the Freescale i.MX6Q SabreSD
> Board
> reference design. The bottom line is the U-Boot command "mmc era
Hi Tom,
> On Mon, Oct 19, 2015 at 6:07 AM, Lukasz Majewski
> wrote:
> >> On Tue, Sep 22, 2015 at 4:46 AM, Lukasz Majewski
> >> wrote:
> >> >> From: Fabio Estevam
> >> >>
> >> >> SPI NOR flashes need to erase the entire sector size and we
> >> >> cannot pass any arbitrary length for the erase op
Hi Sanchayan,
We are using a custom board with vybrid processor,in which we need to configure
USB0 as host and USB1 as client.
Regards,
Santhosh
-Original Message-
From: maitysancha...@gmail.com [mailto:maitysancha...@gmail.com]
Sent: Monday, October 19, 2015 10:59 AM
To: ma...@denx.de
On Fri, 16 Oct 2015 17:58:44 +0100
Ryan Harkin wrote:
> Hi Liviu,
>
> These patches work well for me, so at the very least, you can add my
> Test-by for both:
>
> Tested-by: Ryan Harkin
Hi Ryan,
Thanks for testing this patchset.
>
> But...
>
> I ran checkpatch.pl across your patches and t
Juno R1 has an XpressRICH3 PCIe host bridge that needs to be initialised
in order for the Linux kernel to be able to enumerate the bus. Add
support code here that enables the host bridge, trains the links and
sets up the Address Translation Tables.
Signed-off-by: Liviu Dudau
Tested-by: Ryan Harki
Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel.
Declare a secondary memory bank and set the sizes correctly.
Signed-off-by: Liviu Dudau
Reviewed-by: Linus Walleij
Reviewed-by: Ryan Harkin
Tested-by: Ryan Harkin
---
board/armltd/vexpress64/vexpress64.c | 8
include/
Hello,
This patchset enables PCIe for ARM's Juno boards and configures the
host bridge's address translation block. This enables the Linux kernel
to boot on Juno r1 using just a device tree and the generic host bridge
driver.
No support has been added at this phase for the SATA or Ethernet device
On 17 October 2015 at 02:11, Fabio Estevam wrote:
> From: Fabio Estevam
>
> Use the log2 and fls64 header files directly from the kernel.
>
> Signed-off-by: Fabio Estevam
> ---
> Changes since v7:
> - None
>
> include/asm-generic/bitops/fls64.h | 36 +++
> include/linux/bitops.h
Hi,
On 19-10-15 12:38, Stefan Roese wrote:
Hi Hans,
On 17.10.2015 15:47, Hans de Goede wrote:
On 01-10-15 11:41, Stefan Roese wrote:
The ICnova-A20-SWAC is a baseboard, equipped with the ICnova-A20 SoM from
In-Circuit:
http://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM
http://linux
Hi Yuan
On 19/10/15 05:21 AM, Yao Yuan wrote:
Hi Sinan Akman,
Yes, I mean the Rev 1.0 silicon.
Sorry, I can't guarantee that there aren't any boards with Rev1.0 silicon are
in user's hands.
Because we have also delivery very little board with Rev1.0 silicon to
customer or developer for d
Hi,
On 19-10-15 12:48, Stefan Roese wrote:
Hi Maxime,
On 18.10.2015 11:34, Maxime Ripard wrote:
On 01-10-15 11:41, Stefan Roese wrote:
The ICnova-A20-SWAC is a baseboard, equipped with the ICnova-A20 SoM from
In-Circuit:
http://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM
http://lin
Hello Peng,
(cutting a bit through the previous mails quoting)
> >This, in turn, leads to new questions:
> >
> >1. How is this PSCI code put in place? Is it bundled with the image,
> > with a specificy copy routine which puts it in place then locks the
> Yeah.
> > memory range against writing
Hi Hans,
On 19.10.2015 13:44, Hans de Goede wrote:
diff --git a/arch/arm/dts/sun7i-a20-icnova-a20-swac.dts
b/arch/arm/dts/sun7i-a20-icnova-a20-swac.dts
new file mode 100644
Please submit this file also to the upstream kernel.
Yes. The name of the DT especially doesn't really make sense. T
From: Mingkai Hu
There are two LS series processors are built on ARMv8 Layersacpe
architecture currently, LS2085A and LS1043A. They are based on
ARMv8 core although use different chassis, so create fsl-layerscape
to refactor the common code for the LS series processors which also
paves the way fo
From: Hou Zhiqiang
After the secondary cores enter U-Boot, use CONFIG_ARMV8_MULTIENTRY to
make secondary cores to excute in spin loop.
Signed-off-by: Hou Zhiqiang
Signed-off-by: Mingkai Hu
Signed-off-by: Gong Qianyu
---
V6:
- New patch.
arch/arm/Kconfig | 1 +
arch/a
From: Shaohui Xie
Use mb() instead of sync() to be compatible for both ARM and PowerPC.
Signed-off-by: Shaohui Xie
Signed-off-by: Mingkai Hu
Signed-off-by: Gong Qianyu
---
V6:
- No change.
V5:
- No change.
V4:
- No change.
V3:
- New patch. Separated from patch 'net: Move some header files
From: Gong Qianyu
Signed-off-by: Gong Qianyu
---
V6:
- No change.
V5:
- No change.
V4:
- No change.
V3:
- Squash the add cpld command patch to it.
V2:
- No change.
board/freescale/ls1043ardb/README| 1 +
board/freescale/ls1043ardb/cpld.c| 18 ++
From: Hou Zhiqiang
In convention, the '0' is a normal return value indicating there isn't
an error. While some functions of FMan IM driver treat '0' as an error
return value.
Signed-off-by: Hou Zhiqiang
Signed-off-by: Gong Qianyu
---
V6:
- No change.
V5:
- No change.
V4:
- No change.
V3:
-
From: Gong Qianyu
Signed-off-by: Gong Qianyu
Signed-off-by: Hou Zhiqiang
Signed-off-by: Shaohui Xie
Signed-off-by: Mingkai Hu
---
V6:
- No change.
V5:
- No change.
V4:
- Add enable_layerscape_ns_access() in fsl-layerscape/spl.c
V3:
- No change.
V2:
- Removed unecessary NAND_PAGE_SIZE in
From: Yangbo Lu
This patch adds esdhc support for ls1043ardb.
Signed-off-by: Yangbo Lu
Signed-off-by: Gong Qianyu
---
V6:
- No change.
V5:
- No change.
V4:
- Use CONFIG_FSL_ESDHC to enable get_sdhc_freq().
- Merge lsch2 and lsch3 into layerscape.
V3:
- No change.
V2:
- No change.
.../a
From: Hou Zhiqiang
The FMan IM driver is developed for 32-bit platfroms and isn't
friendly to 64-bit platforms, so do the minimal refactor:
1. Refine the MURAM management and access.
2. Correct the initialization and operations for QDs and BDs.
Signed-off-by: Hou Zhiqiang
Signed-off-by: Gong Q
From: Mingkai Hu
LS1043ARDB Specification:
-
Memory subsystem:
* 2GByte DDR4 SDRAM (32bit bus)
* 128 Mbyte NOR flash single-chip memory
* 512 Mbyte NAND flash
* 16 Mbyte high-speed SPI flash
* SD connector to interface with the SD memory card
Ethernet:
* XFI 10G por
From: Shaohui Xie
QSGMII PCS needed to be programmed same as SGMII PCS, and there are
four ports in QSGMII PCS, port 0, 1, 2, 3, all the four ports shared
port 0's MDIO controller, so when programming port 0, we continue to
program other three ports.
Signed-off-by: Shaohui Xie
Signed-off-by: Mi
From: Shaohui Xie
The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM
and PPC, move it out of ppc to include/, and change the path in
drivers accordingly.
Signed-off-by: Shaohui Xie
Signed-off-by: Gong Qianyu
---
V6:
- No change.
V5:
- No change.
V4:
- No change.
V3:
- No c
From: Shaohui Xie
codes related to phylib operations should be wrapped by CONFIG_PHYLIB.
Signed-off-by: Shaohui Xie
Signed-off-by: Gong Qianyu
---
V6:
- Fix all codes related to phylib to be wrapped by CONFIG_PHYLIB.
V5:
- No change.
V4:
- No change.
V3:
- New patch.
drivers/net/fm/eth.c
From: Shaohui Xie
MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR
plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are two
FMANs, so we should only define MDIO controller base on FMAN2 when there
is FMAN2.
Signed-off-by: Shaohui Xie
Signed-off-by: Mingkai Hu
From: Gong Qianyu
get_clocks() should not be limited by ESDHC.
Signed-off-by: Gong Qianyu
---
V6:
- No change.
V5:
- No change.
V4:
- No change.
V3:
- Removed defines in PPC configs that have no need to use.
V2:
- No change.
common/board_f.c | 2 +-
include/configs/colib
From: Mingkai Hu
Freescale LayerScape with Chassis Generation 2 is a set of SoCs with
ARMv8 cores and 2rd generation of Chassis.
Signed-off-by: Li Yang
Signed-off-by: Hou Zhiqiang
Signed-off-by: Mingkai Hu
Signed-off-by: Gong Qianyu
---
V6:
- Remove GIC SMMU macros back to config.h.
V5:
-
Hi All,
Here are the changes for version 6 patchset. Please kindly help
to review the patchset.
- Added secondary core support
- Added ls2085a simulator/emulator into the arch-fsl-layerscape
framework
- Moved some SoC related macors from board header file into
config.h
- serdes_prtl en
From: Shaohui Xie
Signed-off-by: Hou Zhiqiang
Signed-off-by: Shaohui Xie
Signed-off-by: Mingkai Hu
Signed-off-by: Gong Qianyu
---
V6:
- No change.
V5:
- No change.
V4:
- Change arch to layerscape.
V3:
- No change.
V2:
- No change.
arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 1
From: Mingkai Hu
Config Security Level Register is different between different SoCs,
so put the CSL register definition into the arch specific directory.
Signed-off-by: Mingkai Hu
Signed-off-by: Gong Qianyu
---
V6:
- No change.
V5:
- No change.
V4:
- No change.
V3:
- No change.
V2:
- Crea
From: Hou Zhiqiang
The Frame Manager(FMan) is a big-endian peripheral, so the
registers, internal MURAM and BDs, which are allocated in main
memory and used to communication between core and FMan, should
be accessed in big-endian. The big-endian platforms can access
them directly as the code impl
On Monday, October 19, 2015 at 04:36:21 AM, Thomas Chou wrote:
Hi!
> Convert altera_tse to driver model and phylib.
>
> Signed-off-by: Thomas Chou
> ---
> configs/nios2-generic_defconfig | 2 +
> doc/device-tree-bindings/net/altera_tse.txt | 112
> drivers/net/Kconfig
On Monday, October 19, 2015 at 08:06:16 AM, Thomas Chou wrote:
Hi!
> Add README.nios2 about how to add nios2 boards to u-boot.
>
> Signed-off-by: Thomas Chou
> ---
> doc/README.nios2 | 86
> 1 file changed,
> 86 insertions(+)
> create mo
Hi Linus,
On 19 October 2015 at 01:15, Linus Walleij wrote:
> On Sat, Oct 17, 2015 at 12:27 AM, Simon Glass wrote:
>> On 16 October 2015 at 15:23, Linus Walleij wrote:
>
>>> Again: get this merged in the Linux kernel FIRST. Is it?
>>
>> We had a little bit of a chat about this at ELCE. It would
Hi Albert,
On Mon, Oct 19, 2015 at 01:48:25PM +0200, Albert ARIBAUD wrote:
>Hello Peng,
>
>(cutting a bit through the previous mails quoting)
>
>> >This, in turn, leads to new questions:
>> >
>> >1. How is this PSCI code put in place? Is it bundled with the image,
>> > with a specificy copy routi
This function will be used by both SPL and U-Boot proper. So move it into
a common place. Also change the #ifdef so that the early malloc() area is
not set up in SPL if CONFIG_SYS_SPL_MALLOC_START is defined. In that case
it would never actually be used, and just chews up stack space.
Signed-off-b
This series collects the previous RFT patches I sent out.
https://patchwork.ozlabs.org/patch/508167/
https://patchwork.ozlabs.org/patch/508168/
It turns out that I originally sent a version of these in April:
https://patchwork.ozlabs.org/patch/461687/
https://patchwork.ozlabs.org/patch/461690/
There is quite a bit of assembler code that can be removed if we use the
generic global_data setup. Less arch-specific code makes it easier to add
new features and maintain the start-up code.
Drop the unneeded code and adjust the hooks in board_f.c to cope.
Tested on LS2085ARDB and LS2085AQDS (ar
There is quite a bit of assembler code that can be removed if we use the
generic global_data setup. Less arch-specific code makes it easier to add
new features and maintain the start-up code.
Drop the unneeded code and adjust the hooks in board_f.c to cope.
Signed-off-by: Simon Glass
---
Change
We should not init the console this early since it precludes using driver
model for the UART, since it is not set up at the start of board_init_f().
See the README for more information. The debug UART does not have this
restriction. If we want to do early init with the console on it can be done
in
Unfortunately memset() is not always available, so provide a substitute when
needed.
Signed-off-by: Simon Glass
---
Changes in v4:
- Remove the 'end' variable in board_init_f_mem()
Changes in v3: None
Changes in v2:
- Add comments as to why this is needed, deal with arch-specific memset()
com
Change the #ifdef so that the early malloc() area is not set up in SPL if
CONFIG_SYS_SPL_MALLOC_START is defined. In that case it would never actually
be used, and just chews up stack space.
Signed-off-by: Simon Glass
Tested-by: Masahiro Yamada
---
Changes in v4: None
Changes in v3: None
Change
This reverts commit 321f86e18d6aae9f7b7ba3ef1eb0cec769481874.
The original bug has been fixed.
Signed-off-by: Simon Glass
Tested-on: Zedboard and ZC706 board
Tested-by: Masahiro Yamada
Tested-on: zc702
Tested-by: Michal Simek
---
Changes in v4:
- Fully revert the commit (some changes were los
This C function should be used to do the early memory layout and init. This
is beyond my powers, so just add a TODO for the maintainer.
Signed-off-by: Simon Glass
Acked-by: Michal Simek
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/microblaze/cpu/start.S | 2 ++
1 file
Jon & Grant especially:
On Mon, Oct 19, 2015 at 2:44 PM, Simon Glass wrote:
> Me
>> I will go in and answer the comment on the DT mailing list so there is
>> some push atleast.
>
> Perhaps if we could see some movement then it would provide
> encouragement to continue. So far I cannot recall seei
On 19 October 2015 at 02:17, Heiko Schocher wrote:
> Hello Ezequiel,
>
> Am 17.10.2015 um 20:07 schrieb Ezequiel Garcia:
>>
>> Hi Heiko,
>>
>> On 9 October 2015 at 09:30, Heiko Schocher wrote:
>> [..]
>>>
>>>
>>>
>>> I just updated the "ubi_sync_with_linux" branch on u-boot-ubi.
>>>
>>> It seems
Hi,
On 19 October 2015 at 03:17, Bin Meng wrote:
> Hi Lukasz,
>
> On Mon, Oct 19, 2015 at 4:36 PM, Lukasz Majewski
> wrote:
>> Hi Bin,
>>
>>> Hi Lukasz,
>>>
>>> On Tue, Oct 13, 2015 at 7:17 PM, Lukasz Majewski
>>> wrote:
>>> > Hi Bin,
>>> >
>>> >> Hi,
>>> >>
>>> >> On Fri, Oct 2, 2015 at 6:34
Simon,
On Thu, Oct 15, 2015 at 8:25 AM, Simon Glass wrote:
> Hi Bin,
>
> On Monday, 12 October 2015, Bin Meng wrote:
>>
>> Hi George,
>>
>> On Tue, Oct 13, 2015 at 10:52 AM, George McCollister
>> wrote:
>> > On Mon, Oct 12, 2015 at 7:48 PM, Bin Meng wrote:
>> >> Hi George,
>> >>
>> >> On Tue,
Hi George,
On 19 October 2015 at 08:29, George McCollister
wrote:
> Simon,
>
> On Thu, Oct 15, 2015 at 8:25 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On Monday, 12 October 2015, Bin Meng wrote:
>>>
>>> Hi George,
>>>
>>> On Tue, Oct 13, 2015 at 10:52 AM, George McCollister
>>> wrote:
>>> > On Mo
> -Original Message-
> From: Peng Fan [mailto:b51...@freescale.com]
> Sent: Monday, October 19, 2015 7:47 AM
> To: Albert ARIBAUD
> Cc: Li Frank-B20596 ; lzn...@gmail.com; u-
> b...@lists.denx.de; sba...@denx.de; Estevam Fabio-R49496
> ; ota...@ossystems.com.br;
> tr...@konsulko.com; hde
Hello Ezequiel,
Am 19.10.2015 um 15:47 schrieb Ezequiel Garcia:
On 19 October 2015 at 02:17, Heiko Schocher wrote:
Hello Ezequiel,
Am 17.10.2015 um 20:07 schrieb Ezequiel Garcia:
Hi Heiko,
On 9 October 2015 at 09:30, Heiko Schocher wrote:
[..]
I just updated the "ubi_sync_with_linux"
In some cases os.rename() may later fail due to "Cross-device link"
issues. The easy way to deal with this is to simply make our temporary
file here as well rather than TMPDIR.
Cc: Masahiro Yamada
Signed-off-by: Tom Rini
---
scripts/fill_scrapyard.py |2 +-
1 file changed, 1 insertion(+),
On Sun, Oct 18, 2015 at 04:40:55PM +0900, Masahiro Yamada wrote:
> Hi Simon,
>
> 2015-10-18 3:58 GMT+09:00 Simon Glass :
> > Sort this by board name to make it easier to find boards.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > Changes in v2:
> > - Rebase to master
> > - Update the file com
2015-10-15 23:46 GMT+02:00 Tom Rini :
> On Thu, Oct 15, 2015 at 03:58:24PM -0500, Rob Herring wrote:
> > On Tue, Oct 13, 2015 at 9:23 AM, Patrick Delaunay
> > wrote:
> > > code under flag CONFIG_PARTITION_TYPE_GUID
> > > add parameter guid to select partition type guid
> > >
> > > example of use
On 10/19/2015 04:14 AM, Sinan Akman wrote:
>
>Hi Yuan
>
> On 19/10/15 05:21 AM, Yao Yuan wrote:
>> Hi Sinan Akman,
>>
>> Yes, I mean the Rev 1.0 silicon.
>> Sorry, I can't guarantee that there aren't any boards with Rev1.0 silicon
>> are in user's hands.
>> Because we have also delivery ve
Hallo Daniel,
> -Original Message-
> From: Daniel Hellstrom [mailto:dan...@gaisler.com]
> Sent: 18 October 2015 11:30 PM
> To: Masahiro Yamada
> Subject: Re: [U-Boot] Remove sparc archiecture?
>
> On 10/18/2015 05:20 PM, Masahiro Yamada wrote:
> > (+CC Francois)
> >
> >
> > 2015-10-18 21:
Upon further review when populating README.scrapyard, d2net_v2 is a
variant on net2big_v2 and not just an orphan config. To help in the
future also add this to board/LaCie/net2big_v2/MAINTAINERS which needed
a little consolidation anyhow.
This reverts commit 1363740e7948a8e4bee8d5adcdf0f63f778287
On Sun, Oct 18, 2015 at 04:44:59PM +0900, Masahiro Yamada wrote:
> 2015-10-18 3:58 GMT+09:00 Simon Glass :
> > A lot of boards were recently removed. Add them to the scrapyard.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > Changes in v2: None
> >
> > doc/README.scrapyard | 73
> > ++
On Mon, Oct 19, 2015 at 09:12:25AM +0200, Linus Walleij wrote:
> On Sun, Oct 18, 2015 at 11:45 AM, Vadzim Dambrouski wrote:
> > On 18.10.2015 12:20, Linus Walleij wrote:
> >> Hey, cool. Technically the (ulong) typecasts should be another patch
> >
> > Sorry about that, this is my first time sendin
On Mon, Oct 19, 2015 at 02:54:57PM +, Francois Retief wrote:
> Hallo Daniel,
>
> > -Original Message-
> > From: Daniel Hellstrom [mailto:dan...@gaisler.com]
> > Sent: 18 October 2015 11:30 PM
> > To: Masahiro Yamada
> > Subject: Re: [U-Boot] Remove sparc archiecture?
> >
> > On 10/18/
> -Original Message-
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: 19 October 2015 05:47 PM
> To: Francois Retief
> Subject: Re: [U-Boot] Remove sparc archiecture?
>
> On Mon, Oct 19, 2015 at 02:54:57PM +, Francois Retief wrote:
> > Hallo Daniel,
> >
> > > -Original Message-
Updated dm-spi-flash probe using dm_spi_flash_probe.
Signed-off-by: Jagan Teki
Cc: Simon Glass
---
common/cmd_sf.c | 23 ---
drivers/mtd/spi/sf-uclass.c | 27 ++-
include/spi_flash.h | 5 ++---
3 files changed, 32 insertions(+), 2
Let's use spi_flash_probe for dm and no-dm spi-flash
and make respective function definations separately.
Signed-off-by: Jagan Teki
Cc: Simon Glass
---
common/cmd_sf.c | 19 ++-
drivers/mtd/spi/sf-uclass.c | 17 +
include/spi_flash.h | 18
Use direct call to device_remove instead of exctra
spi_flash_remove defination.
Signed-off-by: Jagan Teki
Cc: Simon Glass
---
drivers/mtd/spi/sf-uclass.c | 7 +--
include/spi_flash.h | 2 --
2 files changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/mtd/spi/sf-uclass.c b/
On Mon, Oct 19, 2015 at 02:57:22PM +0200, Linus Walleij wrote:
> Jon & Grant especially:
>
> On Mon, Oct 19, 2015 at 2:44 PM, Simon Glass wrote:
> > Me
> >> I will go in and answer the comment on the DT mailing list so there is
> >> some push atleast.
> >
> > Perhaps if we could see some movement
If you enable CONFIG_SEMIHOSTING for STM32F429 target, you will get compile
error looking like this:
arch/arm/lib/semihosting.c: In function 'smh_read':
{standard input}: Assembler messages:
{standard input}:34: Error: invalid swi expression
{standard input}:34: Error: value of 1193046 too large f
This patch fixes compile warnings like this:
warning: format '%lu' expects argument of type 'long unsigned int',
but argument 5 has type 'size_t'
In C99 standard you can use %zu modifier to print size_t values.
Signed-off-by: Vadzim Dambrouski
---
arch/arm/lib/semihosting.c | 4 ++--
On 10/18/2015 04:15 PM, Simon Glass wrote:
> Hi,
>
> On 18 October 2015 at 06:18, Simon Glass wrote:
>> On 9 September 2015 at 12:07, Simon Glass wrote:
>>>
>>> On Friday, 4 September 2015, York Sun wrote:
FIT image supports more than 32 bits in addresses by using #address-cell
On 10/16/2015 04:23 PM, Tom Warren wrote:
This is the normal Tegra SPI driver modified to work with the
QSPI controller in Tegra210. It does not do 2x/4x transfers
or any other QSPI protocol.
I've just realized we don't have a binding document for QSPI. I believe
we need to get one into the Li
Advantech SOM-6896 is a Broadwell U based COM Express Compact Module
Type 6. This patch adds support for it as a coreboot payload.
On board SATA and SPI are functional. On board Ethernet isn't functional
but since it's optional and ties up a PCIe x4 that is otherwise brought
out, this isn't a conc
On 19.10.2015 18:37, Tom Rini wrote:
On Mon, Oct 19, 2015 at 09:12:25AM +0200, Linus Walleij wrote:
On Sun, Oct 18, 2015 at 11:45 AM, Vadzim Dambrouski wrote:
On 18.10.2015 12:20, Linus Walleij wrote:
Hey, cool. Technically the (ulong) typecasts should be another patch
Sorry about that, thi
On Mon, Oct 19, 2015 at 7:57 AM, Linus Walleij wrote:
> Jon & Grant especially:
>
> On Mon, Oct 19, 2015 at 2:44 PM, Simon Glass wrote:
>> Me
>>> I will go in and answer the comment on the DT mailing list so there is
>>> some push atleast.
>>
>> Perhaps if we could see some movement then it would
Stephen,
-Original Message-
From: Stephen Warren [mailto:swar...@wwwdotorg.org]
Sent: Monday, October 19, 2015 10:37 AM
To: Tom Warren
Cc: u-boot@lists.denx.de; jt...@openedev.com; Stephen Warren
; tomcwarren3...@gmail.com
Subject: Re: [U-Boot] [PATCH v2] Tegra: T210: Add QSPI driver
O
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