When dealing with image addresses, ulong has been used. Some files
are used by both host and target. It is OK for the target, but not
always enough for host tools including mkimage. This patch replaces
"ulong" with "phys_addr_t" to make sure addresses are correct for
both the target and the host.
This set fixes compiling warnings for sandbox on 32-bit host (Ubuntu),
convert ulong to phys_addr_t for image handling. The purpose is to fix
image addresses so FIT image can be put beyond 32-bit space.
The challenge is to keep 32-bit host tool (eg mkimage) working. Using
unsigned long long as
A large chunk of the U-Boot code is its wide variety of commands. For some
applications this is not needed, since the boot can be controlled by a
board-specific hard-coded boot procedure.
Any attempt to use commands, such as running script, will result in an
error. U-Boot acts as if it supports
Dear York Sun,
In message <1456439779-4792-2-git-send-email-york@nxp.com> you wrote:
> When dealing with image addresses, ulong has been used. Some files
> are used by both host and target. It is OK for the target, but not
> always enough for host tools including mkimage. This patch replaces
Fix typo in comment about position of 'A' bit in several start.S.
Signed-off-by: Yuichiro Goto
---
arch/arm/cpu/arm1136/start.S |2 +-
arch/arm/cpu/arm1176/start.S |2 +-
arch/arm/cpu/arm920t/start.S |2 +-
arch/arm/cpu/arm926ejs/start.S |2 +-
Hi Stuart,
Please see my comments inline.
Thanks,
Minghuan
> -Original Message-
> From: Stuart Yoder [mailto:stuart.yo...@nxp.com]
> Sent: Friday, February 26, 2016 7:06 AM
> To: u-boot@lists.denx.de
> Cc: york sun ; Prabhakar Kushwaha
> ;
Hi Stuart,
Please see my comments inline.
Thanks,
Minghuan
> -Original Message-
> From: Stuart Yoder [mailto:stuart.yo...@nxp.com]
> Sent: Friday, February 26, 2016 7:06 AM
> To: u-boot@lists.denx.de
> Cc: york sun ; Prabhakar Kushwaha
> ;
These settings were used only for the PH1-sLD3 and older SoCs. The
PH1-LD4 and newer one just ignore them because their DDR-PHY take
care of such timing parameters instead.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-ph1-ld4.c | 27
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-ph1-ld4.c | 6 --
arch/arm/mach-uniphier/dram/umc-ph1-pro4.c | 6 --
arch/arm/mach-uniphier/dram/umc-ph1-sld8.c | 6 --
arch/arm/mach-uniphier/dram/umc-regs.h | 23
Rename the variable that contains the base address for consistency.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-ph1-ld4.c | 44 +++---
arch/arm/mach-uniphier/dram/umc-ph1-pro4.c| 54 -
Move frequency-dependent register settings to arrays for clean-up.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-ph1-ld4.c | 79 +--
1 file changed, 55 insertions(+), 24 deletions(-)
diff --git
The if-else statements for the frequency-dependent register settings
seem clumsy. Moving them to arrays would make it cleaner.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/ddrphy-ph1-ld4.c | 70
1 file changed, 40
The DDR PHY settings no longer depend on the DRAM size. Drop the
argument from the init function.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/ddrphy-ph1-ld4.c | 3 +--
arch/arm/mach-uniphier/dram/ddrphy-regs.h| 3 +--
Currently, a dummy value is defined for the UMC_SPCCTLA register
when the DRAM size is zero. This seems weird because the controller
does not need setting in the first place if the size is zero.
Also, redefine enum dram_size to represent the DRAM size per 16-bit
unit. This makes things simpler
Move frequency-dependent register settings to arrays for clean-up.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-ph1-sld8.c | 37 +++---
1 file changed, 29 insertions(+), 8 deletions(-)
diff --git
These macros are no longer used. These base addresses are
SoC-dependent, so they should not be placed in the header.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-regs.h | 11 ---
1 file changed, 11 deletions(-)
diff --git
Now these three are almost the same. The only difference is the DTPR1
register dependency on the DRAM size, but it can be ignored. (It has
already been ignored in PH1-sLD8 and PH1-Pro4.)
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/Makefile
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-ph1-pro4.c| 2 +-
arch/arm/mach-uniphier/dram/umc-proxstream2.c | 8
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-uniphier/dram/umc-ph1-pro4.c
These settings control the clocks around the memory controller.
The debug ability is unneeded once it works properly.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-ph1-pro4.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-proxstream2.c | 33 +--
1 file changed, 11 insertions(+), 22
Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-ph1-sld8.c | 83 --
1 file changed, 43 insertions(+), 40
This function is unused.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-regs.h | 9 -
1 file changed, 9 deletions(-)
diff --git a/arch/arm/mach-uniphier/dram/umc-regs.h
b/arch/arm/mach-uniphier/dram/umc-regs.h
index a6957a4..b33e2da
Add a field to distinguish DDR3+ from (standard) DDR3. It also
allows to delete CONFIG_DDR_STANDARD (this is not a software
configuration, but a board attribute).
Default DDR3 spec for each SoC:
PH1-LD4, PH1-sLD8: DDR3+
Others: DDR3
Signed-off-by: Masahiro Yamada
Currently, DRAM size is converted twice:
size in byte -> size in Gbit -> enum
Optimize the code by converting the "size in byte" into enum directly.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-ph1-ld4.c | 14 +++---
Masahiro Yamada (21):
ARM: uniphier: remove unused umc_polling()
ARM: uniphier: rework struct uniphier_board_data
ARM: uniphier: optimize ProXstream2 UMC init code with "for" loop
ARM: uniphier: use pr_err() where possible
ARM: uniphier: refactor UMC init code for ProXstream2
ARM:
Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-ph1-ld4.c | 90 +--
1 file changed, 49 insertions(+), 41
Now this code can be re-written with a "for" statement instead of
calling the same function multiple times.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-ph1-pro4.c | 114 +++--
1 file changed, 59 insertions(+), 55
Support DDR3-1600 / 512MB DDR size.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/dram/umc-ph1-sld8.c | 46 ++
1 file changed, 40 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-uniphier/dram/umc-ph1-sld8.c
This commit reworks "struct uniphier_board_data" with an array of
DRAM channel data in it. It will allow further cleanups by means of
"for" statements that iterate over the DDR channels.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/bcu/bcu-ph1-ld4.c
Command parsing and processing code is not needed when the command line is
disabled. Remove this code in that case.
Signed-off-by: Simon Glass
---
cmd/help.c | 4
common/cli.c | 17 -
common/command.c | 6 ++
3 files changed, 26
Some features are only useful or meaningful when the command line is
present. Ensure that these features are not compiled in when CONFIG_CMDLINE
is not enabled.
Signed-off-by: Simon Glass
---
include/config_fallbacks.h | 10 ++
1 file changed, 10 insertions(+)
diff
When CONFIG_CMDLINE is disabled we need to remove all the command-line
code. Most can be removed by dropping the appropriate linker lists from the
images, but sub-commands must be dealt with specially.
A simple mechanism is used to avoid 'unused static function' errors.
Signed-off-by: Simon
Normally board_run_command() will handle command processed. But if for some
reason it returns then we should hang to avoid further processing.
Signed-off-by: Simon Glass
---
common/main.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/common/main.c b/common/main.c
index
These files do not need to be compiled when CONFIG_CMDLINE is disabled.
Update the Makefile to reflect this.
Signed-off-by: Simon Glass
---
common/Makefile | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/Makefile b/common/Makefile
index
Don't try to run commands when not supported.
Signed-off-by: Simon Glass
---
arch/sandbox/cpu/start.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index 0dda4fc..969618e 100644
---
Update the link script to drop this code when not needed. This is only done
for two architectures at present.
Signed-off-by: Simon Glass
---
arch/arm/cpu/u-boot.lds | 3 +++
arch/x86/cpu/u-boot.lds | 4
2 files changed, 7 insertions(+)
diff --git
Add a new Kconfig option for the command line. This is enabled by default,
but when disabled it will remove the command line.
Signed-off-by: Simon Glass
---
README | 8
cmd/Kconfig | 12
2 files changed, 20 insertions(+)
diff --git a/README
Hi,
On 25 February 2016 at 17:49, Alexander Graf wrote:
> Based on the memory map we can determine a lot of hard coded fields of
> TCR, like the maximum VA and max PA we want to support. Calculate those
> dynamically to reduce the chance for pit falls.
>
> Signed-off-by: Alexander
On Tue, Feb 23, 2016 at 10:02:28AM +0100, Michal Simek wrote:
> Enabling this driver requires some DT changes.
> Adding DCC to root or main bus:
> dcc: dcc {
> compatible = "arm,dcc";
> u-boot,dm-pre-reloc;
> };
>
> Extend alias list to link DCC:
> serial0 =
> serial1 =
Now that everything's in place, let's add myself as the maintainer for
the efi payload support.
Signed-off-by: Alexander Graf
Reviewed-by: Simon Glass
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index
Now that we have all the bits and pieces ready for EFI payload loading
support, hook them up in Makefiles and KConfigs so that we can build.
Signed-off-by: Alexander Graf
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
v1 -> v2:
-
This is my (now very late) Christmas present for my openSUSE friends :).
U-Boot is a great project for embedded devices. However, convincing
everyone involved that only for "a few oddball ARM devices" we need to
support different configuration formats from grub2 when all other platforms
(PPC,
The EFI loader needs to maintain views of memory - general system memory
windows as well as used locations inside those and potential runtime service
MMIO windows.
To manage all of these, add a few helpers that maintain an internal
representation of the map the similar to how the EFI API later on
UEFI defines a simple boot protocol for removable media. There we should look
at the EFI (first GPT FAT) partition and search for /efi/boot/bootXXX.efi with
XXX being different between different platforms (x86, x64, arm, aa64, ...).
This patch implements a simple version of that protocol for the
To preserve all cover letter knowledge of the status on UEFI payload
support, let's add some sections to README.efi.
Signed-off-by: Alexander Graf
v3 -> v4:
- Add section about config options
- s/10kb/10KB/
---
doc/README.efi | 83
After booting has finished, EFI allows firmware to still interact with the OS
using the "runtime services". These callbacks live in a separate address space,
since they are available long after U-Boot has been overwritten by the OS.
This patch adds enough framework for arbitrary code inside of
When an EFI application runs, it has access to a few descriptor and callback
tables to instruct the EFI compliant firmware to do things for it. The bulk
of those interfaces are "boot time services". They handle all object management,
and memory allocation.
This patch adds support for the boot
Our current arm64 exception handlers all panic and never return to the
exception triggering code.
But if any handler wanted to continue execution after fixups, it would
need help from the exception handling code to restore all registers.
This patch implements that help. With this code, exception
The EFI API header is great, but missing a good chunk of function prototype,
GUID defines and enum declarations.
This patch extends it to cover more of the EFI API. It's still not 100%
complete, but sufficient enough for our EFI payload interface.
Signed-off-by: Alexander Graf
In order to execute an EFI application, we need to bridge the gap between
U-Boot's notion of executing images and EFI's notion of doing the same.
The best path forward IMHO here is to stick completely to the way U-Boot
deals with payloads. You manually load them using whatever method to RAM
and
We have a pretty nice and generic interface to ask for a specific block
device. However, that one is still based around the magic notion that
we know the driver name.
In order to be able to write fully generic disk access code, expose the
currently internal list to other source files so that they
One of the basic EFI interfaces is the console interface. Using it an EFI
application can interface with the user. This patch implements an EFI console
interface using getc() and putc().
Today, we only implement text based consoles. We also convert the EFI Unicode
characters to UTF-8 on the fly,
A EFI applications usually want to access storage devices to load data from.
This patch adds support for EFI disk interfaces. It loops through all block
storage interfaces known to U-Boot and creates an EFI object for each existing
one. EFI applications can then through these objects call
EFI uses the PE binary format for its application images. Add support to EFI PE
binaries as well as all necessary bits for the "EFI image loader" interfaces.
Signed-off-by: Alexander Graf
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Hi Marek,
On 25 February 2016 at 10:56, Marek Vasut wrote:
> On 02/25/2016 05:13 AM, Simon Glass wrote:
>> Hi,
>>
>> On 24 February 2016 at 10:43, Marek Vasut wrote:
>>>
>>> On 02/23/2016 07:38 AM, Hannes Schmelzer wrote:
On 22.02.2016 18:59, Fabio Estevam
Hi Marek,
On 25 February 2016 at 10:55, Marek Vasut wrote:
> On 02/25/2016 03:41 AM, Alison Wang wrote:
>> In general, a carriage return needs to execute before a line feed.
>> The patch is to change some serial drivers based on this rule, such
>> as serial_mxc.c, serial_pxa.c,
Hi Marek,
On Fri, Feb 26, 2016 at 1:55 AM, Marek Vasut wrote:
> On 02/25/2016 03:41 AM, Alison Wang wrote:
>> In general, a carriage return needs to execute before a line feed.
>> The patch is to change some serial drivers based on this rule, such
>> as serial_mxc.c, serial_pxa.c,
On 02.02.16 18:52, Leif Lindholm wrote:
> On Tue, Feb 02, 2016 at 03:45:12AM +0100, Alexander Graf wrote:
>> UEFI defines a simple boot protocol for removable media. There we should look
>> at the EFI (first GPT FAT) partition and search for /efi/boot/bootXXX.efi
>> with
>> XXX being different
On 02.02.16 18:49, Mark Rutland wrote:
> On Tue, Feb 02, 2016 at 03:45:01AM +0100, Alexander Graf wrote:
>> EFI uses the PE binary format for its application images. Add support to EFI
>> PE
>> binaries as well as all necessary bits for the "EFI image loader" interfaces.
>>
>> Signed-off-by:
On 02.02.16 15:47, Leif Lindholm wrote:
> On Tue, Feb 02, 2016 at 03:45:02AM +0100, Alexander Graf wrote:
>> When an EFI application runs, it has access to a few descriptor and callback
>> tables to instruct the EFI compliant firmware to do things for it. The bulk
>> of those interfaces are
By now the code to only have a single page table level with 64k page
size and 42 bit address space is no longer used by any board in tree,
so we can safely remove it.
To clean up code, move the layerscape mmu code to the new defines,
removing redundant field definitions.
Signed-off-by: Alexander
When enable dcache on HiKey, we're running into MMC command timeouts
because our retry loop is now faster than the eMMC (or an external SD
card) can answer.
Increase the retry count to the same as the timeout value for status
reports.
The real fix is obviously to not base this whole thing on a
There's no good excuse for running with caches disabled on AArch64,
so let's just move the vexpress64 target to enable the MMU and run
with caches on.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Move tables to .c file
---
board/armltd/vexpress64/vexpress64.c | 21
Now that we have nice table driven page table creating code that gives
us everything we need, move to that.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Move mmu tables into .c file
---
arch/arm/mach-tegra/arm64-mmu.c | 132 +-
The MMU range table can vary depending on things we may only find
out at runtime. While the very simple ThunderX variant does not
change, other boards will, so move the definition from a static
entry in a header file to the board file.
Signed-off-by: Alexander Graf
---
Howdy,
Currently on arm64 there is a big pile of mess when it comes to MMU
support and page tables. Each board does its own little thing and the
generic code is pretty dumb and nobody actually uses it.
This patch set tries to clean that up. After this series is applied,
all boards except for the
Based on the memory map we can determine a lot of hard coded fields of
TCR, like the maximum VA and max PA we want to support. Calculate those
dynamically to reduce the chance for pit falls.
Signed-off-by: Alexander Graf
---
arch/arm/cpu/armv8/cache_v8.c| 59
Now that we have an easy way to describe memory regions and enable the MMU,
there really shouldn't be anything holding people back from running with
caches enabled on AArch64. To make sure people catch early if they're missing
on the caching fun, give them a compile error.
Signed-off-by:
The idea to generate our pages tables from an array of memory ranges
is very sound. However, instead of hard coding the code to create up
to 2 levels of 64k granule page tables, we really should just create
normal 4k page tables that allow us to set caching attributes on 2M
or 4k level later on.
When running in EL1, AArch64 knows two page table maps. One with addresses
that start with all zeros (TTBR0) and one with addresses that start with all
ones (TTBR1).
In U-Boot we don't care about the high up maps, so just disable them to ensure
we don't walk an invalid page table by accident.
The hikey runs with dcache disabled today. There really should be no reason
not to use caches on AArch64, so let's add MMU definitions and enable the
dcache.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Move tables to .c file
---
board/hisilicon/hikey/hikey.c | 21
On 23.02.16 14:07, Michal Simek wrote:
> Hi,
>
> before I comment the rest. You need to also fix gem driver because it is
> using 1MB mapping.
>
> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
> index b3821c31a91d..cf1376ce1bd7 100644
> --- a/drivers/net/zynq_gem.c
> +++
Now that we have nice table driven page table creating code that gives
us everything we need, move to that.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Move mmu tables into board file
---
arch/arm/cpu/armv8/zynqmp/cpu.c | 217 +---
From: Stuart Yoder
Remove stream ID partitioning support that has been made
obsolete by upstream device tree bindings that specify how
representing how PCI requester IDs are mapped to MSI specifiers
and SMMU stream IDs.
Signed-off-by: Stuart Yoder
From: Stuart Yoder
for all PCI devices discovered in a system:
-allocate a LUT (look-up-table) entry in that PCI controller
-allocate a stream ID for the device
-program and enable a LUT entry (maps PCI requester id to stream ID)
-set the msi-map property on the
From: Stuart Yoder
A binding for PCI nodes has been finalized specifying how PCI
device IDs can be mapped to MSI specifiers. See
Documentation/devicetree/bindings/pci/pci-msi.txt in the kernel.
For ls2080a and similar Layerscape SoCs, the MSI specifier is the stream
id.
From: Stuart Yoder
The per-PCI controller LUT (Look-Up-Table) is a 32-entry table
that maps PCI requester IDs (bus/dev/fun) to a stream ID.
This patch implements infrastructure to enable LUT initialization:
-define registers offsets
-add an index to 'struct ls_pcie' to
From: Stuart Yoder
put pci_get_hose_head() prototype in header so it is available to
external users-- allowing them to find and iterate over all pci controllers
Signed-off-by: Stuart Yoder
---
-v2
-no changes
include/pci.h |1 +
1 file
FIT image supports more than 32 bits in addresses by using #address-cell
field. Fixing 64-bit support by using this field.
Signed-off-by: York Sun
---
Changes in v5:
Split the common function into another patch.
Revise commit subject.
Update commit message as suggested
FIT image supports load address and entry address. Getting these
addresses can use a common function.
Signed-off-by: York Sun
---
Changes in v5:
New patch split from fixing load and entry address patch
Changes in v4: None
Changes in v3: None
Changes in v2: None
Enable support for PMMC the TI power processor on K2G. This processor
manages all power management related activities on the SoC and and
allows the Operating Systems on compute processors such as ARM, DSP to
offload the power logic away into the power processor.
Signed-off-by: Nishanth Menon
u-boot coding style guidance in
http://www.denx.de/wiki/U-Boot/CodingStyle clearly mentions that the
kernel doc style shall be followed for documentation in u-boot.
Current PSC documentation standard does not, so fix that.
Signed-off-by: Nishanth Menon
---
V2: no change
V1:
'#define X a | b' is better defined as '#define X (a | b)' for obvious
reasons.
Signed-off-by: Nishanth Menon
---
V2: No change
V1: https://patchwork.ozlabs.org/patch/510211/
arch/arm/mach-keystone/include/mach/psc_defs.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
These are useful for modules that need to be held in reset and are
enabled for data to be loaded on to them. Typically these are
microcontrollers or other processing entities in the system.
Signed-off-by: Nishanth Menon
---
V2: no change
V1:
On 02/24/2016 05:44 AM, Sriram Dash wrote:
> Enables usb device-tree fixup code to incorporate xhci controller
>
> Signed-off-by: Ramneek Mehresh
> Signed-off-by: Sriram Dash
> ---
> board/freescale/common/Makefile | 4 +++-
>
On 02/25/2016 03:41 AM, Alison Wang wrote:
> In general, a carriage return needs to execute before a line feed.
> The patch is to change some serial drivers based on this rule, such
> as serial_mxc.c, serial_pxa.c, serial_s3c24x0.c and usbtty.c.
>
> Signed-off-by: Alison Wang
Hi Tom
On Thursday 25 February 2016 09:00 PM, Simon Glass wrote:
> Hi Mugunthan,
>
> On 25 February 2016 at 02:34, Mugunthan V N wrote:
>> On Wednesday 24 February 2016 09:50 PM, Tom Rini wrote:
>>> On Wed, Feb 03, 2016 at 05:29:36PM +0530, Mugunthan V N wrote:
>>>
Hi Tom,
On 25.2.2016 16:27, Tom Rini wrote:
> On Wed, Feb 24, 2016 at 08:34:16AM +0100, Michal Simek wrote:
>
>> Remove ARM Debug communication channel driver from the list
>> of not converted drivers to DM.
>>
>> Signed-off-by: Michal Simek
>
> Applied to
When running in EL1, AArch64 knows two page table maps. One with addresses
that start with all zeros (TTBR0) and one with addresses that start with all
ones (TTBR1).
In U-Boot we don't care about the high up maps, so just disable them to ensure
we don't walk an invalid page table by accident.
Now that we have an easy way to describe memory regions and enable the MMU,
there really shouldn't be anything holding people back from running with
caches enabled on AArch64. To make sure people catch early if they're missing
on the caching fun, give them a compile error.
Signed-off-by:
Based on the memory map we can determine a lot of hard coded fields of
TCR, like the maximum VA and max PA we want to support. Calculate those
dynamically to reduce the chance for pit falls.
Signed-off-by: Alexander Graf
---
arch/arm/cpu/armv8/cache_v8.c| 59
Now that we have nice table driven page table creating code that gives
us everything we need, move to that.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Move mmu tables into .c file
---
arch/arm/mach-tegra/arm64-mmu.c | 132 +-
The MMU range table can vary depending on things we may only find
out at runtime. While the very simple ThunderX variant does not
change, other boards will, so move the definition from a static
entry in a header file to the board file.
Signed-off-by: Alexander Graf
---
By now the code to only have a single page table level with 64k page
size and 42 bit address space is no longer used by any board in tree,
so we can safely remove it.
To clean up code, move the layerscape mmu code to the new defines,
removing redundant field definitions.
Signed-off-by: Alexander
There's no good excuse for running with caches disabled on AArch64,
so let's just move the vexpress64 target to enable the MMU and run
with caches on.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Move tables to .c file
---
board/armltd/vexpress64/vexpress64.c | 21
The idea to generate our pages tables from an array of memory ranges
is very sound. However, instead of hard coding the code to create up
to 2 levels of 64k granule page tables, we really should just create
normal 4k page tables that allow us to set caching attributes on 2M
or 4k level later on.
The hikey runs with dcache disabled today. There really should be no reason
not to use caches on AArch64, so let's add MMU definitions and enable the
dcache.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Move tables to .c file
---
board/hisilicon/hikey/hikey.c | 21
Howdy,
Currently on arm64 there is a big pile of mess when it comes to MMU
support and page tables. Each board does its own little thing and the
generic code is pretty dumb and nobody actually uses it.
This patch set tries to clean that up. After this series is applied,
all boards except for the
When enable dcache on HiKey, we're running into MMC command timeouts
because our retry loop is now faster than the eMMC (or an external SD
card) can answer.
Increase the retry count to the same as the timeout value for status
reports.
The real fix is obviously to not base this whole thing on a
Now that we have nice table driven page table creating code that gives
us everything we need, move to that.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Move mmu tables into board file
---
arch/arm/cpu/armv8/zynqmp/cpu.c | 217 +---
1 - 100 of 133 matches
Mail list logo