On 10/19/2016 10:28 PM, Prabhakar Kushwaha wrote:
> Hi York
>
>> -Original Message-
>> From: Priyanka Jain [mailto:priyanka.j...@nxp.com]
>> Sent: Wednesday, October 19, 2016 3:07 PM
>> To: u-boot@lists.denx.de
>> Cc: Priyanka Jain ; Prabhakar Kushwaha
>>
On 10/19/2016 06:01 PM, Stephen Warren wrote:
> On 10/19/2016 04:32 PM, york sun wrote:
>> On 10/19/2016 12:18 PM, Stephen Warren wrote:
>>> On 10/19/2016 09:25 AM, Stephen Warren wrote:
On 10/14/2016 02:17 PM, York Sun wrote:
> Current code turns off d-cache first, then flush all levels
On Wednesday 19 October 2016 05:20 PM, Siva Durga Prasad Paladugu wrote:
> Hi Chris,
>
>> -Original Message-
>> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Chris
>> Packham
>> Sent: Wednesday, October 19, 2016 2:06 PM
>> To: u-boot@lists.denx.de
>> Cc: Jagan Teki
This commit is needed to properly support the 8-bits ECC configuration
with 4KB pages.
When pages larger than 2 KB are used on platforms using the PXA3xx
NAND controller, the reading/programming operations need to be split
in chunks of 2 KBs or less because the controller FIFO is limited to
about
When 2 commands are submitted in a row, and the second is very quick,
the completion of the second command might never come. This happens
especially if the second command is quick, such as a status read
after an erase
Cc: Robert Jarzmik
Signed-off-by: Chris Packham
Don't store struct mtd_info in struct pxa3xx_nand_host. Instead use the
one that is already part of struct nand_chip. This brings us in line
with current U-boot and Linux conventions.
Cc: Boris BREZILLON
Signed-off-by: Chris Packham
Since the pxa3xx_nand driver was added there has been a discrepancy in
pxa3xx_nand_set_sdr_timing() around the setting of tWP_min and tRP_min.
This brings us into line with the current Linux code.
Cc: Antoine Ténart
Signed-off-by: Chris Packham
When the nand is first probe, and upon the first command start, the
status bits should be cleared before the interrupts are unmasked.
Cc: Robert Jarzmik
Signed-off-by: Chris Packham
---
drivers/mtd/nand/pxa3xx_nand.c | 2 +-
1 file changed, 1
The initial buffer is used for the initial commands used to detect
a flash device (STATUS, READID and PARAM).
ONFI param page is 256 bytes, and there are three redundant copies
to be read. JEDEC param page is 512 bytes, and there are also three
redundant copies to be read. Hence this buffer
I'm looking into the NAND support for the db-88f6820-amc board. There
are a number of changes in the pxa3xx_nand driver in Linux that are
relevant (not specifically to this boards but to Armada boards in
general). Some of these changes are cleanups and some are actual bug
fixes.
I'd really
The CONFIG_MACB option is added in KConfig to be used to select
the Cadence MACB Ethernet driver, and the clock is supported.
Wenyou Yang (3):
net: Kconfig: Add CONFIG_MACB option
net: macb: Add the clock support
net: macb: Remove redundant #ifdef CONFIG_DM_ETH
drivers/net/Kconfig | 10
Hi Stephen,
On Mon, Oct 17, 2016 at 1:32 PM, Stephen Warren wrote:
> On 10/13/2016 05:46 PM, Joe Hershberger wrote:
>>
>> On Fri, Oct 14, 2016 at 1:35 AM, Stephen Warren
>> wrote:
>>>
>>> On 10/11/2016 04:48 PM, Joe Hershberger wrote:
Add CONFIG_MACB option in KConfig to be used to select the Cadence
MACB Ethernet driver.
Signed-off-by: Wenyou Yang
---
drivers/net/Kconfig | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 302c005..fc0a10f
Due to introducing the at91 clock driver, add the clock support.
Signed-off-by: Wenyou Yang
---
drivers/net/macb.c | 68 +-
1 file changed, 67 insertions(+), 1 deletion(-)
diff --git a/drivers/net/macb.c
Hi Tom,
On 19 October 2016 at 09:39, Tom Rini wrote:
>
> On Wed, Oct 19, 2016 at 09:36:52AM -0600, Stephen Warren wrote:
> > On 10/18/2016 08:41 PM, Simon Glass wrote:
> > >Hi Stephen,
> > >
> > >On 18 October 2016 at 17:33, Stephen Warren wrote:
> >
On 10/19/2016 09:39 AM, Tom Rini wrote:
On Wed, Oct 19, 2016 at 09:36:52AM -0600, Stephen Warren wrote:
On 10/18/2016 08:41 PM, Simon Glass wrote:
Hi Stephen,
On 18 October 2016 at 17:33, Stephen Warren wrote:
On 10/18/2016 05:08 PM, Simon Glass wrote:
Hi Stephen,
On 10/19/2016 05:19 PM, Jagan Teki wrote:
> On Wed, Oct 19, 2016 at 8:18 PM, Marek Vasut wrote:
>> On 10/19/2016 04:41 PM, Jagan Teki wrote:
>>> On Wed, Oct 19, 2016 at 10:10 AM, Vignesh R wrote:
Hi,
On Tuesday 18 October 2016 05:15 PM, Marek Vasut
Hi York
> -Original Message-
> From: Priyanka Jain [mailto:priyanka.j...@nxp.com]
> Sent: Wednesday, October 19, 2016 3:07 PM
> To: u-boot@lists.denx.de
> Cc: Priyanka Jain ; Prabhakar Kushwaha
>
> Subject: [PATCH 1/5] armv8: lsch3: Use
On Wed, Oct 19, 2016 at 09:36:52AM -0600, Stephen Warren wrote:
> On 10/18/2016 08:41 PM, Simon Glass wrote:
> >Hi Stephen,
> >
> >On 18 October 2016 at 17:33, Stephen Warren wrote:
> >>On 10/18/2016 05:08 PM, Simon Glass wrote:
> >>>
> >>>Hi Stephen,
> >>>
> >>>On 18
On 10/18/2016 08:41 PM, Simon Glass wrote:
Hi Stephen,
On 18 October 2016 at 17:33, Stephen Warren wrote:
On 10/18/2016 05:08 PM, Simon Glass wrote:
Hi Stephen,
On 18 October 2016 at 16:54, Stephen Warren wrote:
On 10/18/2016 01:56 PM, Simon
Hi Simon,
2016-10-06 1:09 GMT+09:00 Simon Glass :
> Hi Masahiro,
>
> On 4 October 2016 at 21:27, Masahiro Yamada
> wrote:
>> Hi Simon,
>>
>> 2016-10-05 0:37 GMT+09:00 Simon Glass :
>>
diff --git a/common/image-fdt.c
On 10/19/2016 04:32 PM, york sun wrote:
On 10/19/2016 12:18 PM, Stephen Warren wrote:
On 10/19/2016 09:25 AM, Stephen Warren wrote:
On 10/14/2016 02:17 PM, York Sun wrote:
Current code turns off d-cache first, then flush all levels of cache.
This results data loss. As soon as d-cache is off,
On 10/19/2016 09:31 AM, Alexander Graf wrote:
> The efi loader code has its own memory map, so it needs to be aware where
> the spin tables are located, to ensure that no code writes into those
> regions.
>
> Signed-off-by: Alexander Graf
> ---
>
Remove the redundant #ifdef CONFIG_DM_ETH/#endif.
Signed-off-by: Wenyou Yang
---
drivers/net/macb.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index 0628ff5..72cf9c3 100644
--- a/drivers/net/macb.c
+++
On 10/19/2016 09:31 AM, Alexander Graf wrote:
> Most new systems in U-Boot these days make use of the generic "distro"
> framework which allows a user to have U-Boot scan for a bootable OS
> on all available media types.
>
> This patch extends the LS2080ARDB board to use that framework if the
>
On 10/19/2016 12:18 PM, Stephen Warren wrote:
> On 10/19/2016 09:25 AM, Stephen Warren wrote:
>> On 10/14/2016 02:17 PM, York Sun wrote:
>>> Current code turns off d-cache first, then flush all levels of cache.
>>> This results data loss. As soon as d-cache is off, the dirty cache
>>> is discarded
From: Stephen Warren
SoC-specific logic may be required for all forms of cache-wide
operations; invalidate and flush of both dcache and icache (note that
only 3 of the 4 possible combinations make sense, since the icache never
contains dirty lines). This patch adds an
From: Stephen Warren
nvtboot_boot_x0 is a 64-bit variable and hence must be 64-bit aligned.
So far this has happened by accident! Fix the code so this is guaranteed.
This fixes the following build error:
... relocation truncated to fit: R_AARCH64_LDST64_ABS_LO12_NC
From: Stephen Warren
When performing a cache disable function, code must not access DRAM.
That is because when the cache is disabled, it will be bypassed and all
loads and stores will be serviced by RAM. This prevents accessing any
dirty data in the cache. In turn, this means
From: Stephen Warren
An SMC call is required for all cache-wide operations on Tegra186. This
patch implements the two missing hooks now that U-Boot supports them, and
fixes the mapping of "hook name" to SMC call code.
Signed-off-by: Stephen Warren
---
On 10/19/2016 12:29 PM, Joe Hershberger wrote:
Hi Stephen,
On Mon, Oct 17, 2016 at 1:32 PM, Stephen Warren wrote:
On 10/13/2016 05:46 PM, Joe Hershberger wrote:
On Fri, Oct 14, 2016 at 1:35 AM, Stephen Warren wrote:
On 10/11/2016 04:48 PM, Joe
Hi Ladislay,
>From: Ladislav Michl
>Sent: Wednesday, October 19, 2016 7:50 AM
>To: Diego Dorta
>Cc: u-boot@lists.denx.de; h...@denx.de
>Subject: Re: Help with spl: zImage support in Falcon mode
>
>Hi,
>
>On Tue, Oct 18, 2016 at 04:36:54PM +, Diego Dorta wrote:
>> Hi
On Mon, Oct 17, 2016 at 05:25:52PM -0600, Stephen Warren wrote:
> From: Stephen Warren
>
> In pytest 3, runtestprotocol() may not call pytest_runtest_setup() if
> the test is skipped. That call is required to create a section for the
> test in the log file. If this is
On Mon, Oct 17, 2016 at 07:55:02PM -0600, Simon Glass wrote:
> Hi Leif,
>
> On 26 September 2016 at 19:53, Leif Lindholm wrote:
> >> Thanks for the pointer. Unfortunately that patch appears to make no
> >> differences for me. Are you able to build and send me a 64-bit
>
On Wed, Oct 19, 2016 at 04:52:50PM +, Diego Dorta wrote:
[snip]
> Yes, all these commands works fine with uImage. I understood now.
> But, how do I do to use zImage instead of uImage?
I've never used spl export as I have fdt prepared during build time.
Looking at source, zImage support is
On 09/28/2016 06:21 AM, Yuan Yao wrote:
> From: Yuan Yao
>
> Some new flash don't support bar register but use 4bytes address to
> support exceed 16MB flash size.
> So add flash flag:
> ADDR_4B
> for some flash which support 4bytes address.
>
> Signed-off-by: Yuan Yao
Hi Mohamed,
Pe 19 oct. 2016 3:57 p.m., "El-Sharkawy, Mohamed A." a
scris:
>
> Hi Eddy:
>
>
>
> I am trying to use the S32V234 EVB for Vision SDK and a camera.
>
>
>
> Do you have any basic bootloader that could help me with that?
>
Unfortunately the upstreaming work had to
On Wed, Oct 19, 2016 at 6:23 AM, Jagan Teki wrote:
> From: Jagan Teki
>
> This patch add driver model support for fec_mxc driver.
>
> Cc: Simon Glass
> Cc: Joe Hershberger
> Cc: Peng Fan
Hi Roger,
On Fri, Oct 14, 2016 at 7:24 AM, Roger Quadros wrote:
> Joe,
>
> On 02/09/16 17:53, Tom Rini wrote:
>> On Wed, Aug 24, 2016 at 03:35:49PM +0300, Roger Quadros wrote:
>>
>>> From: Mugunthan V N
>>>
>>> cpsw driver supports only selection of phy mode
On Wed, Oct 19, 2016 at 12:39 AM, Masahiro Yamada
wrote:
> Supporting shell-style wildcards for the --defconfigs option will be
> useful to run the moveconfig tool against a specific platform. For
> example, "uniphier*" in the file passed by --defconfigs option
On Wed, Oct 19, 2016 at 09:59:02AM -0600, Simon Glass wrote:
> Hi Tom,
>
> On 19 October 2016 at 09:39, Tom Rini wrote:
> >
> > On Wed, Oct 19, 2016 at 09:36:52AM -0600, Stephen Warren wrote:
> > > On 10/18/2016 08:41 PM, Simon Glass wrote:
> > > >Hi Stephen,
> > > >
> > >
On 10/18/2016 04:30 PM, Stefan Bruens wrote:
Hi,
I have started diving into the u-boot python tests. Now I have come accross
two problems:
1. I would like to access the config, specifically the paths to e.g.
build_dir, result_dir, ...
2. I would like to run and log system commands
Now while I
Hi Joe,
On Wed, Oct 19, 2016 at 4:53 PM, Jagan Teki wrote:
> From: Jagan Teki
>
> This patch add driver model support for fec_mxc driver.
>
> Cc: Simon Glass
> Cc: Joe Hershberger
> Cc: Peng Fan
On 10/19/2016 09:25 AM, Stephen Warren wrote:
On 10/14/2016 02:17 PM, York Sun wrote:
Current code turns off d-cache first, then flush all levels of cache.
This results data loss. As soon as d-cache is off, the dirty cache
is discarded according to the test on LS2080A. This issue was not
seen
Hi Diego,
On Tue, Oct 18, 2016 at 2:36 PM, Diego Dorta wrote:
> # spl export fdt ${loadaddr} - ${fdt_addr}
>XIP Invalid Image ... OK
> ERROR: booting os 'Invalid OS' (0) is not supported
> ERROR: booting os 'Invalid OS' (0) is not supported
> ERROR: booting os 'Invalid
On 10/14/2016 02:17 PM, York Sun wrote:
Current code turns off d-cache first, then flush all levels of cache.
This results data loss. As soon as d-cache is off, the dirty cache
is discarded according to the test on LS2080A. This issue was not
seen as long as external L3 cache was flushed to push
This line is shown as
depends on (ARM64 ||\302\240ARM) && OF_LIBFDT
on my Emacs. Use ASCII characters only.
Assuming it is (ARM64 || ARM), remove the redundancy.
Unlike Linux, CONFIG_ARM includes CONFIG_ARM64 in U-Boot.
Signed-off-by: Masahiro Yamada
---
On Wed, Oct 19, 2016 at 8:18 PM, Marek Vasut wrote:
> On 10/19/2016 04:41 PM, Jagan Teki wrote:
>> On Wed, Oct 19, 2016 at 10:10 AM, Vignesh R wrote:
>>> Hi,
>>>
>>> On Tuesday 18 October 2016 05:15 PM, Marek Vasut wrote:
On 10/18/2016 10:23 AM, Vignesh R
If a subsystem wasn't configured, avoid enumeration.
Signed-off-by: Emmanuel Vadot
---
api/api_storage.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/api/api_storage.c b/api/api_storage.c
index d425a9a..b5aaba1 100644
--- a/api/api_storage.c
On 10/19/2016 04:41 PM, Jagan Teki wrote:
> On Wed, Oct 19, 2016 at 10:10 AM, Vignesh R wrote:
>> Hi,
>>
>> On Tuesday 18 October 2016 05:15 PM, Marek Vasut wrote:
>>> On 10/18/2016 10:23 AM, Vignesh R wrote:
On Thursday 06 October 2016 04:49 PM, Vignesh R wrote:
On Wed, Oct 19, 2016 at 10:10 AM, Vignesh R wrote:
> Hi,
>
> On Tuesday 18 October 2016 05:15 PM, Marek Vasut wrote:
>> On 10/18/2016 10:23 AM, Vignesh R wrote:
>>>
>>>
>>> On Thursday 06 October 2016 04:49 PM, Vignesh R wrote:
If the write transaction size(write_bytes) is
Most new systems in U-Boot these days make use of the generic "distro"
framework which allows a user to have U-Boot scan for a bootable OS
on all available media types.
This patch extends the LS2080ARDB board to use that framework if the
hard coded NOR flash location does not contain a bootable
When implementing efi loader support, we can expose runtime services
for payloads. One such service is CPU reset.
This patch implements RTS CPU reset support for layerscape systems.
Signed-off-by: Alexander Graf
Reviewed-by: York Sun
---
v4 -> v5:
- Use
Some boards decided not to run ATF or other secure firmware in EL3, so
they instead run U-Boot there. The uEFI spec doesn't know what EL3 is
though - it only knows about EL2 and EL1. So if we see that we're running
in EL3, let's get into EL2 to make payloads happy.
Signed-off-by: Alexander Graf
We now have EFI support in U-Boot which worked out of the box on all systems
that I tried it on so far. Except for the LS2080ARDB. With this patch set
I can successfully boot grub2 and Linux from there on such a system - even
using PXE.
This patch set depends on the efi-next queue and the efi
The efi loader code has its own memory map, so it needs to be aware where
the spin tables are located, to ensure that no code writes into those
regions.
Signed-off-by: Alexander Graf
---
arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 6 ++
1 file changed, 6 insertions(+)
diff
The DP-DDR shouldn't be exposed as conventional memory to an OS, so let's
rather claim it's a reserved region in the EFI memory map
Signed-off-by: Alexander Graf
Reviewed-by: York Sun
---
board/freescale/ls2080ardb/ls2080ardb.c | 9 +
1 file changed, 9
On ls2080 we have a separate network fabric component which we need to
shut down before we enter Linux (or any other OS). Along with that also
comes configuration of the fabric using a description file.
Today we always stop and configure the fabric in the boot script and
(again) exit it on device
On 18/10/2016 17:46, york sun wrote:
> On 10/17/2016 02:11 AM, Alexander Graf wrote:
>>
>>
>> On 15.10.16 18:58, york sun wrote:
>>> On 10/15/2016 03:03 AM, Alexander Graf wrote:
Some systems may implemente TrustZone (EL3) in U-Boot. Those systems
reserve some memory that U-Boot is
On 10/19/2016 06:40 AM, Vignesh R wrote:
> Hi,
>
> On Tuesday 18 October 2016 05:15 PM, Marek Vasut wrote:
>> On 10/18/2016 10:23 AM, Vignesh R wrote:
>>>
>>>
>>> On Thursday 06 October 2016 04:49 PM, Vignesh R wrote:
If the write transaction size(write_bytes) is not a multiple of word
On 10/19/2016 06:40 AM, Vignesh R wrote:
> Hi,
>
> On Tuesday 18 October 2016 05:15 PM, Marek Vasut wrote:
>> On 10/18/2016 10:23 AM, Vignesh R wrote:
>>>
>>>
>>> On Thursday 06 October 2016 04:49 PM, Vignesh R wrote:
If the write transaction size(write_bytes) is not a multiple of word
Hi,
Le 14/10/2016 à 15:40, Tom Rini a écrit :
On Fri, Oct 14, 2016 at 11:13:11AM +0200, Guillaume Gardet wrote:
Hi,
Le 14/10/2016 à 01:00, Joe Hershberger a écrit :
On Fri, Oct 14, 2016 at 12:52 AM, Simon Glass wrote:
Hi Tom,
On 13 October 2016 at 13:11, Tom Rini
On Wed, Oct 19, 2016 at 11:18:00AM +0800, Bin Meng wrote:
> Hi Tom,
>
> On Tue, Oct 18, 2016 at 9:35 PM, Tom Rini wrote:
> > On Tue, Oct 18, 2016 at 09:19:59AM -0400, Tom Rini wrote:
> >> On Tue, Oct 18, 2016 at 10:36:41AM +0800, Bin Meng wrote:
> >> > Hi Tom,
> >> >
> >> >
Hi Chris,
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Chris
> Packham
> Sent: Wednesday, October 19, 2016 2:06 PM
> To: u-boot@lists.denx.de
> Cc: Jagan Teki ; Chris Packham
>
> Subject: [U-Boot] [RFC
From: Jagan Teki
Some I2C bus devicetree nodes, doesn't require to have
gpio pinctrl so replace the dev_info to debug so the
print never comes on the console and for bus that uses
gpio pinctrl anyway have dev_err.
Before:
--
U-Boot> i2c dev 1
Setting bus to 1
i2c
From: Jagan Teki
Add I2C support for Engicam i.CoreM6 qdl board.
icorem6qdl> i2c bus
Bus 0: i2c@021a
Bus 1: i2c@021a4000
Bus 2: i2c@021a8000
icorem6qdl> i2c dev 2
Setting bus to 2
icorem6qdl> i2c speed 10
Setting bus speed to 10 Hz
icorem6qdl> i2c
Added kconfig for SYS_I2C_MXC driver.
Cc: Stefano Babic
Cc: Heiko Schocher
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
drivers/i2c/Kconfig | 8
1
From: Jagan Teki
Better to print the hex value for bus address instead of
decimal, for more readbility on bus addressing.
Before:
--
U-Boot> i2c dev 1
Setting bus to 1
i2c bus 1 at 35274752, no gpio pinctrl state.
After:
--
U-Boot> i2c dev 1
Setting bus to 1
This patch adds support for the PDU001 board.
Signed-off-by: Felix Brack
---
arch/arm/Kconfig | 1 +
arch/arm/cpu/armv7/am33xx/Kconfig | 9 ++
board/eets/pdu001/Kconfig | 66 ++
board/eets/pdu001/MAINTAINERS | 6 +
From: Jagan Teki
This series add I2C support for i.CoreM6 and it is on top of [1]
with u-boot-imx/master branch.
[1] [PATCH v7 00/21] imx6: Add Engicam i.CoreM6 QDL support
Jagan Teki (4):
i2c: Kconfig: Add SYS_I2C_MXC entry
i2c: mxc: Print hex instead of
Core hang occurs when using L1 stashes. Workaround is to disable L1
stashes so software uses L2 cache for stashes instead.
Reviewed-by: Chris Packham
Cc: York Sun
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4 +++-
Timer base address has been changed from LS2080A SoC to
new SoCs like LS2088A, LS1088A.
Use SVR based timer base address detection to avoid compile time #ifdef.
Signed-off-by: Priyanka Jain
Signed-off-by: Prabhakar Kushwaha
---
From: Priyanka Jain
LS2088A is similar to LS2080A SoC with some differences like
1)Timer controller offset is different
2)It has A72 cores
3)Process to release secondary cores is different
4)LS2088A SoC has TZASC controller
In preparation of using same binary for
TZASC registers like TZASC_GATE_KEEPER, TZASC_REGION_ATTRIBUTES
are 32-bit regsiters.
So while doing register load-store operations, 32-bit intermediate
register, w0 should be used.
Update x0 register to w0 register type.
Signed-off-by: Priyanka Jain
---
LS2080 SoC and its personalities does not support TZASC
But other new SoCs like LS2088A, LS1088A supports TASC
Hence, skip initializing TZASC for Ls2080A based on SVR
Signed-off-by: Priyanka Jain
---
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 19
The QorIQ LS2088A SoC is built on layerscape architecture.
It is similar to LS2080A SoC with some differences like
1)Timer controller offset is different
2)It has A72 cores
3)It supports TZASC module
Signed-off-by: Priyanka Jain
---
NXP ARMv8 SoC LS2080A release all secondary cores in one-go.
But other new SoCs like LS2088A, LS1088A release secondary
cores one by one to avoid power spike.
Update code to release secondary cores based on SoC SVR
Add code to release cores one by one for non LS2080A SoCs
Signed-off-by: Priyanka
Hello,
I'm trying to use AT91SAM9G25-EK board for machine learning. One of the
reasons I chose this board, besides it targeting ARM9 which was my focus,
is that is has 1GB of RAM.
I've used the following guide to setup a Debian installation:
https://eewiki.net/display/linuxonarm/AT91SAM9x5
The
This NIC is similar to the designware nic, however it has different
registers and descriptors, hence the new driver.
Signed-off-by: Nathan Sullivan
---
drivers/net/Kconfig | 19 ++
drivers/net/Makefile | 1 +
drivers/net/dwc_eth_qos.c | 773
Hi,
I'm trying to boot an A33 tablet , i buy sdcard breakout and enable sd card
uart in .config
using (UART0 on MicroSD breakout board).
I used q8_a33_tablet_1024x600_defconfig as base.
I read serial port output from BOOT0 and finally "eraly jump fel" message so
i'm sure sdcard breakout
From: Jagan Teki
Add FEC dts support for Engicam i.CoreM6 dql modules.
Cc: Stefano Babic
Cc: Matteo Lisi
Cc: Michael Trimarchi
Acked-by: Joe Hershberger
Signed-off-by:
From: Jagan Teki
Use CONFIG_DM_ETH and remove board_eth_init code
from board files.
Cc: Joe Hershberger
Cc: Peng Fan
Cc: Stefano Babic
Cc: Michael Trimarchi
Acked-by: Joe
From: Jagan Teki
This patch add driver model support for fec_mxc driver.
Cc: Simon Glass
Cc: Joe Hershberger
Cc: Peng Fan
Cc: Stefano Babic
Cc: Michael Trimarchi
From: Jagan Teki
- Remove exctra space
- Add space
- Add tab space
- Fix single line comments quotes
- Fix 'CHECK: Avoid CamelCase'
- Fix 'CHECK: Alignment should match open parenthesis'
- Fix 'WARNING: line over 80 characters'
- Re-arrage header include files
Cc:
From: Jagan Teki
This series convert fec_mxc to DM and tested both dm and
non-dm code and it is on top of [1] with u-boot-imx/master
branch.
Changes for v7:
- Remove fec_set_dev_name in dm probe
Changes for v6:
- Add Acked-by tags in commit message
Changes for v5:
fec_get_hwaddr never used eth_device argument, hence removed.
Cc: Simon Glass
Cc: Peng Fan
Cc: Stefano Babic
Cc: Michael Trimarchi
Acked-by: Joe Hershberger
Signed-off-by: Jagan Teki
Hi,
On Tue, Oct 18, 2016 at 04:36:54PM +, Diego Dorta wrote:
> Hi all,
>
> According to commit log:
>
> commit 431889d6ad9a39846636716478d504aa7ff976fc
> Author: Ladislav Michl
> Date: Tue Jul 12 20:28:14 2016 +0200
>
> spl: zImage support in Falcon mode
>
SPI chips with >16MB capacity use 4-byte addressing to allow
accessing beyond 16MB. When the size of the SPI flash exceeds 16MB
switch to using 4 byte addressing.
Signed-off-by: Chris Packham
---
Changes in v2:
- automatically detect when 4 byte addressing is needed.
On 19/10/2016 10:07, Bin Meng wrote:
> On Wed, Oct 19, 2016 at 3:21 PM, Alexander Graf wrote:
>> Hi Tom,
>>
>> This is my current patch queue for efi. Please pull.
>>
>> Alex
>>
>>
>> The following changes since commit d5a815327d2c257fbba108ff46974b1c1d12fd2a:
>>
>> Prepare
On Wed, Oct 19, 2016 at 3:21 PM, Alexander Graf wrote:
> Hi Tom,
>
> This is my current patch queue for efi. Please pull.
>
> Alex
>
>
> The following changes since commit d5a815327d2c257fbba108ff46974b1c1d12fd2a:
>
> Prepare v2016.11-rc2 (2016-10-17 20:09:33 -0400)
>
> are
Hi!
Yes, i have a question about U-Boot.
Can i use U-Boot as bootloader for a proprietary operating system?
I want use bootm command and a bin file. In particular the Image kernel is
produced by mkimage command with following option:
- standalone
- uncompressed
- arm architecture
- U-Boot
Hi Simon,
On Tue, Oct 18, 2016 at 10:23:54AM -0600, Simon Glass wrote:
> Hi Maxime,
>
> On 18 October 2016 at 01:26, Maxime Ripard
> wrote:
> > Hi Simon,
> >
> > On Mon, Oct 17, 2016 at 04:17:33PM -0600, Simon Glass wrote:
> >> On 17 October 2016 at 14:50,
This delay is already cared by the callers of this function.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/clk/pll-base-ld20.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-uniphier/clk/pll-base-ld20.c
For Electro-Magnetic Compatibility.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/clk/pll-ld20.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-uniphier/clk/pll-ld20.c
b/arch/arm/mach-uniphier/clk/pll-ld20.c
index
Hi Tom,
This is my current patch queue for efi. Please pull.
Alex
The following changes since commit d5a815327d2c257fbba108ff46974b1c1d12fd2a:
Prepare v2016.11-rc2 (2016-10-17 20:09:33 -0400)
are available in the git repository at:
git://github.com/agraf/u-boot.git tags/signed-efi-next
On 18/10/2016 22:37, Simon Glass wrote:
> Hi Alex,
>
> On 18 October 2016 at 01:12, Alexander Graf wrote:
>> On 10/18/2016 04:29 AM, Simon Glass wrote:
>>>
>>> This is required for x86 and is also correct for ARM (since it is empty).
>>>
>>> Signed-off-by: Simon Glass
On 18/10/2016 22:37, Simon Glass wrote:
> Hi Alex,
>
> On 18 October 2016 at 01:14, Alexander Graf wrote:
>> On 10/18/2016 04:29 AM, Simon Glass wrote:
>>>
>>> It is useful to have a basic sanity check for EFI loader support. Add a
>>> 'bootefi hello' command which loads
On 18/10/2016 22:37, Simon Glass wrote:
> Hi Alex,
>
> On 4 October 2016 at 09:50, Alexander Graf wrote:
>>
>>
>> Am 04.10.2016 um 17:37 schrieb Simon Glass :
>>
>> Hi Alex,
>>
>> On 3 October 2016 at 21:15, Alexander Graf wrote:
>>
>>
>>
>> Am
Hi Jagan,
I am sorry for late answer.
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Jagan Teki
> Sent: 2016年9月21日 16:24
> To: Wenyou Yang
> Cc: U-Boot Mailing List ; Stephen Warren
>
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