[U-Boot] [PATCH v3 2/2] ARM: dts: at91: add dts file for sama5d4ek

Add the dts file for sama5d4ek board. The dts file is copied from the kernel, do the changes. - fix the compile warning. Signed-off-by: Wenyou Yang --- Changes in v3: - Fix the compatible of spi flash, use "spi-flash". Changes in v2: - Remove unneeded the pinctrl

[U-Boot] [PATCH v3 1/2] ARM: dts: at91: add dts files for sama5d4 Xplained

Add the dts files for sama5d4 Xplained board. The dts file is copied from the kernel, do the following changes. - add reg property for pinctrl node. - move the gpio (pioA, pioB, pioC ...) nodes from the pinctrl child's nodes to its slibling nodes. - fix the compile warning. Signed-off-by:

[U-Boot] [PATCH v3 0/2] ARM: dts: at91: add dts files for the boards of SAMA5D4

The purpose of the patchset is add the dts files for boards, sama5d4 Xplained board and sama5d4ek board. Changes in v3: - Fix the compatible of spi flash, use "spi-flash". - Fix the compatible of spi flash, use "spi-flash". Changes in v2: - Remove unneeded the pinctrl node for cs pin of spi0.

[U-Boot] [PATCH RESEND v2 2/2] spi: ti_qspi: Fix baudrate divider calculation

Fix the divider calculation logic to choose a value so that the resulting baudrate is either equal to or closest possible baudrate less than the requested value. While at that, cleanup ti_spi_set_speed(). Signed-off-by: Vignesh R --- v2: cleanup ti_spi_set_speed() a bit.

[U-Boot] [PATCH RESEND v2 1/2] ARM: dts: dra7xx: Update spi-max-frequency for qspi slave node

Update the spi-max-frequency property of m25p80 flash slave to match that of TI QSPI controller node, so that QSPI operations happen at maximum supported frequency of 76.8MHz. Signed-off-by: Vignesh R Reviewed-by: Jagan Teki --- v2: No changes

[U-Boot] [RESEND PATCH v2 2/2] ARM: at91: dt: add dts file for sama5d3 Xplained

Add the dts file for sama5d3 Xplained board. The dts files is copied from the kernel, do changes. - fix the compile warning. Signed-off-by: Wenyou Yang --- Changes in v2: None arch/arm/dts/Makefile | 3 + arch/arm/dts/at91-sama5d3_xplained.dts | 341

[U-Boot] [RESEND PATCH v2 1/2] ARM: at91: dt: add dts files for sama5d3ek board

Add the dts files for sama5d3ek board. The dts files is copied from the kernel, do changes as below. - add reg property for the pinctrl node. - move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's slibling nodes. - fix the compile warning. Signed-off-by: Wenyou Yang

[U-Boot] [RESEND PATCH v2 0/2] ARM: dts: at91: add dts files for the boards of SAMA5D3

The purpose of the patchset is add the dts files for boards, sama5d3 Xplained board and sama5d3xek board. Changes in v2: - Fix spi flash compatible using "spi-flash". Wenyou Yang (2): ARM: at91: dt: add dts files for sama5d3ek board ARM: at91: dt: add dts file for sama5d3 Xplained

[U-Boot] [PATCH v2 1/2] ARM: at91: dt: add dts files for sama5d3ek board

Add the dts files for sama5d3ek board. The dts files is copied from the kernel, do changes as below. - add reg property for the pinctrl node. - move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's slibling nodes. - fix the compile warning. Signed-off-by: Wenyou Yang

[U-Boot] [PATCH v2 2/2] ARM: at91: dt: add dts file for sama5d3 Xplained

Add the dts file for sama5d3 Xplained board. The dts files is copied from the kernel, do changes. - fix the compile warning. Signed-off-by: Wenyou Yang --- Changes in v2: None arch/arm/dts/Makefile | 3 + arch/arm/dts/at91-sama5d3_xplained.dts | 341

[U-Boot] [PATCH v2 0/2] ARM: dts: at91: add dts files for the boards of SAMA5D3

The purpose of the patchset is add the dts files for boards, sama5d3 Xplained board and sama5d3xek board. Changes in v2: - Fix spi flash compatible using "spi-flash". Wenyou Yang (2): ARM: at91: dt: add dts files for sama5d3ek board ARM: at91: dt: add dts file for sama5d3 Xplained

[U-Boot] [PATCH] fsl: serdes: fix a deadloop issue for P4080

From: Hou Zhiqiang This deadloop is introduced by commit: 71fe222 fsl: serdes: ensure accessing the initialized maps of serdes protocol deadloop detail: cpu_init_r => fsl_serdes_init => p4080_erratum_serdes_a005 => is_serdes_configured => fsl_serdes_init Signed-off-by:

Re: [U-Boot] [PATCH v5 01/21] sf: Adopt flash table INFO macro from Linux

On Sunday 30 October 2016 11:16 PM, Jagan Teki wrote: [...] > + {"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL | > WR_QPP) }, > + {"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024,64, RD_FULL | > WR_QPP) }, > + {"S25FL064P", INFO(0x010216, 0x4d00,

Re: [U-Boot] [PATCH 0/6] Add ARMv8 PSCI framework

Thanks Tom. I am sending out an updated v2 soon, with the related configs updated. On Fri, Oct 28, 2016 at 9:30 PM, Tom Rini wrote: > On Wed, Sep 28, 2016 at 03:16:38PM +0800, Hongbo Zhang wrote: >> On Wed, Sep 28, 2016 at 1:23 AM, Tom Rini wrote: >> > On

Re: [U-Boot] [PATCH v5 1/2] armv8/fsl-layerscape: fdt: fixup LS1043A rev1 GIC node

Hi york: Best Regards Wenbin Song > -Original Message- > From: york sun > Sent: Friday, October 28, 2016 11:40 PM > To: Wenbin Song ; albert.u.b...@aribaud.net; > Mingkai Hu ; u-boot@lists.denx.de > Subject: Re: [PATCH v5 1/2]

[U-Boot] [PATCH V2 2/4] mx6: ddr: pass mx6_ddr_sysinfo to calibration routines

The DDR calibration routines have scattered support for bus widths other than 64-bits: -- The mmdc_do_write_level_calibration() routine assumes the presence of PHY1, and -- The mmdc_do_dqs_calibration() routine tries to determine whether one or two DDR PHYs are active by reading MDCTL. Since a

[U-Boot] [PATCH V2 3/4] mx6: ddr: add routine to return DDR calibration data

Add routine mmdc_read_calibration() to return the output of DDR calibration. This can be used for debugging or to aid in construction of static memory configuration. This routine will be used in a subsequent patch set adding a virtual "mx6memcal" board, but could also be useful when gathering

[U-Boot] [PATCH V2 4/4] ARM: mx6: ddr: use Kconfig for inclusion of DDR calibration routines

The DDR calibration routines are gated by conditionals for the i.MX6DQ SOCs, but with the use of the sysinfo parameter, these are usable on at least i.MX6SDL and i.MX6SL variants with DDR3. Also, since only the Novena board currently uses the dynamic DDR calibration routines, these routines waste

[U-Boot] [PATCH V2 0/4] mx6: ddr: updates for dynamic DDR calibration

This set of patches updates the interface to the DDR calibration in preparation for the addition of a pseudo-board for calibration on i.MX6. The first patch fixes an ommission in the use of the DG_CMP_CYC flag in register MPDGCTRL0. The second patch cleans up the handling of bus widths by

[U-Boot] [PATCH V2 1/4] mx6: ddr: allow 32 cycles for DQS gating calibration

The DDR calibration code is only setting flag DG_CMP_CYC (DQS gating sample cycle) for the first PHY. Set the 32-cycle flag for both PHYs and clear when done so the MPDGCTRL0 output value isn't polluted with calibration artifacts. Signed-off-by: Eric Nelson Reviewed-by: Marek

Re: [U-Boot] [PATCH] ARM: mx6: ddr: use Kconfig for inclusion of DDR calibration routines

Thanks Marek, On 10/30/2016 01:03 PM, Marek Vasut wrote: > On 10/30/2016 08:20 PM, Eric Nelson wrote: >> The DDR calibration routines are gated by conditionals for the >> i.MX6DQ SOCs, but with the use of the sysinfo parameter, these >> are usable on at least i.MX6SDL and i.MX6SL variants with

Re: [U-Boot] S5PV210 boot problem

Any suggestions? Should I provide more information? On ۱۶/۱۰/۰۱ 02:55, nader last wrote: Good day, I have a custom HW around an s5pv210 soc. It's based on mini210 board and uses u-boot v1.3.4 as its bootloader. I want to use a newer version of u-boot to boot my HW. AFAIK in recent version

Re: [U-Boot] [PATCH] ARM: mx6: ddr: use Kconfig for inclusion of DDR calibration routines

On 10/30/2016 08:20 PM, Eric Nelson wrote: > The DDR calibration routines are gated by conditionals for the > i.MX6DQ SOCs, but with the use of the sysinfo parameter, these > are usable on at least i.MX6SDL and i.MX6SL variants with DDR3. > > Also, since only the Novena board currently uses the

Re: [U-Boot] [PATCH 3/3] mx6: ddr: add routine to return DDR calibration data

On 10/30/2016 08:14 PM, Eric Nelson wrote: > Hi Marek, Hi! > On 10/30/2016 10:30 AM, Marek Vasut wrote: >> On 10/30/2016 06:19 PM, Eric Nelson wrote: >>> Add routine mmdc_read_calibration() to return the output of DDR >>> calibration. This can be used for debugging or to aid in construction >>>

Re: [U-Boot] [Resend PATCH] tools: imximage: use 'new style' header length for imximage v1

Thus wrote Martin Kaiser (li...@kaiser.cx): > Resending this patch after one month of silence. Is there anything I can do to > get this reviewed? My tests haven't shown any problems so far. I just saw that the patch doesn't apply to master any more. I'll check this and send an updated version.

[U-Boot] [Resend PATCH] tools: imximage: use 'new style' header length for imximage v1

From: Martin Kaiser We can use the same mechanism for the imximage v1 header length calculations that we're using for v2. Doing so, we can share more code between v1 and v2. Additionally, *header_size_ptr in imximage_set_header() will then have the correct value for both v1

[U-Boot] [PATCH] ARM: mx6: ddr: use Kconfig for inclusion of DDR calibration routines

The DDR calibration routines are gated by conditionals for the i.MX6DQ SOCs, but with the use of the sysinfo parameter, these are usable on at least i.MX6SDL and i.MX6SL variants with DDR3. Also, since only the Novena board currently uses the dynamic DDR calibration routines, these routines waste

Re: [U-Boot] [PATCH 3/3] mx6: ddr: add routine to return DDR calibration data

Hi Marek, On 10/30/2016 10:30 AM, Marek Vasut wrote: > On 10/30/2016 06:19 PM, Eric Nelson wrote: >> Add routine mmdc_read_calibration() to return the output of DDR >> calibration. This can be used for debugging or to aid in construction >> of static memory configuration. >> >> Signed-off-by:

[U-Boot] [PATCH v9 02/21] mtd: Add SPI-NOR core support

Some of the SPI device drivers at drivers/spi not a real spi controllers, Unlike normal/generic SPI controllers they operates only with SPI-NOR flash devices. these were technically termed as SPI-NOR controllers, Ex: drivers/spi/fsl_qspi.c The problem with these were resides at drivers/spi is

[U-Boot] [PATCH v9 21/21] dm: zynq: microzed: Enable MTD/SPI-NOR

- Enable MTD driver model - Enable cmd/mtd.c - Enable SPI-NOR - Enable MTD_ZYNQ_QSPI - Add mtd1 alias for qspinor node - Disable SPI_FLASH Log: Zynq> mtd mtd - MTD Sub-system Usage: mtd list- show list of MTD devices mtd info- show current MTD

[U-Boot] [PATCH v9 17/21] dm: mtd: Add uclass_driver.flags

Add flags for mtd-uclass driver. Signed-off-by: Jagan Teki --- drivers/mtd/mtd-uclass.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/mtd-uclass.c b/drivers/mtd/mtd-uclass.c index acbd713..5922b70 100644 --- a/drivers/mtd/mtd-uclass.c +++

[U-Boot] [PATCH v9 18/21] dm: mtd: Add post_bind

Add .post_bind on mtd-uclass driver Signed-off-by: Jagan Teki --- drivers/mtd/mtd-uclass.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/mtd-uclass.c b/drivers/mtd/mtd-uclass.c index 5922b70..8eb6e8f 100644 --- a/drivers/mtd/mtd-uclass.c +++

[U-Boot] [PATCH v9 20/21] arm: dts: zynq: Add zynq-qspinor node

Signed-off-by: Jagan Teki --- arch/arm/dts/zynq-7000.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index b618a3f..b1aa480 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++

[U-Boot] [PATCH v9 19/21] cmd: Add mtd command support

cmd/mtd.c is a generic command to access all low level MTD devices, like SPI-NOR, Parallel NOR and NAND. This is implemented based on u-boot driver model, so any new driver added for using this command must follow dm principles. Signed-off-by: Jagan Teki --- cmd/Kconfig

[U-Boot] [PATCH v9 16/21] mtd: spi-nor: Add 4-byte addresswidth support

Add 4-byte address supports, so-that SPI-NOR chips has > 16MiB should accessible. Signed-off-by: Jagan Teki --- drivers/mtd/spi-nor/m25p80.c | 1 + drivers/mtd/spi-nor/spi-nor.c | 36 include/linux/mtd/spi-nor.h | 6 +- 3 files

[U-Boot] [PATCH v9 15/21] mtd: spi-nor: zynq_qspi: Kconfig: Add MTD_ZYNQ

Add CONFIG_MTD_ZYNQ_QSPI kconfig entry Signed-off-by: Jagan Teki --- drivers/mtd/spi-nor/Kconfig | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 64d5553..4b2a5e8 100644 ---

[U-Boot] [PATCH v9 10/21] mtd: spi-nor: Kconfig: Add SPI_NOR_WINBOND entry

Added CONFIG_SPI_NOR_WINBOND kconfig entry Signed-off-by: Jagan Teki --- drivers/mtd/spi-nor/Kconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index edcc47e..3ad2b16 100644 ---

[U-Boot] [PATCH v9 14/21] mtd: spi-nor: Add zynq qspinor driver

Zynq qspinor controller is works similar way as generic spi controller with additional features that make this controller work more specific to flash chips as salve devices. Why, zynq qspi written as spi-nor controller driver. (1) dual flash: This describes two/dual memories are connected

[U-Boot] [PATCH v9 13/21] mtd: spi-nor: Kconfig: Add MTD_M25P80 entry

Add CONFIG_MTD_M25P80 kconfig entry Signed-off-by: Jagan Teki --- drivers/mtd/spi-nor/Kconfig | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 3ad2b16..64d5553 100644 ---

[U-Boot] [PATCH v9 12/21] mtd: spi-nor: Add m25p80 driver

This is MTD SPI-NOR driver for ST M25Pxx (and similar) serial flash chips which is written as MTD_UCLASS. Signed-off-by: Jagan Teki --- drivers/mtd/spi-nor/Makefile | 3 + drivers/mtd/spi-nor/m25p80.c | 217 +++ 2 files changed, 220

[U-Boot] [PATCH v9 11/21] spi: Add spi_write_then_read

Add support for SPI synchronous write followed by read, this is common interface call from spi-nor to spi drivers. Signed-off-by: Jagan Teki --- drivers/spi/spi-uclass.c | 24 include/spi.h| 20 2 files changed, 44

[U-Boot] [PATCH v9 09/21] mtd: spi-nor: Kconfig: Add SPI_NOR_SST entry

Added CONFIG_SPI_NOR_SST kconfig entry Signed-off-by: Jagan Teki --- drivers/mtd/spi-nor/Kconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 8ed4891..edcc47e 100644 --- a/drivers/mtd/spi-nor/Kconfig

[U-Boot] [PATCH v9 08/21] mtd: spi-nor: Kconfig: Add SPI_NOR_STMICRO entry

Added CONFIG_SPI_NOR_STMICRO kconfig entry Signed-off-by: Jagan Teki --- drivers/mtd/spi-nor/Kconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index d4303db..8ed4891 100644 ---

[U-Boot] [PATCH v9 07/21] mtd: spi-nor: Kconfig: Add SPI_NOR_SPANSION entry

Added CONFIG_SPI_NOR_SPANSION kconfig entry Signed-off-by: Jagan Teki --- drivers/mtd/spi-nor/Kconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index c0ca14b..d4303db 100644 ---

[U-Boot] [PATCH v9 06/21] mtd: spi-nor: Kconfig: Add SPI_NOR_MACRONIX entry

Added CONFIG_SPI_NOR_MACRONIX kconfig entry Signed-off-by: Jagan Teki --- drivers/mtd/spi-nor/Kconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 348709b..c0ca14b 100644 ---

[U-Boot] [PATCH v9 01/21] dm: mtd: Add dm mtd core ops

- Add generic dm_mtd operations - Add mtd_read|erase|write_dm - Add add_mtd_device_dm The respetive MTD_UCLASS drivers must install the hooks to these dm_mtd_ops and other core ops are act as a interface b/w drivers vs command code. Signed-off-by: Jagan Teki ---

[U-Boot] [PATCH v9 02/21] mtd: Add SPI-NOR core support

Some of the SPI device drivers at drivers/spi not a real spi controllers, Unlike normal/generic SPI controllers they operates only with SPI-NOR flash devices. these were technically termed as SPI-NOR controllers, Ex: drivers/spi/fsl_qspi.c The problem with these were resides at drivers/spi is

[U-Boot] [PATCH v9 05/21] mtd: spi-nor: Kconfig: Add SPI_NOR_MISC entry

Added CONFIG_SPI_NOR_MISC kconfig entry Signed-off-by: Jagan Teki --- drivers/mtd/spi-nor/Kconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 40cd5ba..348709b 100644 ---

[U-Boot] [PATCH v9 00/21] dm: Generic MTD Subsystem/SPI-NOR

The previous series [1] [2] are added SPI-NOR on top of mtd/spi where it bypassing DM_SPI_FLASH and use the existing mtd core (which is non-dm), I feel this is moving in a reverse direction where adding new feature with the help of non-dm mtd core support and also few of the spi drivers are not

[U-Boot] [PATCH v9 03/21] mtd: spi-nor: Kconfig: Add MTD_SPI_NOR entry

Added CONFIG_MTD_SPI_NOR kconfig entry Signed-off-by: Jagan Teki --- drivers/mtd/Kconfig | 2 ++ drivers/mtd/spi-nor/Kconfig | 14 ++ 2 files changed, 16 insertions(+) create mode 100644 drivers/mtd/spi-nor/Kconfig diff --git a/drivers/mtd/Kconfig

[U-Boot] [PATCH v9 04/21] mtd: spi-nor: Kconfig: Add MTD_SPI_NOR_USE_4K_SECTORS

Added CONFIG_MTD_SPI_NOR_USE_4K_SECTORS kconfig entry Signed-off-by: Jagan Teki --- drivers/mtd/spi-nor/Kconfig | 18 ++ 1 file changed, 18 insertions(+) diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 130b0a4..40cd5ba 100644 ---

Re: [U-Boot] Please pull u-boot-sunxi sun9i-a80-spl

On Sun, Oct 30, 2016 at 12:53:25PM +0100, Hans de Goede wrote: > Hi Tom, > > Here is another sunxi pull-req, this one is to be applied on top of the > bug-fix one I send out a few seconds ago. I'm sending this one as > a separate pull-req since it contains non-bugfix changes which were > first

Re: [U-Boot] Please pull u-boot-sunxi master

On Sun, Oct 30, 2016 at 12:52:06PM +0100, Hans de Goede wrote: > Hi Tom, > > Here is a pull request with some small sunxi cleanups / fixes > for v2016.11. > > Note I expect you to merge this after Marek's usb pull-req. If you don't > nothing will break, but you will get a whole bunch of new

Re: [U-Boot] [PATCH 1/3] mx6: ddr: allow 32 cycles for DQS gating calibration

On 10/30/2016 06:19 PM, Eric Nelson wrote: > The DDR calibration code is only setting flag DG_CMP_CYC (DQS gating sample > cycle) for the first PHY. > > Set the 32-cycle flag for both PHYs and clear when done so the MPDGCTRL0 > output value isn't polluted with calibration artifacts. > >

Re: [U-Boot] [PATCH 2/3] mx6: ddr: pass mx6_ddr_sysinfo to calibration routines

On 10/30/2016 06:19 PM, Eric Nelson wrote: > The DDR calibration routines have scattered support for bus > widths other than 64-bits: > > -- The mmdc_do_write_level_calibration() routine assumes the > presence of PHY1, and > -- The mmdc_do_dqs_calibration() routine tries to determine > whether

Re: [U-Boot] [PATCH 3/3] mx6: ddr: add routine to return DDR calibration data

On 10/30/2016 06:19 PM, Eric Nelson wrote: > Add routine mmdc_read_calibration() to return the output of DDR > calibration. This can be used for debugging or to aid in construction > of static memory configuration. > > Signed-off-by: Eric Nelson Do you plan to use it or will

[U-Boot] [PATCH v5 20/21] sf: dataflash: Fix add_dataflash return logic

This patch fixed the add_dataflash return logic, so-that it can handle both jedec and older chips same as Linux. Cc: Bin Meng Cc: Simon Glass Cc: York Sun Signed-off-by: Jagan Teki --- drivers/mtd/spi/sf_dataflash.c

[U-Boot] [PATCH v5 21/21] sf: dataflash: Minor cleanups

- fix single line comments - remove unneeded spaces - ascending order of include files - rename SPI DATAFLASH to dataflash - rename SPI DataFlash to dataflash - return NULL replaced with error code Cc: Bin Meng Cc: Simon Glass Cc: York Sun

[U-Boot] [PATCH v5 19/21] sf: dataflash: Move flash id detection into jedec_probe

Flash id detection should be the first step to enumerate the connected flash on the board, once ie done checking with respective id codes locally in the driver all this should be part of jedec_probe instead of id detection and validated through flash_info{} table separatly. Cc: Bin Meng

[U-Boot] [PATCH v5 18/21] sf: dataflash: Remove unneeded spi data

dataflash doesn't require options, memory_map from spi. Cc: Bin Meng Cc: Simon Glass Cc: York Sun Signed-off-by: Jagan Teki --- drivers/mtd/spi/sf_dataflash.c | 6 +- 1 file changed, 1 insertion(+), 5

[U-Boot] [PATCH v5 17/21] spi: Remove dual flash code

Dual flash code in spi are usually take the spi controller to work with dual connected flash devices. Usually these dual connection operation's are referred to flash controller protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers.

[U-Boot] [PATCH v5 16/21] sf: Rename few local functions

spi_flash_write_bar-> write_bar spi_flash_write_bar -> read_bar spi_flash_cmd_wait_ready -> spi_flash_wait_till_ready Cc: Simon Glass Cc: Bin Meng Cc: York Sun Cc: Vignesh R Cc: Mugunthan V N Cc:

[U-Boot] [PATCH v5 15/21] sf: ids: Use small letter in ext_jedec

Use small 'd' in s25s512s ext_jedec Cc: Simon Glass Cc: Bin Meng Cc: York Sun Cc: Vignesh R Cc: Mugunthan V N Cc: Michal Simek Cc: Siva Durga Prasad Paladugu

[U-Boot] [PATCH v5 14/21] sf: ids: Use small letter's with flash name

For readability use small letter's with flash name. Cc: Simon Glass Cc: Bin Meng Cc: York Sun Cc: Vignesh R Cc: Mugunthan V N Cc: Michal Simek Cc: Siva Durga Prasad

[U-Boot] [PATCH v5 12/21] sf: Remove non-meaningful comments

Cc: Simon Glass Cc: Bin Meng Cc: York Sun Cc: Vignesh R Cc: Mugunthan V N Cc: Michal Simek Cc: Siva Durga Prasad Paladugu Signed-off-by: Jagan Teki

[U-Boot] [PATCH v5 13/21] sf: Rename sf_params.c to spi_flash_ids

spi_flash_ids.c is more meaningful name as the flash_info table structure spi_flash_info has spi_flash_ids instance. Cc: Simon Glass Cc: Bin Meng Cc: York Sun Cc: Vignesh R Cc: Mugunthan V N Cc:

[U-Boot] [PATCH v5 11/21] sf: Remove legacy idcode detection code

Since flash detection code is more mature to detect even with 6 bytes id length devices removed old code and related references. Cc: Yunhui Cui Cc: Simon Glass Cc: Bin Meng Cc: York Sun Cc: Vignesh R

[U-Boot] [PATCH v5 10/21] sf: params: Add S25FS256S_64K spi flash support

Add Spansion S25FS256S_64K spi flash to the list of spi_flash_ids. In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash

[U-Boot] [PATCH v5 07/21] sf: Add SPI_FLASH_MAX_ID_LEN

Add id length of 5 bytes numerical value to macro. Cc: Simon Glass Cc: Bin Meng Cc: York Sun Cc: Vignesh R Cc: Mugunthan V N Cc: Michal Simek Cc: Siva Durga Prasad

[U-Boot] [PATCH v5 08/21] sf: Increase max id length by 1 byte

So, now SPI_FLASH_ID_MAX_LEN is 6 bytes useful for few spansion flash families S25FS-S Cc: Simon Glass Cc: Bin Meng Cc: York Sun Cc: Vignesh R Cc: Mugunthan V N Cc: Michal Simek

[U-Boot] [PATCH v5 09/21] sf: Add INFO6 flash_info macro

INFO6 is for tabulating 6 byte flash parts, Ex: S25FS256S_64K Cc: Simon Glass Cc: Bin Meng Cc: York Sun Cc: Vignesh R Cc: Mugunthan V N Cc: Michal Simek Cc: Siva Durga

[U-Boot] [PATCH v5 06/21] sf: nr_sectors -> n_sectors

Rename nr_sectors as n_sectors to sync with Linux. Cc: Simon Glass Cc: Bin Meng Cc: York Sun Cc: Vignesh R Cc: Mugunthan V N Cc: Michal Simek Cc: Siva Durga Prasad

[U-Boot] [PATCH v5 05/21] sf: Cleanup sf_params

- Move headers froms sf_params to common header file - Removed unnecessary comment Cc: Simon Glass Cc: Bin Meng Cc: York Sun Cc: Vignesh R Cc: Mugunthan V N Cc: Michal Simek

[U-Boot] [PATCH v5 04/21] sf: Cleanup spi_flash_info{}

- Proper tabs spaces - Removed unnecessary - Added meaningful comments  Cc: Simon Glass Cc: Bin Meng Cc: York Sun Cc: Vignesh R Cc: Mugunthan V N Cc: Michal Simek Cc: Siva

[U-Boot] [PATCH v5 02/21] sf: Simplify lock ops detection code

Simplify the flash_lock ops detection code and added meaningful comment. Cc: Simon Glass Cc: Bin Meng Cc: York Sun Cc: Vignesh R Cc: Mugunthan V N Cc: Michal Simek Cc:

[U-Boot] [PATCH v5 03/21] sf: sandbox: Use JEDEC_MFR|ID in id exctract

Instead of extracting id's separately better to use JEDEC_MFR|ID for code simplicity. Cc: Simon Glass Cc: Bin Meng Signed-off-by: Jagan Teki --- drivers/mtd/spi/sandbox.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)

[U-Boot] [PATCH v5 01/21] sf: Adopt flash table INFO macro from Linux

INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes. - Add JEDEC_ID - Add JEDEC_EXT macro - Add JEDEC_MFR - spi_flash_params => spi_flash_info - params

[U-Boot] [PATCH v5 00/21] sf: Updates on flash detection

Updated spi_flash_info table in sync with Linux, and removed legacy and unsupported code. Changes for v5: - Add dataflash fixes in this series - Rebase to master Changes for v4: - Rebase to master Changes for v3: - New patches - Fix checkpatch.pl - Fix BIT positions in spi.h - Fix ti_qspi.c

[U-Boot] [PATCH 3/3] mx6: ddr: add routine to return DDR calibration data

Add routine mmdc_read_calibration() to return the output of DDR calibration. This can be used for debugging or to aid in construction of static memory configuration. Signed-off-by: Eric Nelson --- arch/arm/cpu/armv7/mx6/ddr.c| 23 +++

[U-Boot] [PATCH 0/3] mx6: ddr: updates for dynamic DDR calibration

This set of patches updates the interface to the DDR calibration in preparation for the addition of a pseudo-board for calibration on i.MX6. The first patch fixes an ommission in the use of the DG_CMP_CYC flag in register MPDGCTRL0. The second patch cleans up the handling of bus widths by

[U-Boot] [PATCH 1/3] mx6: ddr: allow 32 cycles for DQS gating calibration

The DDR calibration code is only setting flag DG_CMP_CYC (DQS gating sample cycle) for the first PHY. Set the 32-cycle flag for both PHYs and clear when done so the MPDGCTRL0 output value isn't polluted with calibration artifacts. Signed-off-by: Eric Nelson ---

[U-Boot] [PATCH 2/3] mx6: ddr: pass mx6_ddr_sysinfo to calibration routines

The DDR calibration routines have scattered support for bus widths other than 64-bits: -- The mmdc_do_write_level_calibration() routine assumes the presence of PHY1, and -- The mmdc_do_dqs_calibration() routine tries to determine whether one or two DDR PHYs are active by reading MDCTL. Since a

[U-Boot] [PATCH] README: fix typo candiate -> candidate

Signed-off-by: Jelle van der Waa --- README | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README b/README index 39a3042..7d6d4a5 100644 --- a/README +++ b/README @@ -127,7 +127,7 @@ releases in "stable" maintenance trees. Examples: U-Boot v2009.11

Re: [U-Boot] [PATCH v2 0/9] MIPS: improve start.S and add exception support

Am 03.10.2016 um 19:51 schrieb Daniel Schwierzeck: > Fix and optinmize initialization of cp0 registers. Also add > the possibilty to setup the initial stack and global data in > SRAM to provide a C environment for lowlevel_init(). This > could be used on the QCA ath79 platform to rewrite and >

Re: [U-Boot] [U-Boot, 1/2] drivers: USB: OHCI: allow compilation for 64-bit targets

On 10/30/2016 10:51 AM, André Przywara wrote: > On 29/10/16 18:42, Marek Vasut wrote: >> On 10/29/2016 02:50 PM, Hans de Goede wrote: >>> Hi, >>> >>> On 21-10-16 03:24, Andre Przywara wrote: OHCI has a known limitation of allowing only 32-bit DMA buffer addresses, so we have a lot of u32

Re: [U-Boot] [PATCH] arm: dts: Pine64: add Ethernet alias

On Sun, Oct 30, 2016 at 3:16 PM, André Przywara wrote: > On 30/10/16 08:48, Jagan Teki wrote: >> On Fri, Oct 28, 2016 at 11:21 PM, Jagan Teki wrote: >>> On Thu, Oct 27, 2016 at 2:20 AM, André Przywara >>> wrote: On

Re: [U-Boot] pull request: u-boot-uniphier/master

On Sat, Oct 29, 2016 at 05:29:12PM +0900, Masahiro Yamada wrote: > Hi Tom, > > Please pull some more UniPhier SoC updates: > - DRAM init code updates > - Misc SoC-related fixes > > > The following changes since commit 1df182ddf700de49fb4400ba67c3029278ea88e7: > > Merge branch 'master'

Re: [U-Boot] [PULL] u-boot-socfpga/master

On Sat, Oct 29, 2016 at 08:01:50PM +0200, Marek Vasut wrote: > The following changes since commit 5ac5861c4ba851b473e6a24940b412b397627d8d: > > travis-ci: Add test.py for various qemu platforms (2016-10-24 08:06:29 > -0400) > > are available in the git repository at: > >

Re: [U-Boot] [PULL] u-boot-usb/master

On Sat, Oct 29, 2016 at 08:00:57PM +0200, Marek Vasut wrote: > The following changes since commit 5ac5861c4ba851b473e6a24940b412b397627d8d: > > travis-ci: Add test.py for various qemu platforms (2016-10-24 08:06:29 > -0400) > > are available in the git repository at: > >

Re: [U-Boot] [PATCH v2 2/2] arm: Set TTB XN bit in case DCACHE_OFF for LPAE mode

On 10/30/2016 02:59 AM, Keerthy wrote: > > > On Saturday 29 October 2016 11:19 PM, Marek Vasut wrote: >> On 10/29/2016 07:47 PM, Tom Rini wrote: >>> On Sat, Oct 29, 2016 at 07:44:34PM +0200, Marek Vasut wrote: On 10/29/2016 07:41 PM, Tom Rini wrote: > On Sat, Oct 29, 2016 at 03:19:10PM

[U-Boot] Please pull u-boot-sunxi sun9i-a80-spl

Hi Tom, Here is another sunxi pull-req, this one is to be applied on top of the bug-fix one I send out a few seconds ago. I'm sending this one as a separate pull-req since it contains non-bugfix changes which were first submitted outside the merge window. The entire set of patches in this

[U-Boot] Please pull u-boot-sunxi master

Hi Tom, Here is a pull request with some small sunxi cleanups / fixes for v2016.11. Note I expect you to merge this after Marek's usb pull-req. If you don't nothing will break, but you will get a whole bunch of new compiler warnings when building the pine64_plus defconfig. The following

Re: [U-Boot] [linux-sunxi] Re: [U-Boot, 2/2] sunxi: A64: enable USB support

Hi, On 29-10-16 14:52, Hans de Goede wrote: Hi, On 21-10-16 03:24, Andre Przywara wrote: From: Amit Singh Tomar Mostly by adding MACH_SUN50I to some existing #ifdefs enable support for the the HCI0 USB host controller on the A64. Fix up some minor 64-bit hiccups on

Re: [U-Boot] [U-Boot, 1/2] drivers: USB: OHCI: allow compilation for 64-bit targets

On 29/10/16 18:42, Marek Vasut wrote: > On 10/29/2016 02:50 PM, Hans de Goede wrote: >> Hi, >> >> On 21-10-16 03:24, Andre Przywara wrote: >>> OHCI has a known limitation of allowing only 32-bit DMA buffer >>> addresses, so we have a lot of u32 variables around, which are assigned >>> to pointers

Re: [U-Boot] [PATCH] arm: dts: Pine64: add Ethernet alias

On 30/10/16 08:48, Jagan Teki wrote: > On Fri, Oct 28, 2016 at 11:21 PM, Jagan Teki wrote: >> On Thu, Oct 27, 2016 at 2:20 AM, André Przywara >> wrote: >>> On 26/10/16 19:51, Jagan Teki wrote: >>> Hi, >>> On Fri, Oct 21, 2016 at 5:41 AM, Andre

Re: [U-Boot] [PATCH] arm: dts: Pine64: add Ethernet alias

On Fri, Oct 28, 2016 at 11:21 PM, Jagan Teki wrote: > On Thu, Oct 27, 2016 at 2:20 AM, André Przywara > wrote: >> On 26/10/16 19:51, Jagan Teki wrote: >> Hi, >> >>> On Fri, Oct 21, 2016 at 5:41 AM, Andre Przywara >>> wrote:

Re: [U-Boot] [PATCH] MAINTAINERS: SUNXI: Add Jagan as Co-Maintainer

Hi Hans, On Sun, Oct 30, 2016 at 1:49 PM, Hans de Goede wrote: > Hi Jagan, > > On 29-10-16 21:26, Jagan Teki wrote: >> >> Due to the discussion from thread[1] about the Hans >> stepping down as sunix custodian, I would like to >> volunteer as a co-maintainer for sunxi and

Re: [U-Boot] [PATCH] MAINTAINERS: SUNXI: Add Jagan as Co-Maintainer

Hi Jagan, On 29-10-16 21:26, Jagan Teki wrote: Due to the discussion from thread[1] about the Hans stepping down as sunix custodian, I would like to volunteer as a co-maintainer for sunxi and discussed the same with Hans as well. [1] http://lists.denx.de/pipermail/u-boot/2016-July/259688.html

Re: [U-Boot] [linux-sunxi] Re: [PATCH 00/11] sunxi: Add full SPL support for sun9i (A80)

Hi, On 30-10-16 06:30, Chen-Yu Tsai wrote: On Sat, Oct 29, 2016 at 8:06 PM, Hans de Goede wrote: Hi, On 28-10-16 19:30, Hans de Goede wrote: Hi Chen-Yu, On 28-10-16 12:21, Chen-Yu Tsai wrote: Hi everyone, This series adds full SPL with DRAM initialization for