On Mon, 2 Jan 2017 16:30:05 -0500
Tom Rini wrote:
> On Sat, Dec 31, 2016 at 07:05:50PM +0100, Emmanuel Vadot wrote:
>
> > Add memset.S to the needed object for the API example and do not
> > hardcode powerpc as the arch for library assembly files.
> >
> > Signed-off-by: Emmanuel Vadot
>
> Thi
On Jum, 2016-12-30 at 06:14 -0600, Dinh Nguyen wrote:
>
> On 12/28/2016 12:34 AM, Chee Tien Fong wrote:
> >
> > From: Tien Fong Chee
> >
> > This patch adding the Arria10 critical hardware initialization
> > before
> > enabling console print out in spl.
> >
> > Signed-off-by: Tien Fong Chee
>
On Jum, 2016-12-30 at 20:04 +0100, Marek Vasut wrote:
> On 12/29/2016 05:54 AM, Chee, Tien Fong wrote:
> >
> > On Kha, 2016-12-29 at 00:51 +0100, Marek Vasut wrote:
> > >
> > > On 12/28/2016 07:34 AM, Chee Tien Fong wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > Enhanced
I recently ran into a probably with the UARTs on the A64. Many
Bluetooth modules (like Ampak) use the UART. The data rate of EDR BT
is 3Mb/s with about 2.1Mb/s though put. To handle this most systems
set the speed of the BT UART to 3Mb/s.
By default the Allwinner UART clock input is OSC24. When us
On 01/03/2017 10:17 AM, Jaehoon Chung wrote:
> Dear Tom,
>
> Could you pull these patches on your master branch?
> There is a patch relevant to PMIC for PR.
> I considered to make the pmic branch, but just included this patch in this PR.
> (If you want to split the PR, I will do it.)
> If there is
Dear Tom,
Could you pull these patches on your master branch?
There is a patch relevant to PMIC for PR.
I considered to make the pmic branch, but just included this patch in this PR.
(If you want to split the PR, I will do it.)
If there is an issue, let me know, plz.
The following changes since c
On 12/30/2016 11:20 PM, Masahiro Yamada wrote:
> Some MMC drivers describe operations with the DM_MMC_OPS form, but
> there are still several drivers with older implementation. We can
> not compile drivers from different groups at the same time because
> the core framework is shared with #ifdef CO
On 12/30/2016 03:30 PM, Jaehoon Chung wrote:
> It's cleaned the condes related to SDHCI host controller.
> Move the callback function into sdhci_ops structure.
> And removed the unnecessary things.
>
> My next step should be more clearly than now.
> - Support DM feature than now.
> - Make driver m
On 12/30/2016 10:41 PM, Masahiro Yamada wrote:
> Add a driver for the Cadence SD4HC SD/SDIO/eMMC Controller.
>
> Signed-off-by: Masahiro Yamada
Applied on u-boot-mmc. Thanks!
Best Regards,
Jaehoon Chung
> ---
>
> Changes in v2:
> - Remove unneeded version setting
> - Add SoC specific comp
On Thu, Dec 29, 2016 at 05:23:19AM -0500, Robert P. J. Day wrote:
> First, update the code snippet referenced in the README file. And
> since there are only two boards that override flash_cmd_reset(),
> might as well show them both.
>
> Signed-off-by: Robert P. J. Day
Applied to u-boot/master,
On Sat, Dec 31, 2016 at 05:51:27AM -0600, Adam Ford wrote:
> These boards do not and never have had ONENAND support, so let's remove it.
>
> Signed-off-by: Adam Ford
Applied to u-boot/master, thanks!
--
Tom
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Description: Digital signature
___
Hey all,
It's release day and v2017.01-rc3 is out. I'm pretty happy with the
state of my queue right now. If there's anything really urgent
outstanding still, please speak up. Otherwise I expect things to be
quiet in the tree until release, next Monday.
Thanks all!
--
Tom
signature.asc
Des
On Sat, Dec 31, 2016 at 06:33:46AM -0600, Adam Ford wrote:
> The display is done in the device tree now, and there is no need
> to pass 'display' kernel parameter any longer.
>
> Signed-off-by: Adam Ford
>
> diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
> index d66b
On Wed, Dec 28, 2016 at 06:28:33PM +0200, Uri Mashiach wrote:
> From: Dmitry Lifshitz
>
> Features supported :
>
> * Serial console
> * SPI Flash
> * MMC/SD Card
> * eMMC storage
> * SATA
> * PCA9555 - GPIO expander over I2C5 bus
> * USB
>
> Use spl alternate boot device feature to define fall
On Tue, Dec 27, 2016 at 10:36:08PM +0100, Emmanuel Vadot wrote:
> Some OS (all BSD and probably others) do not have python in /usr/bin
> but in another directory.
> It is a common usage to use /usr/bin/env python as shebang for python
> scripts so use this for binman.
>
> Signed-off-by: Emmanuel
On Wed, Dec 28, 2016 at 06:28:35PM +0200, Uri Mashiach wrote:
> From: Dmitry Lifshitz
>
> Add MAC support.
>
> Use PHY, connected to RGMII1 as a default Eth adapter,
> by appropriate setting of 'cpsw_data.active_slave'.
>
> 'cpsw_phy' env variable can override this setting.
>
> Set the MAC ad
On Wed, Dec 28, 2016 at 06:28:36PM +0200, Uri Mashiach wrote:
> Modify U-Boot default env settings.
>
> Boot sequence:
> 1. SD card boot script
> 2. SD card boot no script
> 3. SATA boot script
> 4. SATA boot no script
> 5. eMMC boot script
> 6. eMMC boot no script
>
> Signed-off-by: Uri Mashiac
On Thu, Dec 29, 2016 at 05:06:41AM -0500, Robert P. J. Day wrote:
> Signed-off-by: Robert P. J. Day
>
> diff --git a/board/intercontrol/digsy_mtc/digsy_mtc.c
> b/board/intercontrol/digsy_mtc/digsy_mtc.c
> index 37eb6c7..05d673d 100644
Applied to u-boot/master, thanks!
--
Tom
signature.asc
On Wed, Dec 28, 2016 at 06:28:34PM +0200, Uri Mashiach wrote:
> From: Dmitry Lifshitz
>
> Add PCB revision message.
> Implement board revision get_board_rev API.
>
> Signed-off-by: Dmitry Lifshitz
> Commit description update.
> Signed-off-by: Uri Mashiach
> Acked-by: Igor Grinberg
> Reviewed
On Mon, Jan 02, 2017 at 06:08:01PM +0100, Stefano Babic wrote:
> Hi Tom,
>
> please pull from u-boot-imx, thanks !
>
> The following changes since commit 3d3a74cc8c774345be7d1661b21ad41f4515:
>
> mmc: move MMC_SDHCI_IO_ACCESSORS to Kconfig (2016-12-29 13:08:17 -0500)
>
> are available in
Remove the "ifndef CONFIG_DM_I2C".
Instead, use the driver model for max8998.
Signed-off-by: Jaehoon Chung
---
Changelog on V2:
- Removes the CONFIG_DM_PMIC_MAX8998
- Fixes the typo s/max8998_pmix/max8998_pmic
board/samsung/goni/goni.c | 61 +++
1 fil
SPL from nand will print 'NAND' in boot_from_devices based on
the image_loader name, remove the extra 'NAND ' in mxs_nand_spl driver.
Original behaviour:
---
U-Boot SPL 2017.01-rc2-gf84dd8b (Jan 02 2017 - 22:24:19)
Trying to boot from NANDNAND : 512 MiB
After the fix:
Dropped becuase
- driver not used any board.
- no dm conversion.
Cc: Angelo Dureghello
Cc: Richard Retanubun
Signed-off-by: Jagan Teki
---
arch/m68k/cpu/mcf52x2/cpu_init.c | 12 --
drivers/spi/Makefile | 1 -
drivers/spi/cf_qspi.c| 354 ---
Dropped becuase
- driver and related configs not used any board.
- no dm conversion.
Cc: Heiko Schocher
Cc: Sergey Kostanbaev
Signed-off-by: Jagan Teki
---
board/cirrus/edb93xx/edb93xx.c | 98 ---
drivers/spi/Makefile | 1 -
drivers/spi/ep93xx_spi.c | 272 ---
SPL from nand will print 'NAND' in boot_from_devices based on
the image_loader name, remove the extra 'NAND ' in mxs_nand_spl driver.
After the fix:
-
U-Boot SPL 2017.01-rc2-gf84dd8b (Jan 02 2017 - 22:24:19)
Trying to boot from NANDNAND : 512 MiB
Original behaviour:
--
From: Martin Kaiser
We can use the same header length calculations for both imximage v1 and
v2. This addresses TODO comments about imximage v1 in the current code.
With this patch applied, *header_size_ptr in imximage_set_header() will
have the correct value for both imximage v1 and v2. This is
looking at another Kconfig file -- common/Kconfig -- and i find it
curious that there are a couple BOOTSTAGE config options that don't
depend on BOOTSTAGE:
config BOOTSTAGE_USER_COUNT
hex "Number of boot ID numbers available for user use"
default 20
help
This i
Some refactoring of the top-level Kconfig file which includes:
* using "if" to remove numerous identical dependency tests
* reordering config entries to group related ones
* spelling and grammar fixes
There should be no functional changes, only aesthetic ones.
Signed-off-by: Robert P. J. Day
On Sat, Dec 31, 2016 at 07:05:50PM +0100, Emmanuel Vadot wrote:
> Add memset.S to the needed object for the API example and do not
> hardcode powerpc as the arch for library assembly files.
>
> Signed-off-by: Emmanuel Vadot
This patch isn't quite correct. Not all cases of ARM will have the
opt
weird ...
config FIT_VERBOSE
bool "Display verbose messages on FIT boot"
depends on FIT
... jump to a bit lower down ...
config FIT_VERBOSE
bool "Show verbose messages when FIT images fails"
depends on FIT
help
Generally a system will ha
Hi Michal,
On Mon, Jan 2, 2017 at 6:29 AM, Michal Simek wrote:
> +Siva: please test it.
>
> On 27.12.2016 23:46, Moritz Fischer wrote:
>> Revision 1.0 of this IP has a couple of issues, such as not supporting
>> repeated start conditions for read transfers.
>>
>> So scan through the list of i2c m
Hi Michal,
On Mon, Jan 2, 2017 at 6:24 AM, Michal Simek wrote:
> On 29.12.2016 23:50, Moritz Fischer wrote:
>> For mux check if the parent is already a device of UCLASS_I2C and if yes
>> just use that. Otherwise see if someone specified an i2c-parent phandle.
>> This mimics the behavior found in
On 01/02/2017 01:07 AM, Lukasz Majewski wrote:
> Hi Marek,
>
>> On 12/30/2016 10:28 PM, Lukasz Majewski wrote:
>>> Hi Marek,
>>>
On 12/29/2016 04:26 PM, Tom Rini wrote:
> On Thu, Dec 29, 2016 at 12:41:06AM +0100, Marek Vasut wrote:
>> On 12/28/2016 09:52 AM, Lukasz Majewski wrote:
>>>
Hi Tom,
please pull from u-boot-imx, thanks !
The following changes since commit 3d3a74cc8c774345be7d1661b21ad41f4515:
mmc: move MMC_SDHCI_IO_ACCESSORS to Kconfig (2016-12-29 13:08:17 -0500)
are available in the git repository at:
git://www.denx.de/git/u-boot-imx.git master
for you to
Hi,
Am 02.01.2017 um 02:29 schrieb Jaehoon Chung:
Hi Stefan,
[snip]
Of_course, it needs to consider the base clock broken case.
The whole discussion is about the base clock broken case. Otherwise the
host->max_clk is extracted from the SDHCI_CAPABILITIES.
The linux kernel use a callback to
On Mon, Jan 2, 2017 at 5:52 PM, Stefano Babic wrote:
> On 21/12/2016 12:00, Jagan Teki wrote:
>> From: Jagan Teki
>>
>> This patchset, add support for
>> - legacy image boot, with bootm
>> - NAND boot env support, with UBIFS as rootfs
>> - FIT image boot support
>>
>> on i.MX6 based Engicam Quad/
On 16/12/2016 14:18, Fabio Estevam wrote:
> Commit c94981efa20cc58 ("udoo_neo: Remove USDHC3 support") removed
> the SDHC3 support, but missed to remove the entry from the usdhc_cfg
> structure, so just remove it.
>
> Signed-off-by: Fabio Estevam
> ---
> board/udoo/neo/neo.c | 3 +--
> 1 file c
On 02/01/2017 11:44, Fabio Estevam wrote:
> From: Fabio Estevam
>
> The standard way is to put ifdef/endif in the very first column.
>
> Signed-off-by: Fabio Estevam
> ---
> board/udoo/neo/neo.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/board/udoo/neo/neo.c
On 21/12/2016 22:14, Jagan Teki wrote:
> From: Jagan Teki
>
> Enable I2C support for Engicam GEAM6UL NAND module.
>
> Cc: Stefano Babic
> Cc: Matteo Lisi
> Cc: Michael Trimarchi
> Signed-off-by: Jagan Teki
> ---
> configs/imx6ul_geam_nand_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
On 21/12/2016 12:02, Jagan Teki wrote:
> From: Jagan Teki
>
> Add Jagan as MAINTAINERS of configs/imx6ul_geam_nand_defconfig
>
> Cc: Stefano Babic
> Cc: Matteo Lisi
> Cc: Michael Trimarchi
> Signed-off-by: Jagan Teki
> ---
> board/engicam/geam6ul/MAINTAINERS | 1 +
> 1 file changed, 1 inser
On 27/12/2016 02:04, Fabio Estevam wrote:
> From: Fabio Estevam
>
> On the MX6Q the aclk_eim_slow_podf field is '1' after POR, while on the
> MX6DQP it is '3'.
>
> This makes the EIM clock to be only 66MHz on the mx6qp variant, instead of
> 132 MHz.
>
> Instead of relying on the POR values for
On 21/12/2016 12:00, Jagan Teki wrote:
> From: Jagan Teki
>
> This patchset, add support for
> - legacy image boot, with bootm
> - NAND boot env support, with UBIFS as rootfs
> - FIT image boot support
>
> on i.MX6 based Engicam Quad/DualLite/Dual/Solo module kits.
>
> Jagan Teki (10):
> conf
On 16/12/2016 14:18, Fabio Estevam wrote:
> Commit c94981efa20cc58 ("udoo_neo: Remove USDHC3 support") removed
> the SDHC3 support, but missed to remove the entry from the usdhc_cfg
> structure, so just remove it.
>
> Signed-off-by: Fabio Estevam
> ---
> board/udoo/neo/neo.c | 3 +--
> 1 file c
On 16/12/2016 22:04, Kevin Hilman wrote:
> Enable USB gadget ethernet by default to have networking capabilities.
>
> Tested using DHCP and TFTP to transfer kernel, DT, ramdisk.
>
> Cc: Fabio Estevam
> Signed-off-by: Kevin Hilman
> ---
> Applies to v2016.11
>
> board/warp7/warp7.c | 14 ++
On 02/12/2016 06:43, Peng Fan wrote:
> The thermal drivers support i.MX6 and i.MX7, add MX7 in Kconfig file.
>
> Signed-off-by: Peng Fan
> Cc: Stefano Babic
> ---
> drivers/thermal/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/thermal/Kconfig b/driver
On 15/12/2016 23:10, Fabio Estevam wrote:
> From: Fabio Estevam
>
> 'fdtfile' is the preferred name for the variable that contains the
> device tree blob according to the README file.
>
> It also makes it consistent with other i.MX boards that use config_distro,
> so change it accordingly.
>
>
On 06/11/2016 16:37, Sven Ebenfeld wrote:
> When trying to build U-Boot for Wandboard with Secure Boot, the build fails
> because it tries to compile the dekblob commands within the SPL. The dekblob
> command depends on the CAAM driver, which is also not required in the SPL.
> Additionally, this b
On 01/01/2017 20:05, Jagan Teki wrote:
> Hi Stefano,
>
> On Thu, Dec 29, 2016 at 2:37 PM, Jagan Teki wrote:
>> Hi Stefano,
>>
>> On Wed, Dec 21, 2016 at 12:00 PM, Jagan Teki wrote:
>>> From: Jagan Teki
>>>
>>> This patchset, add support for
>>> - legacy image boot, with bootm
>>> - NAND boot en
This patch provides u-boot support for Liebherr (LWN) mccmon6 board.
Signed-off-by: Lukasz Majewski
---
Changes for v4:
- Update board/liebherr/mccmon6/MAINTAINERS entry to quiet buildman warnings
Changes for v3:
- Define CONFIG_SYS_UBOOT_START to load u-boot image from NOR to correct address
This patch provides u-boot support for Liebherr (LWN) mccmon6 board.
Signed-off-by: Lukasz Majewski
---
Changes for v3:
- Define CONFIG_SYS_UBOOT_START to load u-boot image from NOR to correct address
(so the SPL: NOR: Add CONFIG_SPL_NOR_COPY_ENTIRE_IMAGE define to enable whole
image copy from
Hi Marek,
> On 12/30/2016 10:28 PM, Lukasz Majewski wrote:
> > Hi Marek,
> >
> >> On 12/29/2016 04:26 PM, Tom Rini wrote:
> >>> On Thu, Dec 29, 2016 at 12:41:06AM +0100, Marek Vasut wrote:
> On 12/28/2016 09:52 AM, Lukasz Majewski wrote:
> > Hi Marek,
> >
> >> On 12/26/2016 05:36
On 01/01/2017 01:11 PM, Masahiro Yamada wrote:
> This series is based on commit 3d3a74cc8c.
> Each git-log describes how to re-generate it.
> Buildman test passed.
>
>
>
> Masahiro Yamada (7):
> socfpga: remove unused CONFIG option and cleanup README.socfpga
> mmc: rename CONFIG_ROCKCHIP_DWM
Hi,
separation of rk3399 SPL from ATF SPL would be worth.
Thanks,
Michal
On 29.12.2016 11:25, Kever Yang wrote:
>
> RK3399 SPL is not enable bacause of the lack of ATF support in SPL,
> after port some source code from ATF, I manage to enable the support for
> ATF in SPL. This patch set depends
On 29.12.2016 11:25, Kever Yang wrote:
> ATF(ARM Trust Firmware) is used by ARM arch64 SoCs, find more infomation
> about ATF at:
>
> SPL is consider as BL2 in ATF, it needs to load other part of ATF binary
SPL replaces BL2 in ATF
> like BL31, BL32, SCP-BL30, and BL33(U-Boot). And needs to prepa
On 27.12.2016 23:46, Moritz Fischer wrote:
> Revision 1.0 of this IP has a quirk where if during a long read transfer
> the transfer_size register will go to 0, the master will send a NACK to
> the slave prematurely.
> The way to work around this is to reprogram the transfer_size register
> mid-tra
+Siva: please test it.
On 27.12.2016 23:46, Moritz Fischer wrote:
> Revision 1.0 of this IP has a couple of issues, such as not supporting
> repeated start conditions for read transfers.
>
> So scan through the list of i2c messages for these conditions
> and report an error if they are attempted.
Hi, +Siva
do you know why this was done in this way? I know I was playing with
similar patch and using xfer function but can't remember why it was
failing.
Thanks,
Michal
On 27.12.2016 23:46, Moritz Fischer wrote:
> The generic probe code in dm works, so get rid of the leftover cruft.
>
> Signe
On 29.12.2016 23:50, Moritz Fischer wrote:
> For mux check if the parent is already a device of UCLASS_I2C and if yes
> just use that. Otherwise see if someone specified an i2c-parent phandle.
> This mimics the behavior found in the Kernel, as it removes the
> requirement to explicitly specify a i2
On 2.1.2017 15:02, Stefan Herbrechtsmeier wrote:
> Hi Michal,
>
> Am 02.01.2017 um 08:00 schrieb Michal Simek:
>> Hi,
>>
>> On 27.12.2016 11:10, Stefan Herbrechtsmeier wrote:
>>> Hi Michal,
>>>
>>> Am 28.11.2016 um 08:42 schrieb Michal Simek:
Hi, +Siva,
>>>
>>>
Moving current zynq clk d
Hi Michal,
Am 02.01.2017 um 08:00 schrieb Michal Simek:
Hi,
On 27.12.2016 11:10, Stefan Herbrechtsmeier wrote:
Hi Michal,
Am 28.11.2016 um 08:42 schrieb Michal Simek:
Hi, +Siva,
Moving current zynq clk driver to driver model shouldn't be that hard
because all should be in place. and then
On 27.12.2016 23:46, Moritz Fischer wrote:
> Reorder the timeout loop such that we first check if the
> condition is already true, and then call udelay() so if
> the condition is already true, break early.
>
> Signed-off-by: Moritz Fischer
> Cc: Heiko Schocher
> Cc: Michal Simek
> Cc: u-boot@li
i'm currently trying to wrap my head around the aspects of
converting the various u-boot subsystems to use the driver model, and
i'll do this in a number of posts so as to not have one monstrously
large post, and i'm sure i will have some truly dumb questions, so
apologies beforehand for those.
On 22.12.2016 18:36, Moritz Fischer wrote:
> The Zynq Ultrascale MP uses version 1.4 of the Cadence IP core
> which fixes some silicon bugs that needed software workarounds
> in Version 1.0 that was used on Zynq systems.
>
> Signed-off-by: Moritz Fischer
> Cc: Michal Simek
> Cc: Heiko Schocher
The ARMv8 capable Allwinner A64 SoC comes out of reset in AArch32 mode.
To run AArch64 code, we have to trigger a warm reset via the RMR register,
which proceeds with code execution at the address stored in the RVBAR
register.
If the bootable payload in the FIT image is using a different
architectu
When compiling the SPL for the Allwinner A64 in AArch64 mode, we can't
use the more compact Thumb2 encoding, which only exists for AArch32
code. This makes the SPL rather big, up to a point where any code
additions or even a different compiler may easily exceed the 32KB limit
that the Allwinner BRO
Since the SPL FIT loader can now differentiate between different
architectures, teach it how to tell arm and arm64 apart when a FIT
image is used.
We just support those two for now, as these are so far the only sensible
alternatives.
Signed-off-by: Andre Przywara
Reviewed-by: Simon Glass
Reviewe
According to Jens disabling the on-die-termination should set bit 5,
not bit 1 in the respective register. Fix this.
Reported-by: Jens Kuske
Signed-off-by: Andre Przywara
---
arch/arm/mach-sunxi/dram_sun8i_h3.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/
Now that the SPL is ready to be compiled in AArch64 and the DRAM
init code is ready, enable SPL support for the A64 SoC and in the
Pine64 defconfig.
For now we keep the boot0 header in the U-Boot proper, as this allows
to still use boot0 as an SPL replacement without hurting the SPL use
case.
We di
Fix the output of the DRAM size on AArch64 SPLs.
Signed-off-by: Andre Przywara
Reviewed-by: Alexander Graf
Reviewed-by: Simon Glass
Acked-by: Maxime Ripard
---
arch/arm/mach-sunxi/dram_sun8i_h3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/dram_sun8
At the moment we use the arch/arm directory for arm64 boards as well,
so the Makefile will pick up the "arm" name for the architecture to use
for tagging binaries in U-Boot image files.
Differentiate between the two by looking at the CPU variable being defined
to "armv8", and use the arm64 architec
From: Jens Kuske
The A64 DRAM controller is very similar to the H3 one,
so the code can be reused with some small changes.
This refactoring does not change the code size for the existing H3 part.
[Andre: rework from #ifdefs to using socid parameters in static
functions, minor fixes, merg
Read the specified "arch" value from a legacy or FIT U-Boot image and
store it in our SPL data structure.
This allows loaders to take the target architecture in account for
custom loading procedures.
Having the complete string -> arch mapping for FIT based images in the
SPL would be too big, so we
From: Jens Kuske
So far the DRAM driver for the H3 SoC (and apparently boot0/libdram as
well) only applied coarse delay line settings, with one delay value for
all the data lines in each byte lane and one value for the control lines.
Instead of setting the delays for whole bytes only allow setti
From: Philipp Tomsich
Signed-off-by: Philipp Tomsich
Signed-off-by: Andre Przywara
Acked-by: Maxime Ripard
---
arch/arm/mach-sunxi/clock_sun6i.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/clock_sun6i.c
b/arch/arm/mach-sunxi/clock_sun6i.c
index 80c
From: Philipp Tomsich
So far the MBUS priority setup was done by writing "magic" values taken
from a DRAM controller register dump after a boot0 run.
By peeking at the Linux (sic!) MBUS driver [1] from the Allwinner BSP
kernel, we learned more about the actual meaning of those bits.
Add macros an
From: Jens Kuske
The IOCR registers got renamed to BDLR to match the public
documentation of similar controllers.
Signed-off-by: Jens Kuske
Signed-off-by: Andre Przywara
---
arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h | 43 ++---
arch/arm/mach-sunxi/dram_sun8i_h3.c
To avoid enumerating the very same DRAM values in defconfig files
for each and every Allwinner A64 board out there, let's put some sane
default values in the Kconfig file.
Boards with different needs can override them at any time.
Signed-off-by: Andre Przywara
Reviewed-by: Simon Glass
Acked-by:
The Allwinner A64 SoC starts execution in AArch32 mode, and both
the boot ROM and Allwinner's boot0 keep running in this mode.
So U-Boot gets entered in 32-bit, although we want it to run in AArch64.
By using a "magic" instruction, which happens to be an almost-NOP in
AArch64 and a branch in AArch
The ENABLE_ARM_SOC_BOOT0_HOOK option is a generic option shared with
other boards. To allow alternative code to be inserted, we create
another, now function specific config symbol on top of it to simplify
later additions. No functional change at this time.
Signed-off-by: Andre Przywara
Acked-by:
For prepending some board specific header area to U-Boot images we
were so far including a header file with a macro definition containing
the actual header specification.
This works fine if there are just a few statements and if there is only
one alternative.
However adding more complex code quickl
The boot0 hook we have so far is applied _after_ the initial branch
to the "reset" entry point. An upcoming change requires even this
branch to be changed, so we apply the hook macro at the earliest
point, and have the branch in the hook file as well.
This is no functional change at this point, jus
The sunxi DRAM setup code needs an sdelay() implementation, which
wasn't defined for armv8 so far.
Shamelessly copy the armv7 version and adjust it to work in AArch64.
Signed-off-by: Andre Przywara
---
arch/arm/cpu/armv8/cpu.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/a
Since entry_point and load_addr are addresses, they should be
represented as longs to cover the whole address space and to avoid
warning when compiling the SPL in 64-bit.
Also adjust debug prints to add the 'l' specifier, where needed.
Signed-off-by: Andre Przywara
Reviewed-by: Alexander Graf
Re
tiny-printf does not know about the "l" modifier so far, which breaks
the crash dump on AArch64, because it uses %lx to print the registers.
Add an easy way of handling longs correctly.
Using a relatively decent compiler (GCC 5.3.0) this does _not_ increase
the code size of tiny-printf.o for 32-bi
The UL() macro is pretty useful in sharing constants between assembly
and C files while still being able to specify a type for C.
Move the macro from an armv8 specific header into a common header file
to be able to use it by arm code (for instance) as well.
Signed-off-by: Andre Przywara
Reviewed-
tiny-printf does not know about the "-" modifier, which aligns numbers.
This is used by some SPL code, but as it's purely cosmetical, we just
ignore this modifier here to avoid changing correct printf strings.
Signed-off-by: Andre Przywara
Reviewed-by: Simon Glass
---
lib/tiny-printf.c | 3 +++
For boards that call s_init() when the SPL runs, we are expected to
setup an early stack before calling this C function.
Implement the proper AArch64 version of this based on the ARMv7 code.
This allows sunxi boards to setup the basic peripherals even with a
64-bit SPL.
Signed-off-by: Andre Przywa
These days many Allwinner SoCs use clock_sun6i.c, although out of them
only the (original sun6i) A31 has a second MBUS clock register.
Also the requirement for setting up the PRCM PLL_CTLR1 register to provide
the proper voltage seems to be a property of older SoCs only as well.
Restrict the MBUS
The predominantely 32-bit ARM targets try to compile the SPL in Thumb
mode to reduce code size.
The 64-bit AArch64 instruction set does not know an alternative, concise
encoding, so the Thumb build option should only be set for 32-bit
targets.
Likewise -marm machine options are only valid for ARMv7
Hi,
hopefully the final version of the SPL support series for the Allwinner A64
SoC. Actually no real code changes this time, just rebased on top of recent
master, adding some comments in patches 16/26 and 19/26 following Maxime's
suggestions and adding Acked-by:s and Reviewed-by:s.
I left the fin
From: Fabio Estevam
The standard way is to put ifdef/endif in the very first column.
Signed-off-by: Fabio Estevam
---
board/udoo/neo/neo.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
index 688b522..288674a 100644
--- a/boa
Hi Konstantin, + Ken
your colleague contacted me privately regarding similar stuff and he has
DM based driver. I think you should get in touch together to discuss this.
Thanks,
Michal
On 29.12.2016 16:45, Kostya Porotchkin wrote:
> Hello,
>
> I am trying to use the new SCSI code with CONFIG_BL
New scan should unbind all block devices not to be listed again.
Without this patch if scsi reset or scan is called new block devices are
created which point to the same id and lun.
For example:
ZynqMP> scsi scan
scsi_scan: if_type=2, devnum=0: sd...@ff17.blk, 6, 0
scsi_scan: if_type=2, devnum
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