Commit 0e18f584de59 ("efi_loader: LoadImage: always allocate new pages")
ensured that whether we load an image from file or from memory we end up
with the same number of newly allocated buffers. But essentially we ended
up with one buffer too many in both cases:
efi_load_pe() copies and rebases th
Tom, Akashi,
On 18/03/19 7:29 AM, Tom Rini wrote:
> On Mon, Mar 18, 2019 at 10:57:37AM +0900, Akashi, Takahiro wrote:
>> On Sun, Mar 17, 2019 at 09:44:20PM -0400, Tom Rini wrote:
>>> On Mon, Mar 18, 2019 at 10:42:31AM +0900, Akashi, Takahiro wrote:
Hi Faiz,
On Tue, Mar 12, 2019 at 0
Hi Bin
Bin Meng 於 2019年3月20日 週三 下午3:22寫道：
>
> Hi Rick,
>
> On Tue, Mar 19, 2019 at 5:11 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > To enumerate devices on the /soc/ node, create a "simple-bus"
> > driver to match "andestech,riscv-ae350-soc".
> >
>
> Could we change the /soc/ node compatibl
On 21. 03. 19 4:50, Heiko Schocher wrote:
> Hello Michal,
>
> Am 14.03.2019 um 09:18 schrieb Michal Simek:
>> From: Siva Durga Prasad Paladugu
>>
>> This patch fixes below warnings found with checker tool.
>> The variable len in i2c_msg struct is of unsigned type
>> and it is received as recv_cou
On 3/19/19 8:23 AM, AKASHI Takahiro wrote:
> Heinrich,
>
> Do you have any comments, in particular, on patch#7 which is
> core part of my RFC?
>
> Thanks,
> -Takahiro Akashi
Hello Takahiro,
the patches are not applicable to current git master. Do you have a repo
where you have applied these patch
The following changes since commit a00d15757d7a513e410f15f2f910cb5261a3:
Merge git://git.denx.de/u-boot-marvell (2019-03-19 19:58:48 -0400)
are available in the Git repository at:
git://git.denx.de/u-boot-efi.git tags/efi-2019-04-rc5
for you to fetch changes up to d0bd87612f410a723d5ddb
Hello Wolfgang,
when fetching from git.denx.de I got:
$ git remote add efi ssh://gu-...@git.denx.de/u-boot-efi.git
$ git fetch efi
Enter passphrase for key '/home/user/.ssh/id_rsa.denx':
fatal: protocol error: expected old/new/ref, got 'want
d0bd87612f410a723d5ddb3001e805485e3efb4f side-band-64k
On Wed, Mar 20, 2019 at 6:05 PM Marek Vasut wrote:
>
> On 3/20/19 2:30 AM, Ley Foon Tan wrote:
> > On Tue, Mar 19, 2019 at 5:47 PM Marek Vasut wrote:
> >>
> >> On 3/19/19 10:46 AM, Ley Foon Tan wrote:
> >>> On Tue, Mar 19, 2019 at 5:39 PM Marek Vasut wrote:
>
> On 3/19/19 4:26 AM, Ley
Hi Tom,
On 20/03/19 8:09 PM, Tom Rini wrote:
> On Wed, Mar 20, 2019 at 07:03:52PM +0530, Lokesh Vutla wrote:
>>
>>
>> On 19/03/19 4:44 PM, Tom Rini wrote:
>>> The ISW_ENTRY_ADDR Kconfig option under mach-omap2 isn't a SoC specific
>>> notion but rather "where is our previous stage loaded in memory
Hi Keerthy,
On Tue, 19 Mar 2019 at 22:23, keerthy wrote:
>
>
>
> On 3/19/2019 6:53 AM, Simon Glass wrote:
> > Hi Keerthy,
> >
> > On Mon, 11 Mar 2019 at 14:13, Keerthy wrote:
> >>
> >> Currently single instance temperature read out is supported.
> >> Enhance the same to support multiple instance
On Tue, 19 Mar 2019 at 17:55, Philippe Reynes
wrote:
>
> The pointer checksum were used before checking that it
> isn't NULL. We move the code that use it after the check.
>
> Reported-by: Coverity (CID: 185835)
> Signed-off-by: Philippe Reynes
> ---
> lib/rsa/rsa-verify.c | 3 ++-
> 1 file chan
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- Added this patch.
---
drivers/mmc/fsl_esdhc_imx.c | 96 ++---
include/fsl_esdhc_imx.h | 4 --
2 files changed, 4 insertions(+), 96 deletions(-)
diff --git a/dr
Dropped i.MX code which couldn't be reused.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- Added this patch.
---
drivers/mmc/fsl_esdhc.c | 576 ++--
include/fsl_esdhc.h | 57
2 files changed, 15 insertions(+), 618 deletions(-)
diff --git a/d
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX
initially. The later QoriQ series PowerPC processors (which were
evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and
i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the e
Moved CONFIG_FSL_ESDHC from header files to defconfig files.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- Rebased.
---
configs/imx8mq_evk_defconfig | 1 +
configs/imx8qxp_mek_defconfig | 1 +
configs/kp_imx53_defconfig | 1 +
confi
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX
initially. The later QoriQ series PowerPC processors (which were
evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and
i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the e
Hi Simon,
Sorry, I completely missed this thread.
On Wed, Mar 20, 2019 at 7:40 PM Simon Goldschmidt
wrote:
>
> Hi Mrek,
>
> Am 15.03.2019 um 21:34 schrieb Simon Goldschmidt:
> > Am 05.03.2019 um 21:58 schrieb Marek Vasut:
> >> On 3/5/19 9:28 PM, Simon Goldschmidt wrote:
> >>> Am 04.03.2019 um 2
Hello Michal,
Am 14.03.2019 um 09:18 schrieb Michal Simek:
From: Siva Durga Prasad Paladugu
This patch fixes below warnings found with checker tool.
The variable len in i2c_msg struct is of unsigned type
and it is received as recv_count which is unsigned type
but it is checked with < 0 which i
On 20/03/19 11:05 PM, Peter Robinson wrote:
> On Fri, Mar 8, 2019 at 6:34 PM Jagan Teki wrote:
>>
>> On Fri, Mar 8, 2019 at 11:32 PM Peter Robinson wrote:
>>>
>>> Hey Tom and Jagan,
>>>
Hey all,
So it's release day and I've put up v2019.04-rc3, I've updated git and
the tarba
On 3/19/19 10:19 AM, Ismael Luceno Cortes wrote:
> Drop the counter, it has no meaning other than being the order in which
> the interface is found; the name assigned to the USB host controller
> interface is a better indicator.
>
> Example of the original output:
>> USB0: USB EHCI 1.10
>> scann
On 3/20/19 9:15 PM, Dalon Westergreen wrote:
> From: Dalon Westergreen
>
> The sfp file is only valid for Gen5 (Cyclone5 & Arria5) and Arria10
> devices. The file should only be built for these devices.
>
> Signed-off-by: Dalon Westergreen
> ---
> Changes from v1:
> -> Remove duplicate entrie
On 3/20/19 8:52 PM, Alex Kiernan wrote:
> If CONFIG_SPL_FIT_SIGNATURE is enabled and U-Boot is being loaded from UART
> over Ymodem then we can't emit messages using printf() without causing
> errors like:
>
> Sending: u-boot-dtb.img
> Ymodem sectors/kbytes sent: 3009/376kRetry 0: Got 23 for s
On Wed, 2019-03-20 at 05:37 -0700, Palmer Dabbelt wrote:
> On Sun, 17 Mar 2019 11:28:31 PDT (-0700),
> lukas.a...@aisec.fraunhofer.de wrote:
> > This patch series adds SMP support for RISC-V to U-Boot. It allows
> > U-Boot to run on multi-hart systems (hart is the RISC-V terminology
> > for
> > ha
From: Dalon Westergreen
The sfp file is only valid for Gen5 (Cyclone5 & Arria5) and Arria10
devices. The file should only be built for these devices.
Signed-off-by: Dalon Westergreen
---
Changes from v1:
-> Remove duplicate entries for GEN5 and ARRIA10
---
Kconfig | 3 ++-
scrip
If CONFIG_SPL_FIT_SIGNATURE is enabled and U-Boot is being loaded from UART
over Ymodem then we can't emit messages using printf() without causing
errors like:
Sending: u-boot-dtb.img
Ymodem sectors/kbytes sent: 3009/376kRetry 0: Got 23 for sector ACK
Retry 0: NAK on sector
Retry 0: Got 68
On Wed, 2019-03-20 at 18:09 +0100, Marek Vasut wrote:
> On 3/20/19 4:40 PM, Dalon Westergreen wrote:
> > From: Dalon Westergreen
> >
> > The sfp file is only valid for Gen5 (Cyclone5 & Arria5) and Arria10
> > devices. The file should only be built for these devices.
> >
> > Signed-off-by: Dalon
On 3/20/19 4:40 PM, Dalon Westergreen wrote:
> From: Dalon Westergreen
>
> The sfp file is only valid for Gen5 (Cyclone5 & Arria5) and Arria10
> devices. The file should only be built for these devices.
>
> Signed-off-by: Dalon Westergreen
> ---
> Kconfig | 3 ++-
> scripts/Makef
The EFI PAYLOAD will use git://git.denx.de/u-boot-efi.git in future.
Signed-off-by: Heinrich Schuchardt
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8a4c5d4eabd..3166ec74f0c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -454,
Hi Stefano,
On Mon, Feb 18, 2019 at 7:53 PM Fabio Estevam wrote:
>
> Hi Stefano,
>
> On Tue, Dec 11, 2018 at 4:41 PM Otavio Salvador
> wrote:
> >
> > From: Fabio Estevam
> >
> > Add the TechNexion's logo from their internal U-Boot tree.
> >
> > Signed-off-by: Fabio Estevam
> > Signed-off-by:
On Fri, Mar 8, 2019 at 6:34 PM Jagan Teki wrote:
>
> On Fri, Mar 8, 2019 at 11:32 PM Peter Robinson wrote:
> >
> > Hey Tom and Jagan,
> >
> > > Hey all,
> > >
> > > So it's release day and I've put up v2019.04-rc3, I've updated git and
> > > the tarballs are also up now.
> > >
> > > Thanks again
It does not make any sense to check if a pointer is NULL if we have
dereferenced it before.
Reported-by: Coverity (CID 185827)
Signed-off-by: Heinrich Schuchardt
---
v2
change commit message to show Reported-by: Coverity
---
lib/efi_loader/efi_boottime.c | 6 ++
1 file changed, 2 ins
Add a missing return statement in efi_get_next_variable_name().
Reported-by: Coverity (CID 185834)
Signed-off-by: Heinrich Schuchardt
---
v2
change commit message to show Reported-by: Coverity
---
lib/efi_loader/efi_variable.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff -
Avoid an endless loop in add_strings_package().
Suggested-by: Takahiro Akashi
Reported-by: Coverity (CID 185833)
Signed-off-by: Heinrich Schuchardt
---
v2
change commit message to show Reported-by: Coverity
---
lib/efi_loader/efi_hii.c | 5 ++---
1 file changed, 2 insertions(+), 3 delet
A misplaced return statement lead to a memory leak in
efi_dump_single_var().
Reported-by: Coverity (CID 185829)
Signed-off-by: Heinrich Schuchardt
---
v2
change commit message to show Reported-by: Coverity
---
cmd/nvedit_efi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/cmd/nvedit
Hi Simon,
> From: Simon Glass
> Sent: mardi 19 mars 2019 02:25
>
> Hi Patrick,
>
> On Mon, 11 Feb 2019 at 19:50, Patrick Delaunay
> wrote:
> >
> > We can remove the pre reloc property in SPL and TPL device-tree:
> > - u-boot,dm-pre-reloc
> > - u-boot,dm-spl
> > - u-boot,dm-tpl
> > As only the
Prepare to remove dm_fdt_pre_reloc
Signed-off-by: Patrick Delaunay
---
drivers/clk/at91/pmc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c
index 7cfbabc..6b55ec5 100644
--- a/drivers/clk/at91/pmc.c
+++ b/drivers/clk/at91/pmc
This Serie replace any call to dm_fdt_pre_reloc by
dm_ofnode_pre_reloc and remove this function only used 2
times and avoid duplicated code.
Patches created after Simon comment on
http://patchwork.ozlabs.org/patch/1052734/
>> bool dm_fdt_pre_reloc(const void *blob, int offset)
> This function
The function dm_ofnode_pre_reloc should be used instead
of the function dm_fdt_pre_reloc and avoid duplicated code.
Signed-off-by: Patrick Delaunay
---
drivers/core/util.c | 24
include/dm/util.h | 26 --
2 files changed, 50 deletions(-)
diff
Prepare to remove dm_fdt_pre_reloc function.
Signed-off-by: Patrick Delaunay
---
drivers/clk/altera/clk-arria10.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/altera/clk-arria10.c b/drivers/clk/altera/clk-arria10.c
index 612a171..179869d 100644
--- a/drivers
On 3/20/19 4:27 AM, Thierry Reding wrote:
On Tue, Mar 19, 2019 at 11:05:43AM -0600, Stephen Warren wrote:
On 3/19/19 6:12 AM, Thierry Reding wrote:
On Mon, Mar 18, 2019 at 12:31:32PM -0600, Stephen Warren wrote:
On 3/8/19 1:10 PM, Thierry Reding wrote:
From: Thierry Reding
In order to suppo
Hello,
Please disregards these 3 patches as I've resubmitted them by mistake.
I've updated their state in patchworks accordingly.
---
Best regards, Laurentiu
On 20.03.2019 16:31, laurentiu.tu...@nxp.com wrote:
> From: Laurentiu Tudor
>
> On Layerscape architectures the SEC memory map is 1MB an
On Wed, Mar 20, 2019 at 07:03:52PM +0530, Lokesh Vutla wrote:
>
>
> On 19/03/19 4:44 PM, Tom Rini wrote:
> > The ISW_ENTRY_ADDR Kconfig option under mach-omap2 isn't a SoC specific
> > notion but rather "where is our previous stage loaded in memory?"
> > option. Make use of this on ARCH_KEYSTONE
On Wed, Mar 20, 2019 at 07:07:06PM +0530, Lokesh Vutla wrote:
>
>
> On 19/03/19 4:49 PM, Tom Rini wrote:
> > Enable support for SPL_OF_CONTROL on this platform. That means doing a
> > few things:
> > - Add u-boot,dm-pre-reloc to a number of nodes
> > - Drop static platdata in the board file.
> >
From: Laurentiu Tudor
The SEC QI ICID setup in the QIIC_LS register is actually an offset
that is being added to the ICID coming from the qman portal. Setting
it with a non-zero value breaks SMMU setup as the resulting ICID is
not known. On top of that, the SEC QI ICID must match the qman portal
From: Laurentiu Tudor
sec_firmware reserves JR3 for it's own usage and deletes the JR3 node
from the device tree. This causes this warning to be issued when doing
the device tree fixup:
WARNING could not find node fsl,sec-v4.0-job-ring: FDT_ERR_NOTFOUND.
Fix it by excluding the device tree fixu
From: Laurentiu Tudor
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec. The ICID macros for SEC needed to be adapted because
the format of the registers is different. Also, the initial static ICID
allocation left SEC out so update it by grabbing an ICID from th
From: Laurentiu Tudor
On Layerscape architectures the SEC memory map is 1MB and the
register blocks contained in it are 64KB aligned, not 4KB as
the ccsr_sec structure currently assumes. Fix the layout of
the structure for these architectures.
Signed-off-by: Laurentiu Tudor
Reviewed-by: Horia G
From: Laurentiu Tudor
Add defines for all the SEC job rings base addresses.
Signed-off-by: Laurentiu Tudor
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
b/arch/arm/i
Hi all
I'm trying to enable secure boot on nand but seems that SPL does not
start at all. Any help?
I'm using latest uboot
Michael
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)8511191
On Tue, Mar 19, 2019 at 01:49:46PM +0100, Stefan Roese wrote:
> Hi Tom,
>
> please pull the following Marvell related patches, mostly fixes
> which should go into the upcoming release:
>
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
__
On Tue, Mar 19, 2019 at 04:55:40PM +0100, Stefan Roese wrote:
> This patch adds a short message to the SPL NAND loader, which displays
> the source and destinations addresses including the size of the
> loaded image, like this:
>
> U-Boot SPL 2019.04-rc3-00113-g486efd8aaf (Mar 15 2019 - 14:18:02
Hi Anatolij,
On Wed, Mar 20, 2019 at 10:38 AM Anatolij Gustschin wrote:
> I've tested on wandboard with MX6Solo, the SPL size was 47 KiB.
Excellent! That's great news, thanks :-)
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listi
On 20/03/19 14:16, Fabio Estevam wrote:
> On Tue, Mar 12, 2019 at 5:37 AM Abel Vesa wrote:
>>
>> When running mkimage with "-f auto", the loadable property
>> needs to be set in order to allow SPL FIT support to boot.
>>
>> Signed-off-by: Abel Vesa
>
> Tested-by: Fabio Estevam
>
> Tom/Stefano,
Hi Fabio,
On Wed, 20 Mar 2019 10:25:02 -0300
Fabio Estevam feste...@gmail.com wrote:
...
> Thanks for converting wandboard to DM.
>
> I haven't had a chance to test this series yet, but I am wondering if
> the SPL size can still fit in the 64k of the internal RAM available on
> mx6solo.
>
> Do y
On 19/03/19 4:49 PM, Tom Rini wrote:
> Enable support for SPL_OF_CONTROL on this platform. That means doing a
> few things:
> - Add u-boot,dm-pre-reloc to a number of nodes
> - Drop static platdata in the board file.
> - A lot of tweaks to the defconfig. We remove some things such as
> SPL_US
On 19/03/19 4:44 PM, Tom Rini wrote:
> The ISW_ENTRY_ADDR Kconfig option under mach-omap2 isn't a SoC specific
> notion but rather "where is our previous stage loaded in memory?"
> option. Make use of this on ARCH_KEYSTONE rather than SPL_TEXT_BASE for
> our HS builds that are not using SPL anyh
Hi Anatolij,
On Mon, Mar 18, 2019 at 7:30 PM Anatolij Gustschin wrote:
>
> This series starts conversion of ipuv3 driver to DM_VIDEO.
> It has been tested on apalis_imx6 module with LVDS display
> attached and on wandboard with HDMI display.
>
> With applied "[PATCH 17/17] imx6: wandboard: conver
On Tue, Mar 12, 2019 at 5:37 AM Abel Vesa wrote:
>
> When running mkimage with "-f auto", the loadable property
> needs to be set in order to allow SPL FIT support to boot.
>
> Signed-off-by: Abel Vesa
Tested-by: Fabio Estevam
Tom/Stefano,
These two patches fix a boot regression on mx6sabresd
On Tue, Mar 12, 2019 at 5:36 AM Abel Vesa wrote:
>
> If FIT_IMAGE_TINY is enabled, spl_fit_image_get_os returns -ENOTSUPP.
> In this case, we should default to IH_OS_U_BOOT not to IH_OS_INVALID.
>
> Signed-off-by: Abel Vesa
Tested-by: Fabio Estevam
__
On Sun, 17 Mar 2019 11:28:31 PDT (-0700), lukas.a...@aisec.fraunhofer.de wrote:
This patch series adds SMP support for RISC-V to U-Boot. It allows
U-Boot to run on multi-hart systems (hart is the RISC-V terminology for
hardware thread). Images passed to bootm will be started on all harts.
The boo
> >
> > MTIA.
> >
> > Jerry.
>
> Hey Jerry,
>
> Take a look at the final defconfig once you've run 'make
> yourboard_defconfig' in order to see if there is anything specific you
> disable.
> Your current defconfig is very minimal but a lot of things will be turned on
> by
> default and you shou
Hi Thierry,
> This set of patches move some code from the Tegra186 SoC specific
> directory to a common location so that it can be more easily shared.
> Since the differences between Tegra186 and earlier generations are
> now very small, the builds are unified to avoid duplication of code.
>
> We
Hi Mrek,
Am 15.03.2019 um 21:34 schrieb Simon Goldschmidt:
Am 05.03.2019 um 21:58 schrieb Marek Vasut:
On 3/5/19 9:28 PM, Simon Goldschmidt wrote:
Am 04.03.2019 um 22:34 schrieb Marek Vasut:
On 3/4/19 10:23 PM, Simon Goldschmidt wrote:
Marek Vasut mailto:ma...@denx.de>> schrieb am Mo., 4.
On Tue, Mar 19, 2019 at 11:18:39AM -0600, Stephen Warren wrote:
> On 3/18/19 5:24 PM, Thierry Reding wrote:
> > From: Thierry Reding
> >
> > The Jetson Nano Developer Kit is a Tegra X1 based development board. It
> > is similar to Jetson TX1 but it is not pin compatible. It features 4 GB
> > of L
On Tue, Mar 19, 2019 at 11:05:43AM -0600, Stephen Warren wrote:
> On 3/19/19 6:12 AM, Thierry Reding wrote:
> > On Mon, Mar 18, 2019 at 12:31:32PM -0600, Stephen Warren wrote:
> > > On 3/8/19 1:10 PM, Thierry Reding wrote:
> > > > From: Thierry Reding
> > > >
> > > > In order to support chainload
On 3/20/19 2:30 AM, Ley Foon Tan wrote:
> On Tue, Mar 19, 2019 at 5:47 PM Marek Vasut wrote:
>>
>> On 3/19/19 10:46 AM, Ley Foon Tan wrote:
>>> On Tue, Mar 19, 2019 at 5:39 PM Marek Vasut wrote:
On 3/19/19 4:26 AM, Ley Foon Tan wrote:
> On Tue, Mar 12, 2019 at 7:03 PM Marek Vasut w
On 20.03.19 09:06, eugen.hris...@microchip.com wrote:
So my question: is the behavior of CONFIG_SPL_WATCHDOG_SUPPORT=n not
aligned with your use case ? So you are actually fixing the behavior of
CONFIG_SPL_WATCHDOG_SUPPORT=n ?
Yes. Without this patch I do get this build error:
...
LD
On 20.03.2019 09:48, Stefan Roese wrote:
> External E-Mail
>
>
> On 20.03.19 08:41, eugen.hris...@microchip.com wrote:
>>
>>
>> On 20.03.2019 09:33, Stefan Roese wrote:
>>> External E-Mail
>>>
>>>
>>> On 20.03.19 08:30, eugen.hris...@microchip.com wrote:
On 19.03.2019 17:56, Stef
On 20.03.19 08:41, eugen.hris...@microchip.com wrote:
On 20.03.2019 09:33, Stefan Roese wrote:
External E-Mail
On 20.03.19 08:30, eugen.hris...@microchip.com wrote:
On 19.03.2019 17:56, Stefan Roese wrote:
External E-Mail
This patch adds some checks, so that the watchdog can be enabled
On 20.03.2019 09:33, Stefan Roese wrote:
> External E-Mail
>
>
> On 20.03.19 08:30, eugen.hris...@microchip.com wrote:
>>
>>
>> On 19.03.2019 17:56, Stefan Roese wrote:
>>> External E-Mail
>>>
>>>
>>> This patch adds some checks, so that the watchdog can be enabled in main
>>> U-Boot proper but
On 20.03.19 08:30, eugen.hris...@microchip.com wrote:
On 19.03.2019 17:56, Stefan Roese wrote:
External E-Mail
This patch adds some checks, so that the watchdog can be enabled in main
U-Boot proper but can be disabled in SPL.
Hi Stefan,
Actually your code looks at CONFIG_SPL_WATCHDOG_SUPP
It adds the driver for HIGMACV300 Ethernet controller found on HiSilicon
SoCs like Hi3798CV200. It's based on a downstream U-Boot driver, but
quite a lot of code gets rewritten and cleaned up to adopt driver model
and PHY API.
Signed-off-by: Shawn Guo
Acked-by: Joe Hershberger
---
drivers/net/
Some reset controllers support different polarities for reset operation,
so let's add a polarity field into struct reset_ctl.
Signed-off-by: Shawn Guo
---
include/reset.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/reset.h b/include/reset.h
index 65aa7a4ce5e9..a1a9ad5603db 100
The 'phy' reset of gmac device in kernel device tree is not generic
enough for u-boot to use, so we need to overwrite the 'resets' property
as needed. With this device tree fixup and poplar_defconfig changes,
Ethernet starts working on Poplar board.
Signed-off-by: Shawn Guo
---
arch/arm/dts/hi3
The series adds Ethernet support for Poplar board. It firstly creates
a reset driver for HiSilicon platform, then introduces higmacv300
Ethernet driver, and finally enables Ethernet support for Poplar board.
Changes for v4:
- Add a polarity field into struct reset_ctl.
- Instead of defining cus
It adds a Driver Model compatible reset driver for HiSlicon platform.
The driver implements a custom .of_xlate function, and uses .data field
as reset register offset and .id field as bit shift.
Signed-off-by: Shawn Guo
---
drivers/reset/Kconfig | 6 ++
drivers/reset/Makefile
On 20.03.19 08:25, eugen.hris...@microchip.com wrote:
On 19.03.2019 17:56, Stefan Roese wrote:
External E-Mail
This patch adds an alterative SPL version of atmel_serial_enable_clk().
This enables the usage of this driver without full clock support (in
drivers and DT nodes). This saves some s
On 19.03.2019 17:56, Stefan Roese wrote:
> External E-Mail
>
>
> This patch adds some checks, so that the watchdog can be enabled in main
> U-Boot proper but can be disabled in SPL.
Hi Stefan,
Actually your code looks at CONFIG_SPL_WATCHDOG_SUPPORT , so , if this
is disabled in the config, y
On 19.03.2019 17:56, Stefan Roese wrote:
> External E-Mail
>
>
> This patch adds an alterative SPL version of atmel_serial_enable_clk().
> This enables the usage of this driver without full clock support (in
> drivers and DT nodes). This saves some space in the SPL image.
>
> If some boards ne
On Tue, Mar 19, 2019 at 5:12 PM Andes wrote:
>
> From: Rick Chen
>
> Add ax25 RISC-V platform-specific Kconfig options, to include
> CPU and timer drivers.
>
> Signed-off-by: Rick Chen
> Cc: Greentime Hu
> ---
> arch/riscv/cpu/ax25/Kconfig | 6 ++
> 1 file changed, 6 insertions(+)
>
Revie
Hi Rick,
On Tue, Mar 19, 2019 at 5:12 PM Andes wrote:
>
> From: Rick Chen
>
nits: remove the ending period in the commit title
> Limit the cache configuration only can be supported in M mode.
> It can not be manipulated in S mode.
>
> Signed-off-by: Rick Chen
> Cc: Greentime Hu
> ---
> arch
Hi Rick,
On Tue, Mar 19, 2019 at 5:13 PM Andes wrote:
>
> From: Rick Chen
>
nits: remove the ending period in the commit title.
> Signed-off-by: Rick Chen
> Cc: Greentime Hu
> ---
> arch/riscv/dts/ae350_32.dts | 81
> +
> arch/riscv/dts/ae350_64.
On Tue, Mar 19, 2019 at 5:12 PM Andes wrote:
>
> From: Rick Chen
>
> Disable ATCPIT100 SoC timer and replace by PLMT.
>
> Signed-off-by: Rick Chen
> Cc: Greentime Hu
> ---
> configs/ae350_rv32_defconfig | 1 -
> configs/ae350_rv64_defconfig | 1 -
> 2 files changed, 2 deletions(-)
>
Reviewed-
On Tue, Mar 19, 2019 at 5:13 PM Andes wrote:
>
> From: Rick Chen
>
> Signed-off-by: Rick Chen
> Cc: Greentime Hu
> ---
> board/AndesTech/ax25-ae350/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Bin Meng
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Hi Rick,
On Tue, Mar 19, 2019 at 5:12 PM Andes wrote:
>
> From: Rick Chen
>
> The Platform-Level Interrupt Controller(PLIC)
> block holds memory-mapped claim and pending registers
> associated with software interrupt.It is required
nits: need one space after interrupt.
> for handling IPI.
>
>
Hi Rick,
On Tue, Mar 19, 2019 at 5:12 PM Andes wrote:
>
> From: Rick Chen
>
> The platform-Level Machine Timer(PLMT) block
> holds memory-mapped mtime register associated
> with timer tick.
>
> This driver implements the riscv_get_time()which
nits: need one space before "which"
> are required
Hi Rick,
On Tue, Mar 19, 2019 at 5:11 PM Andes wrote:
>
> From: Rick Chen
>
> To enumerate devices on the /soc/ node, create a "simple-bus"
> driver to match "andestech,riscv-ae350-soc".
>
Could we change the /soc/ node compatible string to "simple-bus"
instead? The QEMU 'virt' created a bad ex
On 3/20/19 1:07 AM, AKASHI Takahiro wrote:
> See UEFI v2.7, section 3.1.2 for details of the specification.
>
> With efidebug command, you can run any EFI boot option as follows:
> => efi boot add 1 SHELL ...
> => efi boot add 2 HELLO ...
> => efi boot order 1 2
> => efi bootmgr
> (sta
On 3/20/19 1:07 AM, AKASHI Takahiro wrote:
> This patch was originally posted as a single one, but then was
> merged in my "run -e." Now I would like to post it on its own.
>
> With this patch, EFI Boot Manager will handles BootNext and BootCurrent
> variable as UEFI specification describes.
>
> Ch
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