The error here should be marked *todo*.
Signed-off-by: AKASHI Takahiro
---
lib/efi_selftest/efi_selftest_variables.c | 28 +++
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/lib/efi_selftest/efi_selftest_variables.c
b/lib/efi_selftest/efi_selftest_variables.
Changes in v2
* add patch#1 and patch#2 to avoid sefltest failure
* doesn't free a buffer returned by env_get() (patch#3)
AKASHI Takahiro (3):
efi: selftest: APPEND_WRITE is not supported
efi_loader: variable: return error for APPEND_WRITE
efi_loader: variable: attributes may not be changed
-stm32-20190523
for you to fetch changes up to 187c41d783371dc3b7ecae45f450b330f5e1bb25:
stm32mp1: ram: add tuning in DDR interactive mode (2019-05-23 11:38:11
+0200)
- Add various STM32MP1 fixes for serial, env, clk, board, i2c
On 15.05.2019 12:12, Tudor Ambarus - M18064 wrote:
> From: Tudor Ambarus
>
> CONFIG_PMECC_CAP has a higher priority than its ONFI detected
> parameter and will overwrite it when defined. As per commit
> 49ad40298cc5, CONFIG_PMECC_CAP has a default value of 2 if not
> otherwise stated. This resu
From: Eugen Hristev
Enabled CONFIG_SPL_AT91_MCK_BYPASS and resync with savedefconfig
Signed-off-by: Eugen Hristev
---
configs/sama5d2_icp_mmc_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/configs/sama5d2_icp_mmc_defconfig
b/configs/sama5d2_icp_mmc_defconfig
i
From: Eugen Hristev
By default the configuration of the PMC is to have an external crystal
connected that requires driving on both XIN and XOUT pins.
The bypass configuration means that only XIN will be used, the SoC will not
do any driving, and the XIN needs to be provided with a proper signal.
Add secure boot defconfig for ls1028aqds and ls1028ardb boards.
Signed-off-by: Yuantian Tang
---
configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 62
configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 62
include/configs/ls1028a_common.h | 4 ++
3
Hi Prabhakar,
-Original Message-
From: Prabhakar Kushwaha
Sent: 2019年5月24日 13:23
To: Xiaowei Bao ; Bin Meng ; Simon
Glass
Cc: Z.q. Hou ; u-boot@lists.denx.de; w...@denx.de;
Shengzhou Liu ; Jagdish Gediya ;
ley.foon@intel.com; s...@denx.de; M.h. Lian
Subject: RE: [EXT] Re: [PATCHv
On 5/22/19 5:15 AM, AKASHI Takahiro wrote:
> Alex,
>
> It seems to me that the current efi_runtime_detach() has
> two meanings:
> * changes relating to the transition to virtual address mode
> * changes relating to exiting boot services
>
> In the current implementation, efi_runtime_detach() is
> c
Hi Xiaowei,
> -Original Message-
> From: Xiaowei Bao
> Sent: Friday, May 24, 2019 7:47 AM
> To: Bin Meng ; Simon Glass
> Cc: Z.q. Hou ; u-boot@lists.denx.de; Prabhakar
> Kushwaha ; w...@denx.de; Shengzhou Liu
> ; Jagdish Gediya ;
> ley.foon@intel.com; s...@denx.de; M.h. Lian
> Subjec
According to the FAT32 specification 0x7f (DEL) is not a legal character
for file names.
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/efi_unicode_collation.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/efi_loader/efi_unicode_collation.c
b/lib/efi_loader/efi_
On 5/24/19 3:07 AM, AKASHI Takahiro wrote:
> Heinrich,
>
> I notice that some of your recent patches are direct results reflecting
> updates in UEFI specification v2.8. (You said that in commit messages).
>
> Do you want to change EFI_SPECIFICATION_VERSION to 2.8?
> What is your policy for acceptin
On 5/24/19 3:02 AM, AKASHI Takahiro wrote:
> Heinrich,
>
> On Thu, May 16, 2019 at 07:34:54PM +0200, Heinrich Schuchardt wrote:
>> In EFI 1.10 a version of the Unicode collation protocol using ISO 639-2
>> language codes existed. This protocol is not part of the UEFI specification
>> any longer. Un
> -Original Message-
> From: Peng Ma
> Sent: Wednesday, March 27, 2019 2:53 PM
> To: Prabhakar Kushwaha ; Shengzhou Liu
> ; Ruchika Gupta
> Cc: Yinbo Zhu ; s...@chromium.org; Jagdish Gediya
> ; York Sun ;
> bmeng...@gmail.com; s...@denx.de; m...@marvell.com; Andy Tang
> ; u-boot@lists.den
On 5/24/19 4:22 AM, AKASHI Takahiro wrote:
> Heinrich,
>
> On Sun, May 12, 2019 at 09:59:18AM +0200, Heinrich Schuchardt wrote:
>> File names may not contain control characters (< 0x20).
>> Simplify the coding.
>>
>> Signed-off-by: Heinrich Schuchardt
>> ---
>> fs/fat/fat_write.c | 48 +++
> -Original Message-
> From: Peng Ma
> Sent: Wednesday, March 27, 2019 2:53 PM
> To: Prabhakar Kushwaha ; Shengzhou Liu
> ; Ruchika Gupta
> Cc: Yinbo Zhu ; s...@chromium.org; Jagdish Gediya
> ; York Sun ;
> bmeng...@gmail.com; s...@denx.de; m...@marvell.com; Andy Tang
> ; u-boot@lists.den
> -Original Message-
> From: Peng Ma
> Sent: Wednesday, March 27, 2019 2:54 PM
> To: Prabhakar Kushwaha ; Shengzhou Liu
> ; Ruchika Gupta
> Cc: Yinbo Zhu ; s...@chromium.org; Jagdish Gediya
> ; York Sun ;
> bmeng...@gmail.com; s...@denx.de; m...@marvell.com; Andy Tang
> ; u-boot@lists.den
> -Original Message-
> From: Peng Ma
> Sent: Wednesday, March 27, 2019 2:54 PM
> To: Prabhakar Kushwaha ; Shengzhou Liu
> ; Ruchika Gupta
> Cc: Yinbo Zhu ; s...@chromium.org; Jagdish Gediya
> ; York Sun ;
> bmeng...@gmail.com; s...@denx.de; m...@marvell.com; Andy Tang
> ; u-boot@lists.den
> -Original Message-
> From: Yinbo Zhu
> Sent: Thursday, April 11, 2019 4:32 PM
> To: York Sun ; u-boot@lists.denx.de
> Cc: Yinbo Zhu ; Xiaobo Xie ; Ran
> Wang ; Jiafei Pan ; Y.b. Lu
> ; Jagdish Gediya ; Prabhakar
> Kushwaha
> Subject: [PATCH v3 8/8] configs: enable usb device module in T
> -Original Message-
> From: Yinbo Zhu
> Sent: Thursday, April 11, 2019 4:32 PM
> To: York Sun ; u-boot@lists.denx.de
> Cc: Yinbo Zhu ; Xiaobo Xie ; Ran
> Wang ; Jiafei Pan ; Y.b. Lu
> ; Jagdish Gediya ; Prabhakar
> Kushwaha
> Subject: [PATCH v3 5/8] configs: enable eSDHC device module in
> -Original Message-
> From: Yinbo Zhu
> Sent: Thursday, April 11, 2019 4:32 PM
> To: York Sun ; u-boot@lists.denx.de
> Cc: Yinbo Zhu ; Xiaobo Xie ; Ran
> Wang ; Jiafei Pan ; Y.b. Lu
> ; Jagdish Gediya ; Prabhakar
> Kushwaha
> Subject: [PATCH v3 4/8] configs: enable device tree support fo
> -Original Message-
> From: Yinbo Zhu
> Sent: Thursday, April 11, 2019 4:32 PM
> To: York Sun ; u-boot@lists.denx.de
> Cc: Yinbo Zhu ; Xiaobo Xie ; Ran
> Wang ; Jiafei Pan ; Y.b. Lu
> ; Jagdish Gediya ; Prabhakar
> Kushwaha
> Subject: [PATCH v3 6/8] ppc: t2080qds: add usb node
>
> From:
> -Original Message-
> From: Yinbo Zhu
> Sent: Thursday, April 11, 2019 4:32 PM
> To: York Sun ; u-boot@lists.denx.de
> Cc: Yinbo Zhu ; Xiaobo Xie ; Ran
> Wang ; Jiafei Pan ; Y.b. Lu
> ; Jagdish Gediya ; Prabhakar
> Kushwaha
> Subject: [PATCH v3 3/8] mmc: fsl_esdhc: ppc: adopt 32 bit addr
> -Original Message-
> From: Yinbo Zhu
> Sent: Thursday, April 11, 2019 4:32 PM
> To: York Sun ; u-boot@lists.denx.de
> Cc: Yinbo Zhu ; Xiaobo Xie ; Ran
> Wang ; Jiafei Pan ; Y.b. Lu
> ; Jagdish Gediya ; Prabhakar
> Kushwaha
> Subject: [PATCH v3 7/8] usb: ehci: ppc: adopt 32 bit address
>
Contrary to fat12/16, fat32 can have root directory at any location
and its size can be expanded.
Without this patch, root directory won't grow properly and so we will
eventually fail to add files under root directory. Please note that this
can happen even if you delete many files as deleted direct
With the commit below, fat now correctly handles a file read under
a non-cluster-aligned root directory of fat12/16.
Write operation should be fixed in the same manner.
Fixes: commit 9b18358dc05d ("fs: fat: fix reading non-cluster-aligned
root directory")
Signed-off-by: AKASHI Takahiro
Cc:
Two test cases are added under test_fs_ext:
test case 10: for root directory
test case 11: for non-root directory
Those will verify a behavior fixed by the commits related to
root directory
("fs: fat: allocate a new cluster for root directory of fat32" and
"fs: fat: flush a directory clust
> -Original Message-
> From: Yinbo Zhu
> Sent: Thursday, April 11, 2019 4:32 PM
> To: York Sun ; u-boot@lists.denx.de
> Cc: Yinbo Zhu ; Xiaobo Xie ; Ran
> Wang ; Jiafei Pan ; Y.b. Lu
> ; Jagdish Gediya ; Prabhakar
> Kushwaha
> Subject: [PATCH v3 2/8] mmc: fsl_esdhc: ppc: set sdhc clock
>
File system tests, test_fs, relies on guestmount so that it can be
executed in a user mode. Describe this in README.md.
Signed-off-by: AKASHI Takahiro
---
test/py/README.md | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/test/py/README.md b/test/py/README
> -Original Message-
> From: Yinbo Zhu
> Sent: Thursday, April 11, 2019 4:32 PM
> To: York Sun ; u-boot@lists.denx.de
> Cc: Yinbo Zhu ; Xiaobo Xie ; Ran
> Wang ; Jiafei Pan ; Y.b. Lu
> ; Jagdish Gediya ; Prabhakar
> Kushwaha
> Subject: [PATCH v3 1/8] ppc: t2080qds: add eSDHC node
>
> Fro
When a long name directory entry is created, multiple directory entries
may be occupied across a directory cluster boundary. Since only one
directory cluster is cached in a directory iterator, a first cluster must
be written back to device before switching over a second cluster.
Without this patch
This patch set contains three (independent) bug fixes relating to
write operations to root directory. See each commit message
for more details.
Without those fixes, you may lose files that you created under root
directory or will see the file system corrupted. This will happen
particularly when yo
Hi Tom,
The following changes since commit 7e090b466c5ba874d31c1bf22c3a130d516cdc32:
Merge git://git.denx.de/u-boot-fsl-qoriq (2019-05-22 08:32:24 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-mpc85xx.git HEAD
for you to fetch changes up to 02dc1599ba0b16eb21ba0c2
Hello Chuanhua Han,
Am 23.05.2019 um 11:22 schrieb Chuanhua Han:
This patch adds some slave nodes to support the i2c dm on the device
side under the i2c0 controller.
Signed-off-by: Chuanhua Han
---
arch/arm/dts/fsl-lx2160a-rdb.dts | 51
1 file changed, 51 in
Hello Chuanhua Han,
Am 23.05.2019 um 11:22 schrieb Chuanhua Han:
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include for
arch ls2160a.
Signed-off-by: Chuanhua Han
---
arch/arm/include/asm/gpio.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Hello Chuanhua Han,
Am 23.05.2019 um 11:22 schrieb Chuanhua Han:
This patch solved the following compilation error:
1.Remove the definition of CONFIG_SYS_I2C to solve the following
compilation issue:
In file included from include/config.h:8:0,
from include/common.h:20:
include
Hello Chuanhua Han,
Am 23.05.2019 um 11:22 schrieb Chuanhua Han:
This patch adds the pcf2127-rtc node under the i2c4 node.
Signed-off-by: Chuanhua Han
---
arch/arm/dts/fsl-lx2160a-rdb.dts | 19 +++
1 file changed, 19 insertions(+)
Reviewed-by: Heiko Schocher
bye,
Heiko
-
Hello Chuanhua Han,
Am 23.05.2019 um 11:22 schrieb Chuanhua Han:
In lx2160a soc, there are eight i2c controllers, this patch adds i2c
nodes for lx2160a, and the gpio2 nodes on which the i2c4 controller
depends.
Signed-off-by: Chuanhua Han
---
arch/arm/dts/fsl-lx2160a.dtsi | 101 +
Hello Chuanhua Han,
Am 23.05.2019 um 11:22 schrieb Chuanhua Han:
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C
API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch solves
the problem that the i2c-re
Hardware return completion status non-zero when read from non exist
function in multi-function PCIe device. Return error will cause PCIe
enumeration fail.
Change it to return 0 and return value 0x when error.
Signed-off-by: Ley Foon Tan
---
drivers/pci/pcie_intel_fpga.c | 6 --
1 fi
This fix issue when access config from PCIe switch.
The PCIe controller need to send Type 0 config TLP if the targeting bus
matches with the secondary bus number, which is when the TLP is targeting
the immediate device on the link.
The PCIe controller send Type 1 config TLP if the targeting bus i
Some PCIe devices require longer time to response.
Increase polling counter to 2 (~100ms).
Signed-off-by: Ley Foon Tan
---
drivers/pci/pcie_intel_fpga.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c
index 3cd
This patchset fix issues in Intel FPGA PCIe driver.
- Fix TLP polling timeout
- Fix enumerating mult-function PCIe device issue
- Fix PCIe switch read config register issue
Ley Foon Tan (3):
pci: intel: Increase TLP polling counter
pci: intel: Fix error when enumerating multi-function PCIe dev
The previous pcf2127 RTC chip could not read and set the correct time.
When reading the data of internal registers, the read address was the
value of register plus 1. This is because this chip requires the host
to send a stop signal after setting the register address and before
reading the register
This patch enables the i2c controller to generate a stop signal before
reading the slave device's internal register after setting the register
address (need to determine if the signal is needed according to the
message flag).
Signed-off-by: Biwen Li
Signed-off-by: Chuanhua Han
---
Changes in v2:
Usually the i2c bus needs to write the address of the register before
reading the internal register data of the device (ignoring the
transmission of the slave address).
Generally, the stop signal is not needed before the register is read,
but there is a special chip that needs this stop signal (su
Heinrich,
On Sun, May 12, 2019 at 09:59:18AM +0200, Heinrich Schuchardt wrote:
> File names may not contain control characters (< 0x20).
> Simplify the coding.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> fs/fat/fat_write.c | 48 +++---
> 1 file changed
-Original Message-
From: Bin Meng
Sent: 2019年5月24日 10:14
To: Xiaowei Bao ; Simon Glass
Cc: Z.q. Hou ; u-boot@lists.denx.de; Prabhakar Kushwaha
; w...@denx.de; Shengzhou Liu
; Jagdish Gediya ;
ley.foon@intel.com; s...@denx.de; M.h. Lian
Subject: Re: [EXT] Re: [PATCHv2 8/8] confi
On Fri, May 24, 2019 at 10:10 AM Xiaowei Bao wrote:
>
>
>
> -Original Message-
> From: Bin Meng
> Sent: 2019年5月24日 8:11
> To: Z.q. Hou
> Cc: u-boot@lists.denx.de; Prabhakar Kushwaha ;
> w...@denx.de; Shengzhou Liu ; Jagdish Gediya
> ; s...@chromium.org; ley.foon@intel.com;
> s...@
-Original Message-
From: Bin Meng
Sent: 2019年5月24日 8:11
To: Z.q. Hou
Cc: u-boot@lists.denx.de; Prabhakar Kushwaha ;
w...@denx.de; Shengzhou Liu ; Jagdish Gediya
; s...@chromium.org; ley.foon@intel.com;
s...@denx.de; M.h. Lian ; Xiaowei Bao
Subject: [EXT] Re: [PATCHv2 8/8] conf
Hi Marek,
On 2019/5/22 19:41, Marek Vasut wrote:
> Caution: EXT Email
>
> On 5/22/19 9:34 AM, Lukasz Majewski wrote:
> [...]
By using above approach we do have the NXP's "container"
format only seen in the SPL (which is OK, as for example
Samsung does similar thing with
Heinrich,
I notice that some of your recent patches are direct results reflecting
updates in UEFI specification v2.8. (You said that in commit messages).
Do you want to change EFI_SPECIFICATION_VERSION to 2.8?
What is your policy for accepting patches?
(I'm just asking.)
-Takahiro Akashi
___
Heinrich,
On Thu, May 16, 2019 at 07:34:54PM +0200, Heinrich Schuchardt wrote:
> In EFI 1.10 a version of the Unicode collation protocol using ISO 639-2
> language codes existed. This protocol is not part of the UEFI specification
> any longer. Unfortunately it is required to run the UEFI Self Cer
Hi,
On Fri, May 24, 2019 at 12:04 AM Z.q. Hou wrote:
>
> Hi Bin,
>
> Thanks a lot for your comments!
>
> > -Original Message-
> > From: Bin Meng [mailto:bmeng...@gmail.com]
> > Sent: 2019年5月23日 22:23
> > To: Z.q. Hou
> > Cc: u-boot@lists.denx.de; Prabhakar Kushwaha
> > ; w...@denx.de; Sh
On Thu, May 23, 2019 at 7:11 PM Marek Vasut wrote:
> I think it makes sense to go this way and fix the MX6 before too many
> people get cranky about this forcible DM/DT push , which cripples the
> boards left and right.
Yes, patch has been sent:
https://lists.denx.de/pipermail/u-boot/2019-May/37
For the whole series:
Reviewed-by: Sam Protsenko
Thank you for handling this, Eugeniu!
On Thu, May 23, 2019 at 6:33 PM Eugeniu Rosca wrote:
>
> The motivation behind the 'bcb' command is explained in the
> second ("cmd: Add 'bcb' command *") patch.
>
> The first patch does the necessary fixing
On 5/24/19 12:08 AM, Fabio Estevam wrote:
> On Thu, May 23, 2019 at 7:04 PM Marek Vasut wrote:
>
>> Ah, can't you just use either non-DM/DT SPL (which is OK to do) or
>> combine SPL+DT into a single file , like some other boards do ?
>
> There are two orthogonal issues we are discussing:
>
> 1.
On 5/23/19 8:43 PM, Simon Goldschmidt wrote:
> commit 1b898ff ("gpio: dwapb_gpio: convert to livetree") introduced
> a bug in that dev->node of the gpio chip was accidentally set to the
> of_node of its bank subnode.
>
> What it meant to do was assign subdev->node, not dev->node.
>
> While this d
On Thu, May 23, 2019 at 7:04 PM Marek Vasut wrote:
> Ah, can't you just use either non-DM/DT SPL (which is OK to do) or
> combine SPL+DT into a single file , like some other boards do ?
There are two orthogonal issues we are discussing:
1. DM SPL size is beyond the limit for mx6sabresd. Yes, no
On 5/23/19 7:59 PM, Fabio Estevam wrote:
> Hi Marek,
>
> On Thu, May 23, 2019 at 2:54 PM Marek Vasut wrote:
>
>> Why do you need to load fitImage via SDP btw ?
>
> Let's suppose a i.MX6 board that boots from eMMC is bricked and we
> need to load a new U-Boot to repair it.
>
> imx_usb_loader is
On 5/23/19 8:37 PM, Adam Ford wrote:
> On Thu, May 23, 2019 at 1:35 PM Fabio Estevam wrote:
>>
>> Hi Adam,
>>
>> On Thu, May 23, 2019 at 3:28 PM Adam Ford wrote:
>>
>>> I have been following this thread, because I have been working through
>>> attempting to migrate the imx6q_logic board to SPL_OF
On Thu, May 23, 2019 at 10:08:54PM +0200, Simon Goldschmidt wrote:
> Am 13.05.2019 um 14:45 schrieb Simon Goldschmidt:
> >On Sat, May 11, 2019 at 3:55 AM Tom Rini wrote:
> >>
> >>On Mon, Apr 22, 2019 at 10:27:21PM +0200, Simon Goldschmidt wrote:
> >>
> >>>This adds a size check for SPL that can dy
Am 13.05.2019 um 14:45 schrieb Simon Goldschmidt:
On Sat, May 11, 2019 at 3:55 AM Tom Rini wrote:
On Mon, Apr 22, 2019 at 10:27:21PM +0200, Simon Goldschmidt wrote:
This adds a size check for SPL that can dynamically check generated
SPL binaries (including devicetree) for a size limit that e
Hi Bryan,
Le 20/05/2019 à 10:33, Bryan O'Donoghue a écrit :
On 15/05/2019 20:13, Pierre-Jean Texier wrote:
Regarding your question, it seems that is now the standard on many
platforms [2].
In fact, instead of keeping a custom environment, it is better to use
a more
generic approach by switch
When serdes configuration was written in hardware there was a delay
of 100ms to be sure that configuration was written. But the delay is not
needed because already the function serdes_write it is checking that the
operation finished.
Therefore remove the mdelay. This improves the speed of configur
Because all MSCC SoC use the same MDIO bus, put the implementation in
one common file(mscc_miim) and make all the other MSCC network drivers to
use these functions.
Signed-off-by: Horatiu Vultur
---
drivers/net/mscc_eswitch/Makefile | 10 +--
drivers/net/mscc_eswitch/jr2_switch.c |
Since the board uses SPL_OF_CONTROL now, we don't need to
explicitly initialize the MMC driver, but we still need to
pinmux the corresponding pins. This patch removes the
initialization code and leave just the muxing behind.
Signed-off-by: Adam Ford
diff --git a/board/logicpd/imx6/imx6logic.c b
Currently, when the spl_boot_device checks the boot device, it
will only return MMC1 when it's either sd or eMMC regardless
of whether or not it's MMC1 or MMC2. This is a problem when
booting from MMC2 if MMC isn't being manually configured like in
the DM_SPL case with SPL_OF_CONTROL.
This patch
With the spl code correctly returning either MMC1 or MMC2,
this board can not boot either from internal eMMC (MMC1) or
the uSD card on the baseboard (MMC2) using the device tree.
Signed-off-by: Adam Ford
diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig
index 0bb2fc6bbf.
Card detect function implemented for SDHCI framework.
Signed-off-by: Ibai Erkiaga
---
drivers/mmc/sdhci.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index e2bb90a..cb4db8d 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sd
Hi Faiz,
On Thu, May 23, 2019 at 12:37:43PM -0500, Faiz Abbas wrote:
> With changes in the driver requiring phy related properties,
> add the same for the SD card node to prevent breaking boot with
> the driver update.
>
> Signed-off-by: Faiz Abbas
Probably need to stick to the @ti.com email ad
commit 1b898ff ("gpio: dwapb_gpio: convert to livetree") introduced
a bug in that dev->node of the gpio chip was accidentally set to the
of_node of its bank subnode.
What it meant to do was assign subdev->node, not dev->node.
While this doesn't affect too many use cases, iterating over the gpio
c
On Thu, May 23, 2019 at 1:35 PM Fabio Estevam wrote:
>
> Hi Adam,
>
> On Thu, May 23, 2019 at 3:28 PM Adam Ford wrote:
>
> > I have been following this thread, because I have been working through
> > attempting to migrate the imx6q_logic board to SPL_OF_CONTROL which
> > requires SPL_DM.
> >
> >
Hi Adam,
On Thu, May 23, 2019 at 3:28 PM Adam Ford wrote:
> I have been following this thread, because I have been working through
> attempting to migrate the imx6q_logic board to SPL_OF_CONTROL which
> requires SPL_DM.
>
> To working around the issue you're describing, I played with disabling
>
On Thu, May 23, 2019 at 12:59 PM Fabio Estevam wrote:
>
> Hi Marek,
>
> On Thu, May 23, 2019 at 2:54 PM Marek Vasut wrote:
>
> > Why do you need to load fitImage via SDP btw ?
>
> Let's suppose a i.MX6 board that boots from eMMC is bricked and we
> need to load a new U-Boot to repair it.
>
> imx_
On Thu, May 23, 2019 at 3:01 PM Jagan Teki wrote:
> To be prescribe, the issue with FIT formatted u-boot-dtb.img not the DM
> alone.
Correct, what I meant to say is that after DM conversion we started
using FIT image on imx6sabresd board, which prevented SDP download to
work.
_
On Thu, May 23, 2019 at 11:29 PM Fabio Estevam wrote:
>
> Hi Marek,
>
> On Thu, May 23, 2019 at 2:54 PM Marek Vasut wrote:
>
> > Why do you need to load fitImage via SDP btw ?
>
> Let's suppose a i.MX6 board that boots from eMMC is bricked and we
> need to load a new U-Boot to repair it.
>
> imx_
On 5/8/19 1:22 PM, Niel Fourie wrote:
> Support for Phytech phyCORE AM335x R2 SOM (PCL060) on the Phytec
> phyBOARD-Wega AM335x.
>
> CPU : AM335X-GP rev 2.1
> Model: Phytec AM335x phyBOARD-WEGA
> DRAM: 256 MiB
> NAND: 256 MiB
> MMC: OMAP SD/MMC: 0
> eth0: ethernet@4a10
>
> Working:
> -
Hi Marek,
On Thu, May 23, 2019 at 2:54 PM Marek Vasut wrote:
> Why do you need to load fitImage via SDP btw ?
Let's suppose a i.MX6 board that boots from eMMC is bricked and we
need to load a new U-Boot to repair it.
imx_usb_loader is a very convenient tool to achieve this.
This method has be
On 5/23/19 7:45 PM, Fabio Estevam wrote:
> Hi Schrempf,
>
> On Thu, May 23, 2019 at 2:26 PM Schrempf Frieder
> wrote:
>
>> As luck would have it, I needed to load a FIT via SDP today, so I came
>> up with a quick patch (see below). There are probably better ways to do
>> this, but it works.
>
>
On 5/23/19 5:17 PM, Tom Rini wrote:
> On Thu, May 23, 2019 at 04:04:17PM +0200, Marek Vasut wrote:
>> On 5/23/19 3:59 PM, Tom Rini wrote:
>>> On Thu, May 23, 2019 at 10:49:11AM -0300, Fabio Estevam wrote:
Hi Peng,
On Tue, May 21, 2019 at 10:38 PM Peng Fan wrote:
>> I will s
On 5/23/19 4:50 PM, Tom Rini wrote:
> On Thu, May 23, 2019 at 04:47:59PM +0200, Michael Nazzareno Trimarchi wrote:
>> Hi
>>
>> On Thu, May 23, 2019 at 4:33 PM Tom Rini wrote:
>>>
>>> On Thu, May 23, 2019 at 02:08:23PM +, Abel Vesa wrote:
On 19-05-23 09:59:05, Tom Rini wrote:
> On Thu,
On Wed, May 22, 2019 at 07:13:24AM -0600, Simon Glass wrote:
> Hi Tom,
>
> Results here:
>
> https://travis-ci.org/sglass68/u-boot/builds/535552345
>
> The following changes since commit e1a2ed7180adeefb6164239a18249dca5701319d:
>
> Merge git://git.denx.de/u-boot-mpc83xx (2019-05-21 07:13:35
Hi Schrempf,
On Thu, May 23, 2019 at 2:26 PM Schrempf Frieder
wrote:
> As luck would have it, I needed to load a FIT via SDP today, so I came
> up with a quick patch (see below). There are probably better ways to do
> this, but it works.
Thanks for your patch!
I would like to give it a try, bu
Add configs such that U-boot environment is in eMMC by default.
Signed-off-by: Faiz Abbas
---
configs/am65x_evm_a53_defconfig | 5 ++---
include/configs/am65x_evm.h | 10 ++
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am6
Add Support for creating GPT partitions in U-boot.
Signed-off-by: Faiz Abbas
---
configs/am65x_evm_a53_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 5fd9aacd68..43d2ccc5ed 100644
--- a/configs
From: Faiz Abbas
The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.
Also create a common API to set UHS timings in HOST_CONTROL2.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
drivers/mmc/sdhci.c | 28 +
Add Support for CONFIG_REGMAP.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
configs/am65x_evm_a53_defconfig | 2 ++
configs/am65x_evm_r5_defconfig | 2 ++
2 files changed, 4 insertions(+)
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index ff41d66e4d..3
Add Support for creating a GPT partition for the filesystem in eMMC.
The filesystem is created in the user partition (partition 0).
Signed-off-by: Faiz Abbas
---
include/configs/am65x_evm.h | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/include/configs/am65x_evm.h b
Add Support for masking some bits in the capabilities
register of a host controller.
Also remove the redundant readl() into caps1.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
drivers/mmc/sdhci.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/driver
The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.
Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
drivers/mmc
From: Faiz Abbas
Add a platform specific set_control_reg() callback to help switch to
UHS speed modes.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
drivers/mmc/am654_sdhci.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/am654_sdhci.c
With changes in the driver requiring phy related properties,
add the same for the SD card node to prevent breaking boot with
the driver update.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 3 +++
arch/arm/dts/k3-am654-r5-base-board.dts
Add support in the driver for handling phy specific registers.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
drivers/mmc/Kconfig | 1 +
drivers/mmc/am654_sdhci.c | 229 +-
2 files changed, 224 insertions(+), 6 deletions(-)
diff --git a/drivers/
Make set_ios_post() return int to faciliate error handling in
platform drivers.
Signed-off-by: Faiz Abbas
---
drivers/mmc/sdhci.c | 2 +-
drivers/mmc/xenon_sdhci.c | 4 +++-
include/sdhci.h | 2 +-
3 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/sdhci.c
In device nodes with more than one entry in the reg property,
it is sometimes useful to regmap only of the entries. Add an
API regmap_init_mem_index() to facilitate this.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
drivers/core/regmap.c | 42 ++
i
The host controller works perfectly well without having to add any
quirks. Remove them.
Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
---
drivers/mmc/am654_sdhci.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index 3afdb58293..699
Use f_max provided in mmc_config and remove it from the platform
specific data.
Signed-off-by: Faiz Abbas
---
drivers/mmc/am654_sdhci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index ede8a02b9b..2f8ecc383d 100644
--
Sync the sdhci0 node from kernel. This changes the compatible that is
required to be there in the driver. Change the same for the SD card node
which is not yet supported in kernel. This also syncs the main_pmx0 node
as a side effect.
Also change the name of the driver to match the compatible in ke
Add Support for eMMC in TI's AM65x-evm. The series starts
by syncing the sdhci0 node from the kernel. Then it adds APIs and
changes to the driver required for handling the driver's integrated
phy. The current maximum supported speed is DDR52. Higher speeds and
tuning support will be added in a subs
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