On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> The fsp_notify() API is the same for FSP1 and FSP2. Move it into a new
> common API file.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/x86/include/asm/fsp/fsp_api.h | 27 ++
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> Many Intel SoCs require a FIT in order to boot properly. Add an option to
> include this and enable it by default.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3:
> - Add help to CONFIG_FIT and don't make it 'default y'
The changelo
Hi Simon,
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> Newer Intel SoCs have different ways of setting up cache-as-ram (CAR).
> Add support for these along with suitable configuration options.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3:
> - Drop unneeded Kconfig file
>
> C
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> At present we don't support loading microcode with FSP2. The correct way
> to do this is by adding it to the FIT. For now, disable including
> microcode in the image.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3:
> - Drop unnecessa
The following patches add support for MMC/SD in J721e. Currently, SD
card is capped at 25 MBps and eMMC is capped at 50 MBps. Support for
higher speeds and eMMC boot support will be added in futures series.
Faiz Abbas (8):
mmc: am654_sdhci: Get Xin clock by name
mmc: am654_sdhci: Add Support f
Get clk_xin by name instead of by index to avoid having to put clocks in
the same order in all devices.
Signed-off-by: Faiz Abbas
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 3 ++-
drivers/mmc/am654_sdhci.c| 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff
Add Support for writing to PHY registers for J721e. There are number of
differences between the J721e 8 bit PHY, J721e 4 bit PHY and AM654 PHY.
Create a driver_data structure with an ops and flags field and use the
flags field to indicate these differences. The differences are as
follows:
1. The J
voltage-ranges properties are NOP. Remove them.
Signed-off-by: Faiz Abbas
---
arch/arm/dts/k3-j721e-common-proc-board.dts | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/dts/k3-j721e-common-proc-board.dts
b/arch/arm/dts/k3-j721e-common-proc-board.dts
index c978cabd13..f5c65f244f 1
Add pinmux for sdhci1 node connected to the SD card.
Signed-off-by: Faiz Abbas
---
.../k3-j721e-common-proc-board-u-boot.dtsi| 4
arch/arm/dts/k3-j721e-common-proc-board.dts | 20 ++-
.../arm/dts/k3-j721e-r5-common-proc-board.dts | 16 +++
3 files changed,
Add configs for ADMA Support.
Signed-off-by: Faiz Abbas
---
configs/j721e_evm_a72_defconfig | 2 ++
configs/j721e_evm_r5_defconfig | 1 +
2 files changed, 3 insertions(+)
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index f9396e612b..b8e8ce310e 100644
--- a/co
Enable CONFIG_FAT_WRITE
Signed-off-by: Faiz Abbas
---
configs/j721e_evm_a72_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index b8e8ce310e..1b69817732 100644
--- a/configs/j721e_evm_a72_defconfig
+++ b/configs/j721
Add CONFIG_CMD_GPT to help write GPT partitions to the eMMC. Also introduce
a default GPT partition table.
Signed-off-by: Faiz Abbas
---
configs/j721e_evm_a72_defconfig | 1 +
include/configs/j721e_evm.h | 6 ++
2 files changed, 7 insertions(+)
diff --git a/configs/j721e_evm_a72_defconf
Add config to save and read back environment from eMMC.
Signed-off-by: Faiz Abbas
---
configs/j721e_evm_a72_defconfig | 3 +++
include/configs/j721e_evm.h | 9 +
2 files changed, 12 insertions(+)
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index 8b
This is v2 set for fastboot support on rk3399, tested on
rock960 and rebased on u-boot-rockchip/master
Changes for v2:
- collect Levin Du Tested-by
- fix rk3399 product number (Thanks to Levin Du)
- add patch to fix fastboot flash device num for rk3328
- add patch to enable gadget on rock960
- reb
Select the gadget manufacturer as 'Rockchip' for
all rockchip platform SoC's.
This eventually drop the explicit defined added
on supported board defconfig files.
Tested-by: Levin Du
Signed-off-by: Jagan Teki
---
configs/elgin-rv1108_defconfig| 1 -
configs/evb-rk3036_defconfig | 1 -
Gadget vendor number, 0x2207 is common across all platfroms
supported in Rockchip SoC.
So, select the same number globally, if ARCH_ROCKCHIP.
This eventually drop the explicit configs defined in supported
board defconfig files.
Tested-by: Levin Du
Signed-off-by: Jagan Teki
---
configs/elgin-r
Rockchip support differnet or common gadget product number
between Rockchip SoCs like,
0x310a - rk3036
0x320a - rk3229, rk3288
0x330a - rk3328
So, select them on Kconfig based on platform specific
config defined.
This eventually drop the explicit configs defined in
supporting board defconfig
Add 0x310c for rk3128 gadget product number.
Tested-by: Levin Du
Signed-off-by: Jagan Teki
---
drivers/usb/gadget/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index e120b48b33..2da8b40e05 100644
--- a/drivers/usb/gadget/Kcon
Select CONFIG_FASTBOOT_FLASH, CONFIG_FASTBOOT_FLASH_MMC_DEV
for rockchip SoC plaforms in fastboot Kconfig file instead
of defined it in board defconfig.
This eventually drop the explicit configs defined in
supporting board defconfig files.
Tested-by: Levin Du
Signed-off-by: Jagan Teki
---
conf
Technically the default mmc device for fastboot would
use eMMC if the board support for it.
Rockchip platform access device 0 for eMMC so, use the
same device number for rk3328.
Signed-off-by: Jagan Teki
---
drivers/fastboot/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/fas
U-Boot has two different variants of dwc3 initializations,
- with dm variant gadget, so the respective dm driver would
call the dwc3_init in core.
- with non-dm variant gadget, so the usage board file would
call dwc3_uboot_init in core.
The driver probe would handle all respective gadget prope
Setup dwc3_device structure for non-dm gadgets, which is used
in rk3399 platforms.
dwc3_device would have basic regbase, dr_mode, high speed
and 16-bit UTMI+ etc.
Cc: Marek Vasut
Tested-by: Levin Du
Signed-off-by: Jagan Teki
---
arch/arm/mach-rockchip/board.c | 32
Add 0x330c for rk3399 gadget product number.
Tested-by: Levin Du
Signed-off-by: Jagan Teki
---
drivers/usb/gadget/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 2da8b40e05..58ca82d4de 100644
--- a/drivers/usb/gadget/Kcon
Enable DWC3 core, gadget for rock960 board.
This would help to use fastboot by default.
Signed-off-by: Jagan Teki
---
configs/rock960-rk3399_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index 979ca0f93b..d0ad
Hi Simon,
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> The current 'fsp' command only works with FSP1. Update it to handle FSP2
> as well. Convert everything to hex which is what U-Boot uses.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3:
> - Convert code to use hex increased
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> Include the IFWI section and the FSP-M binary. The FSP-T binary is not
> currently used, as CAR is set up manually.
>
> Also drop the FSP binary as this relates only to FSP1.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3:
> - Add FS
Hi Simon,
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> The existing work-around for positioning U-Boot in the ROM when it
> actually runs from RAM still exists and there is not obvious way to change
> this.
>
> Add a proper Kconfig option to handle this case. This also adds a new bool
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> Add these entries to the ROM so that we can list the contents of an image
> with 'binman ls'. The image-header is not essential but does speed up
> access.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> For apollolake SPL is run from CAR (cache-as-RAM) which is in a different
> location from where SPL must be placed in ROM. In other words, although
> SPL runs before SDRAM is set up, it is not execute-in-place (XIP).
>
> Add a Kconfig option
Add Support for ADMA in a53 and r5 defconfigs.
Signed-off-by: Faiz Abbas
---
configs/am65x_evm_a53_defconfig | 2 ++
configs/am65x_evm_r5_defconfig | 1 +
2 files changed, 3 insertions(+)
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 027e0a5948..dbeca1aa7
Recently the version check was improved to be able to determine that
we're running on SoC revision 2.1. A check for B0 was tightened so
that it now must equal 0x20 instead of being bigger than 0x20. On
some B0 chips the value returned is 0x1020 instead of 0x20. This
means even though it's B0, th
On Mon, Nov 18, 2019 at 02:18:55PM +0100, Jorge Ramirez-Ortiz wrote:
> On 11/18/19 1:42 PM, Jens Wiklander wrote:
> > [+ Igor and Sam]
> >
> > On Mon, Nov 18, 2019 at 12:18:27PM +0100, Jorge Ramirez-Ortiz wrote:
> >> On 11/18/19 10:36 AM, Jens Wiklander wrote:
> >>> Hi Jorge,
> >>
> >>
> >> hey!
>
On Mon, Nov 4, 2019 at 3:13 PM Stefan Mavrodiev wrote:
>
> When booting with sun8i_emac driver, the user get output like this:
>
> ...
> Net: phy interface7
> eth0: ethernet@1c3
> ...
>
> The first line doesn't provide any useful information except for the
> developers. I guess this
On Wed, Nov 6, 2019 at 3:28 AM Diego Rondini wrote:
>
> Orangepi Zero Plus 2 is an open-source single-board computer, available
> in two Allwinner SOC variants, H3 and H5. We add support for H3 variant
> here, as the H5 is already supported.
>
> H3 Orangepi Zero Plus 2 has:
> - Quad-core Cortex-A7
On Sun, Nov 10, 2019 at 8:40 AM Heinrich Schuchardt wrote:
>
> Compiling with GCC 9.2.1 leads to build errors:
>
> arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’:
> arch/arm/cpu/armv7/sunxi/psci.c:144:21: error: taking address of packed
> member of ‘struct sunxi_cpucfg_reg’ may
From: Heiko Stuebner
As part of loading trustedfirmware, the SPL is required to place portions
of code into the socs sram but the mmc controllers can only do dma
transfers into the regular memory, not sram.
The results of this are not directly visible in u-boot itself, but
manifest as security-r
Heiko,
> On 19.11.2019, at 11:03, Heiko Stuebner wrote:
>
> From: Heiko Stuebner
>
> As part of loading trustedfirmware, the SPL is required to place portions
> of code into the socs sram but the mmc controllers can only do dma
> transfers into the regular memory, not sram.
>
> The results of
Current Cadence QSPI driver has few limitations. It assumes all read
operations to be in Quad mode and thus does not support SFDP parsing.
Also, adding support for new mode such as Octal mode would not be
possible with current configuration. Therefore move the driver over to spi-mem
framework. This
Add support for DPSPARSER object (create/destroy, open/close, apply spb)
required to configure Soft Parser by using MC. Also add uboot command to
apply Soft Parser Blob with command: fsl_mc apply spb
Signed-off-by: Florinel Iordache
---
drivers/net/fsl-mc/Kconfig | 12 ++
drivers/net/fsl-
First patch moves driver over to spi-mem framework and implement
spi_mem_ops. This is require to support more SPI Flash opcodes like SFDP
parsing etc. Series is in prepartion to add Octal mode for support for
the same driver to support OSPI version of the controller.
Second patch adds DAC mode tha
Add support for Direct Access Controller mode of Cadence QSPI. This
allows MMIO access to SPI NOR flash providing better read performance.
Direct mode is only exercised if AHB window size is greater than 8MB.
Support for flash address remapping is also not supported at the moment
and can be added i
From: Heiko Stuebner
Rockchips dwmmc controllers can't do dma to non-ddr addresses,
like for example the soc-internal sram but during boot parts of
TrustedFirmware need to be placed there from the read FIT image.
So add handling for a u-boot,spl-fifo-mode to not put the mmc
controllers into fifo
From: Heiko Stuebner
As part of loading trustedfirmware, the SPL is required to place portions
of code into the socs sram but the mmc controllers can only do dma
transfers into the regular memory, not sram.
The results of this are not directly visible in u-boot itself, but
manifest as security-r
On 11/19/19 9:26 AM, Jagan Teki wrote:
> U-Boot has two different variants of dwc3 initializations,
> - with dm variant gadget, so the respective dm driver would
> call the dwc3_init in core.
> - with non-dm variant gadget, so the usage board file would
> call dwc3_uboot_init in core.
>
> The
Hi Joe,
Just a gentle reminder to insure this patch will be reviewed and if possible
merged for v2020.01 release.
Without this patch, all STM32 MCU boards without NET support can't use sysboot
command to load linux image.
Thanks
Patrice
On 10/30/19 9:04 AM, Patrice Chotard wrote:
> It allow
CONFIG_MTD_NOR_FLASH flag needs to be enable for all
boot sources,as all flash drivers need to compile in
TFA Boot.Probe ifc nor flash only when there is nor
flash available on board.So needs to detect ifc-nor
flash at run-time for probing.
Signed-off-by: Pankit Garg
---
common/board_r.c | 8 +++
Signed-off-by: Pankit Garg
---
env/mmc.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/env/mmc.c b/env/mmc.c
index 9f1878def1..832e11cde6 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -362,6 +362,7 @@ static int env_mmc_load(void)
int ret;
int dev = mmc_get_env_dev();
On 11/19/19 10:02 AM, Jens Wiklander wrote:
> On Mon, Nov 18, 2019 at 02:18:55PM +0100, Jorge Ramirez-Ortiz wrote:
>> On 11/18/19 1:42 PM, Jens Wiklander wrote:
>>> [+ Igor and Sam]
>>>
>>> On Mon, Nov 18, 2019 at 12:18:27PM +0100, Jorge Ramirez-Ortiz wrote:
On 11/18/19 10:36 AM, Jens Wiklande
Hei hei,
Am Sonntag, 17. November 2019, 23:22:30 CET schrieb Winston Gao:
> I am trying to create a bootstrap image for iMX6 and the command mkimage
> fails like below:
mkimage as you call it for a legacy image takes a binary file and puts a
special 64 byte header in front of it. This way U-Boot
Hello,
Am Dienstag, 19. November 2019, 13:12:20 CET schrieb Alexander Dahl:
> > Further investigation shows that the error is caused by that there is
> > c-type comments (/*...*/) in imximage.cfg file. When I remove all the
> > c-type comments in the file, it works fine.
>
> Well, -n sets a name
On Sat, Nov 16, 2019 at 07:56:50AM +0100, Heiko Schocher wrote:
> as time for job exceeds split this job into two
> jobs. One which builds all "ls10" boards and
> one which catch all the rest.
>
> Signed-off-by: Heiko Schocher
> ---
> travis build:
> https://travis-ci.org/hsdenx/u-boot-test/buil
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> At present if SPL sets up the microcode then it is still included in
> U-Boot as well. This is wasteful as microcode is large. Adjust the logic
> in the image to prevent this.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Ch
+Vignesh
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> We don't normally need this on x86 unless the size of SPI flash devices is
> larger than 16MB. This can be enabled by particular SoCs as needed, since
> it adds to code size.
>
> Drop the default enabling of this option on x86.
>
>
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> This is used on several boards so add it to the common file. Also add a
> useful power-limit value while we are here.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/x86/include/asm/arch-broadwell
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> At present binman does not support updating a device tree that is part of
> U-Boot (i.e u-boot.bin). Separate the entries into two so that we can get
> updated entry information. This makes binman_entry_find() work correctly.
>
> Signed-off-b
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> At present we have to have an xfer() method even if it does nothing. This
> is not correct, so fix it.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/spi/ich.c| 9 +
> drivers/
Orangepi Zero Plus 2 is an open-source single-board computer, available
in two Allwinner SOC variants, H3 and H5. We add support for H3 variant
here, as the H5 is already supported.
H3 Orangepi Zero Plus 2 has:
- Quad-core Cortex-A7
- 512MB DDR3
- microSD slot and 8GB eMMC
- Debug TTL UART
- HDMI
Hi Simon,
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> Reduce the size of the probe function but putting this code into its own
> function.
>
It's unclear to me why this brings any benefit? The size of the probe
function indeed is reduced, but whole file size does not change, no?
> A
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> It is annoying to have some of the init code in a different part of the
> file. Move ich_init_controller() to just above probe() to keep things
> together.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> Use debug() instead of printf() to reduce code size and change a bool
> return value to the use the 'bool' type. Also drop the global data
> declaration since it not actually used. Finally, set the log category.
>
> Signed-off-by: Simon Glass
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> Move the header files into the right order.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/spi/ich.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Bin Meng
_
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> Use dev_get_driver_data() to obtain the device type. It has the same
> effect and is shorter.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/spi/ich.c | 22 +-
> 1 file cha
On Sat, Nov 16, 2019 at 07:58:23AM +0100, Heiko Schocher wrote:
> sun8i 32bit job needs to long, so split this job into
> 2 jobs. One which build all orangepi sun8i boards and
> the other job catches all other sun8i 32bit boards.
>
> Signed-off-by: Heiko Schocher
> ---
> travis build:
> https://
Hi Eugen,
On 18/11/2019 08:59, eugen.hris...@microchip.com wrote:
@@ -582,14 +604,15 @@ static int at91_gpio_probe(struct udevice *dev)
clk_free(&clk);
- uc_priv->bank_name = plat->bank_name;
- uc_priv->gpio_count = GPIO_PER_BANK;
-
#if CONFIG_IS_ENABLED(OF_CONTROL)
On 19.11.2019 16:17, James Byrne wrote:
>
> Hi Eugen,
>
> On 18/11/2019 08:59, eugen.hris...@microchip.com wrote:
>>> @@ -582,14 +604,15 @@ static int at91_gpio_probe(struct udevice *dev)
>>>
>>> clk_free(&clk);
>>>
>>> - uc_priv->bank_name = plat->bank_name;
>>> - uc_priv
Hi Simon,
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> It is useful to store the mmio base in platdata. It reduces the amount of
> casting needed. Update the code and move the struct to the C file at the
> same time, as we will need to use with of-platdata.
>
> Signed-off-by: Simon Gla
Hi Simon,
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> This incorrectly shortens read operations if there is a maximum write size
> but no maximum read size. Fix it.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/spi/ich.c | 8 +---
Hi Simon,
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> Apollolake (APL) only supports hardware sequencing. Add support for this
> into the SPI driver, as an option.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/spi/ich.c | 205
Hi Simon,
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> Add this method so that the memory-mapped location of the SPI flash can
> be queried.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/spi/ich.c | 32
Hi Simon,
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> The Intel Fast SPI interface is similar to ICH. Add of-platdata support
> for this using the "intel,fast-spi" compatible string.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/spi/i
Hi Simon,
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> In TPL we want to reduce code size and support running with CONFIG_PCI
> disabled. Add special code to handle this using a fixed BAR programmed
> into the SPI on boot. Also cache the SPI flash to speed up boot.
>
> Signed-off-by: S
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> With of-platdata we need to create drivers for particular chips, or at
> least drivers that are separate from the standard code, since C structures
> are created by dtoc which are private to that driver.
>
> To avoid duplicating the probing c
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> Add some fixed IO and mmap addresses for use in the device tree and with
> some early-init code.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/x86/include/asm/arch-apollolake/iomap.h | 28 ++
Hi Simon,
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> Add support for Apollolake to the ICH driver. This involves adjusting the
> mmio address and skipping setting of the bbar.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/spi/ich.c |
From: Matthias Brugger
In this series we prepare the RaspberryPi source code
to be able to build one binary for RPi[3,4] and one for RPi[1,2].
To achieve this we need to set the IO base address on runtime. Apart
from that, for arm64 we also need to set memory region correctly.
This patches fix t
From: Matthias Brugger
The fw_dtb_pointer was defined in the assembly code, which makes him
live in section .text_rest
Put that's not necessary, we can push the variable in the .data section.
This will prevent relocation errors like:
board/raspberrypi/rpi/rpi.c:317:(.text.board_get_usable_ram_to
From: Matthias Brugger
For bcm283x based on arm64 we also have to change the mm_region.
Add assign this in mach_cpu_init() so we can create now one binary
for RPi3 and RPi4.
Signed-off-by: Matthias Brugger
---
Changes in v4:
- call rpi_update_mem_map only for ARM64
- get rid of struct pdata
From: Matthias Brugger
As part of the effort to create one binary for several bcm83x SoCs
we read the IO base address from device-tree.
Signed-off-by: Matthias Brugger
---
Changes in v4:
- read IO base from device-tree
Changes in v3: None
Changes in v2:
- rename BCM2838 to BCM2711 in the cor
From: Matthias Brugger
We move the per SOC define BCM283x_BASE to a global variable.
This is a first step to provide a single binary for several bcm283x
SoCs.
Signed-off-by: Matthias Brugger
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- fix register access in reset_cpu()
arch
On 11/18/19 2:46 PM, Vignesh Raghavendra wrote:
> xhci.h has now been moved to include/usb/ folder. Therefore, update the
> path in the Cadence USB drivers.
>
> Signed-off-by: Vignesh Raghavendra
Fixed and applied. thanks.
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U-Boo
On 11/19/19 4:27 AM, Ley Foon Tan wrote:
> On Thu, Nov 14, 2019 at 3:46 AM Simon Goldschmidt
> wrote:
>>
>> Am 08.11.2019 um 05:11 schrieb Ley Foon Tan:
>>> Add device tree files for Agilex SoC platform.
>>>
>>> Based on Linux Commit ID 4b36daf9ada30.
>>
>> Based on? Why is this not a copy of
Hi,
On 18. 11. 19 22:04, Grygorii Strashko wrote:
> hi
>
> The intention of this series is to sync TI DP83867 driver with mainline Linux
> kernel and ensure that proper PHY configuration in "rgmii-rxid" mode, which
> is done in the Patch 8.
>
> It also some code refactoring and optimization: pat
On Tue, Nov 19, 2019 at 04:35:57AM +0100, Heinrich Schuchardt wrote:
> With an implementation for allow_unaligned() available for arm1136 and
> arm1176 UEFI can be supported on these architectures.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> lib/efi_loader/Kconfig | 6 --
> 1 file changed
On Thu, Nov 14, 2019 at 02:44:24PM +0530, Vignesh Raghavendra wrote:
> Flush caches when pushing an element to ring and invalidate caches when
> popping an element from ring in Exposed Ring mode. Otherwise DMA
> transfers don't work properly in R5 SPL (with caches enabled) where the
> core is not
On Thu, Nov 14, 2019 at 02:44:22PM +0530, Vignesh Raghavendra wrote:
> Import few basic bitmap functions (bitmap_{weight,fill,set,clear,or}())
> and their dependencies from Linux. These are required for upcoming DMA
> resource allocation support for TI's K3 SoCs.
>
> Signed-off-by: Vignesh Raghav
On Sun, Nov 17, 2019 at 11:00:40AM +0100, Heinrich Schuchardt wrote:
> fatload USB was reported to fail on the Sheevaplug. Debugging showed that
> this was caused by an incorrect unaligned write to memory in
> path_to_uefi().
>
> UEFI on ARM requires that unaligned memory access is enabled.
>
>
Make the at91_gpio driver set sensible GPIO bank names in the platform
data. This makes the 'gpio status' command a lot more useful.
Signed-off-by: James Byrne
---
Changes in v2:
- Use "undefined" for an unknown bank name.
drivers/gpio/at91_gpio.c | 29 ++---
1 file ch
Hi Tom,
Please have a look at the below patches.
Travis-ci can be found here:
https://travis-ci.org/mbgg/u-boot/builds/614078145
Apart from this patches, I planning to send another pull request once the single
binary series is ready to be merged. But for now, we should take this patches as
it fix
On 15/11/2019 14:47, Marek Szyprowski wrote:
> Enable support for DFU over USB. This requires to enable USB gadget,
> DWC2 UDC OTG driver and DFU command. DFU entities are defined for the
> following firmware objects: u-boot.bin, uboot.env, config.txt and
> zImage/Image.
>
> Signed-off-by: Marek
On 11/19/19 12:53 PM, Jorge Ramirez-Ortiz wrote:
> On 11/19/19 10:02 AM, Jens Wiklander wrote:
>> On Mon, Nov 18, 2019 at 02:18:55PM +0100, Jorge Ramirez-Ortiz wrote:
>>> On 11/18/19 1:42 PM, Jens Wiklander wrote:
[+ Igor and Sam]
On Mon, Nov 18, 2019 at 12:18:27PM +0100, Jorge Ramir
Add env_force() to provide an equivalent to 'setenv -f' that can be used
programmatically.
Also tighten up the definition of argv in _do_env_set() so that
'const char *' pointers are used.
Signed-off-by: James Byrne
---
cmd/nvedit.c | 43 +--
include/e
Greetings,
I'm working on converting IMX6 based Gateworks Ventana board support
to DM which requires me to put many dtb's (36 currently!) into a FIT
image. The size of the FIT image has grown to 2MiB more than 2x the
size of u-boot-notdtb.bin so I want to use compression.
It appears that MULTI_DT
Hi Bin,
On Tue, 19 Nov 2019 at 05:53, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
> >
> > Reduce the size of the probe function but putting this code into its own
> > function.
> >
>
> It's unclear to me why this brings any benefit? The size of the probe
Hi Bin,
On Tue, 19 Nov 2019 at 06:36, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
> >
> > It is useful to store the mmio base in platdata. It reduces the amount of
> > casting needed. Update the code and move the struct to the C file at the
> > same time
Hi Bin,
On Tue, 19 Nov 2019 at 06:36, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
> >
> > The Intel Fast SPI interface is similar to ICH. Add of-platdata support
> > for this using the "intel,fast-spi" compatible string.
> >
> > Signed-off-by: Simon Glas
On 11/19/19 4:22 PM, Tom Rini wrote:
On Tue, Nov 19, 2019 at 04:35:57AM +0100, Heinrich Schuchardt wrote:
With an implementation for allow_unaligned() available for arm1136 and
arm1176 UEFI can be supported on these architectures.
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/Kconfig
The following changes since commit d4a31e8ee5592072d8d5208b3e950cba2d89b6bd:
Prepare v2020.01-rc3 (2019-11-18 21:31:49 -0500)
are available in the Git repository at:
https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git
tags/efi-2020-01-rc4
for you to fetch changes up to 38064ee04c9b42a2
On Tue, Nov 19, 2019 at 07:11:46PM +0100, Heinrich Schuchardt wrote:
> On 11/19/19 4:22 PM, Tom Rini wrote:
> > On Tue, Nov 19, 2019 at 04:35:57AM +0100, Heinrich Schuchardt wrote:
> > > With an implementation for allow_unaligned() available for arm1136 and
> > > arm1176 UEFI can be supported on th
Move BOOTP_DNS2 and PHY_TI from dra7xx_evm.h to
dra7xx_evm_defconfig.
Signed-off-by: Grygorii Strashko
---
configs/dra7xx_evm_defconfig| 2 ++
configs/dra7xx_hs_evm_defconfig | 2 ++
configs/dra7xx_hs_evm_usb_defconfig | 2 ++
include/configs/dra7xx_evm.h| 2 --
4 files chang
Dear maintainers,
"Pull request for UEFI sub-system for efi-2020-01-rc4" disables the UEFI
sub-system for all boards except ARMv8, ARMv7, ARM11. This is necessary
as UEFI requires support for unaligned access. For ARM11 a function is
provided to switch unaligned access support on.
Tom suggested
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