> From: Ye Li
> Assign the LPAV owner to RTD, and assign LPAV masters and peripherals
> to APD. So except the masters and peripherals, other resources
> (like DDR, cgc2, pcc5) in LPAV won't be reset during reboot and suspend.
> No needs to initialize DDR again after reboot.
> Reviewed-by: Peng Fan
> Add settings for operating PLL at 933 MHz. This setting is useful in
> case the LPDDR4 DRAM should operate at 1866 MHz or 3733 MT/s.
> Signed-off-by: Marek Vasut
> Cc: Fabio Estevam
> Cc: Peng Fan
> Cc: Stefano Babic
> Reviewed-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best
> From: Ye Li
> The EFI memory init uses gd->ram_top for conventional memory. In
> current implementation, the ram_top is below optee address. This cause
> grub failed to allocation memory for initrd.
> The change updates DDR bank setup functions to place the u-boot at top
> DDR in 4GB space.
> Re
> Sync the clock ids with the mainline kernel
> 077de6e1c9f ("clk: imx8mq: add PLL monitor output")
> Signed-off-by: Angus Ainslie
> Reviewed-by: Marek Vasut
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
> Add pwm control registers fields defines into imx-regs.h:
> - prescaler
> - dozeen
> - waiten
> - dbgen
> - clksrc_ipg_high
> - clksrc_ipg, en field
> References:
> - iMX8MMRM.pdf p 3884
> Signed-off-by: Tommaso Merciai
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
> From: Marcel Ziswiler
> Fix NAND BCH geometry as otherwise the following errors are observed
> upon boot:
> ...
> Loading Environment from NAND... NAND read from offset 38 failed -74
> ...
> NAND read from offset 800 failed -74
> ...
> ubi0 error: ubi_io_read: error -74 (ECC error) while rea
> The power/bd71837.h should no longer be included, since V1.1 SoM
> uses only the PCA9450 PMIC and the BD71837 support was removed.
> Drop the header too.
> Signed-off-by: Marek Vasut
> Cc: Fabio Estevam
> Cc: Marcel Ziswiler
> Cc: Max Krummenacher
> Cc: Peng Fan
> Cc: Stefano Babic
> Acked-
> From: Ye Li
> This workaround is not needed on i.MX8ULP proto-1B EVK as board has
> fixed the problem. Because we don't support proto-1A any longer,
> remove the PMIC settings.
> Reviewed-by: Peng Fan
> Signed-off-by: Ye Li
> Signed-off-by: Peng Fan
Applied to u-boot-imx, master, thanks !
Be
> Add support for Data Modul i.MX8M Mini eDM SBC board. This is an
> evaluation board for various custom display units. Currently
> supported are serial console, ethernet, eMMC, SD, SPI NOR,
> USB host and USB OTG.
> Reviewed-by: Fabio Estevam
> Signed-off-by: Marek Vasut
> Cc: Fabio Estevam
> C
> Add pwm1/backlight support nodes for imx8mm_evk board
> Signed-off-by: Tommaso Merciai
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang
> The Ethernet controller and PHY use the device tree info to
> configure themselves, so it's not necessary to manually do it
> in the board file. This permits the removal of a bunch of headers
> as well.
> Signed-off-by: Adam Ford
> Reviewed-by: Fabio Estevam
> Acked-by: Peng Fan
> diff --git
> From: Marcel Ziswiler
> Enable driver model for serial.
> Signed-off-by: Marcel Ziswiler
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfga
> From: Clement Faure
> Add ahab_release_caam() function to the S400 API.
> Signed-off-by: Clement Faure
> Signed-off-by: Peng Fan
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Enginee
> From: Peng Fan
> The extcon is an decrepted property and not used by upstream Linux and
> NXP 5.10 kernel, so we remove it before kicking linux in case it is in
> dts. Otherwise distro kernel will not able to have usb function.
> Reviewed-by: Ye Li
> Signed-off-by: Peng Fan
Applied to u-boot-i
On Thu, Mar 31, 2022 at 10:09:38AM +, Andrew Scull wrote:
> Continuing the theme of making the virtio code resilient against
> corruption of the buffers shared with the device, this series focusses
> on the vring. This series is simpler and more self-contained than the
> series for virtio-pci!
Hi Peng,Ye,
On 06.04.22 08:30, Peng Fan (OSS) wrote:
From: Ye Li
Since ATF power domain will hold the enable counter for each power domain,
We need to power off them before entering kernel to avoid this
power domain can't be really powered off.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
-
On Tue, Mar 29, 2022 at 04:58:55PM +, Andrew Scull wrote:
> Evolve dm_pci_map_bar() to include an offset and length parameter. These
> allow a portion of the memory to be mapped and range checks to be
> applied.
>
> Passing both the offset and length as zero results in the previous
> behaviou
On Wed, Mar 30, 2022 at 12:30:04PM +0300, Andy Shevchenko wrote:
> As in ASL case use same basic set of the inclusions.
>
> Signed-off-by: Andy Shevchenko
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Thu, May 20, 2021 at 05:36:03PM +0200, Heinrich Schuchardt wrote:
> In cpu_to_be32_array() and be32_to_cpu_array() we should not compare an int
> counter to a size_t parameter. Correct the type of the counter. This
> exists in upstream as b4c80629c5c9 ("include/linux/byteorder/generic.h:
> fix
Hi Sean,
On 12/04/2022 12:56, Sean Anderson wrote:
Hi Fabio,
On 3/19/22 8:22 AM, Fabio Estevam wrote:
From: Fabio Estevam
Currently the eth0 MAC address is randomly assigned.
Retrieve the MAC address from EEPROM.
A bit of a plug, but can you try [1]? For your board, I believe your
device
Hi Stefano,
On 12/04/2022 12:33, Stefano Babic wrote:
Hi Fabio,
I get an error by applying your patches:
aarch64: + imx8mm-cl-iot-gate-optee
Ops, I missed to update imx8mm-cl-iot-gate-optee_defconfig.
I have sent v2 with the correction.
Thanks,
Fabio Estevam
From: Fabio Estevam
Add redundand environment support as it is required
by SWUpdate.
While at it, also adjust the CONFIG_ENV_OFFSET to a more appropriate
larger offset as done on other i.MX8M defconfigs.
Signed-off-by: Fabio Estevam
---
Changes since v1:
- None
configs/imx8mm-cl-iot-gate_def
From: Fabio Estevam
The serial number is located at offset 0x14 of the EEPROM
under i2c0 bus at address 0x54.
To print the serial number in Linux:
SERNUM=$(cat /proc/device-tree/serial-number)
echo $SERNUM
Signed-off-by: Fabio Estevam
---
Changes since v1:
- None
.../imx8mm-cl-iot-gate/imx8
From: Fabio Estevam
Currently the eth0 MAC address is randomly assigned.
Retrieve the MAC address from EEPROM.
Signed-off-by: Fabio Estevam
---
Changes since v1:
- Also update imx8mm-cl-iot-gate-optee_defconfig to fix the build (Stefano).
arch/arm/dts/imx8mm-cl-iot-gate.dts | 12 ++
From: Fabio Estevam
Currently, the DDR type is retrieved by iteracting inside an array
of possible DDR types.
This may take saveral attempts, which slows the overall U-Boot process
and does not provide a good user experience:
U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +)
DDRINFO: Cfg attemp
From: Fabio Estevam
imx8mm-cl-iot-gate supports multiple DDR sizes and models.
The DDR type can be retrieved from the EEPROM, so add SPL code
that can be used to get the DDR information.
Based on the original code from Compulab's U-Boot.
Signed-off-by: Fabio Estevam
---
Changes since v1:
- No
Add support for Data Modul i.MX8M Mini eDM SBC board. This is an
evaluation board for various custom display units. Currently
supported are serial console, ethernet, eMMC, SD, SPI NOR,
USB host and USB OTG.
Reviewed-by: Fabio Estevam
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc
Hi Fabio,
On 3/19/22 8:22 AM, Fabio Estevam wrote:
> From: Fabio Estevam
>
> Currently the eth0 MAC address is randomly assigned.
>
> Retrieve the MAC address from EEPROM.
A bit of a plug, but can you try [1]? For your board, I believe your
device tree would be something like
&fec1 {
Hi Fabio,
I get an error by applying your patches:
aarch64: + imx8mm-cl-iot-gate-optee
+= WARNING ==
+This board does not use CONFIG_DM_SERIAL (Driver Model
+for Serial drivers). Please update the board to use
+CONFIG_DM_SERIAL before the v2023.04 re
If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alt
On Tue, Mar 29, 2022 at 03:52:39PM -0700, Tim Harvey wrote:
> Add a DSA driver for the MV88E61xx compatible GbE Ethernet switches.
>
> Signed-off-by: Tim Harvey
> ---
> drivers/net/Kconfig | 7 +
> drivers/net/Makefile| 1 +
> drivers/net/mv88e61xx.c | 982 +++
On Mon, 11 Apr 2022 at 19:36, Simon Glass wrote:
>
> Hi Andrew,
>
> On Thu, 7 Apr 2022 at 03:41, Andrew Scull wrote:
> >
> > Add a fuzzer to test the vring handling code against unexpected
> > mutations from the virtio device.
> >
> > After building the sandbox with CONFIG_FUZZ=y, the fuzzer can
On Mon, Apr 11, 2022 at 1:18 PM Francesco Dolcini
wrote:
>
> Hello all,
> I have a need to pass the u-boot version string to the operating
> system and I'm thinking at adding `u-boot,version` property storing
> `version_string` in it in the FDT `chosen` node.
>
> Is this something that would be ge
Introduce BSH SystemMaster (SMM) S2 board family, which consists of:
iMX8MN SMM S2 and iMX8MN SMM S2 PRO boards.
Add support for iMX8MN BSH SMM S2 board:
- 256 MiB DDR3 RAM
- 512MiB Nand
- USBOTG1 peripheral - fastboot.
- 100Mbit Ethernet
Add support for iMX8MN BSH SMM S2 PRO board:
- 512 MiB D
From: Michael Trimarchi
Add driver for the NXP TJA1100 and TJA1101 PHYs. These PHYs are special
BroadRReach 100BaseT1 PHYs used in automotive.
Signed-off-by: Michael Trimarchi
Signed-off-by: Ariel D'Alessandro
Reviewed-by: Ramon Fried
---
drivers/net/phy/Kconfig | 5 +
drivers/net/ph
> Signed-off-by: Gaurav Jain
> Reviewed-by: Ye Li
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirche
> LS(1021/1012/1028/1043/1046/1088/2088), LX2160, LX2162
> platforms are enabled with JR driver model.
> removed sec_init() call from board files.
> sec is initialized based on job ring information processed
> from device tree.
> Signed-off-by: Gaurav Jain
> Reviewed-by: Priyanka Jain
> Reviewed-
> added device tree support for job ring driver.
> sec is initialized based on job ring information processed
> from device tree.
> Signed-off-by: Gaurav Jain
> Reviewed-by: Ye Li
> Reviewed-by: Simon Glass
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
===
> updated CAAM driver files maintainer.
> Signed-off-by: Gaurav Jain
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Muni
> i.MX8MM/MN/MP/MQ - added support for JR driver model.
> sec is initialized based on job ring information processed
> from device tree.
> Signed-off-by: Gaurav Jain
> Reviewed-by: Ye Li
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
> i.MX6,i.MX6SX,i.MX6UL - added support for JR driver model.
> removed sec_init() call, sec is initialized based on
> job ring information processed from device tree.
> Signed-off-by: Gaurav Jain
> Reviewed-by: Ye Li
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
==
> added crypto node in device tree.
> sec is initialized based on job ring information processed
> from device tree.
> Signed-off-by: Gaurav Jain
> Reviewed-by: Ye Li
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
> i.MX7D - added support for JR driver model.
> removed sec_init() call, sec is initialized based on
> job ring information processed from device tree.
> Signed-off-by: Gaurav Jain
> Reviewed-by: Ye Li
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
> i.MX8(QM/QXP) - updated device tree for supporting DM in SPL.
> disabled use of JR1 in SPL and uboot, as JR1 is reserved
> for SECO FW.
> Signed-off-by: Gaurav Jain
> Reviewed-by: Ye Li
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
===
> Enable LTO on mamoj to reduce SPL and uboot size. Tested with gcc
> gcc-11.1.0
> U-Boot 2022.04-rc4-00051-g17fc5facd0 (Mar 23 2022 - 16:43:43 +0100)
> CPU: Freescale i.MX6DL rev1.3 996 MHz (running at 792 MHz)
> CPU: Extended Commercial temperature grade (-20C to 105C) at 40C
> Reset cause: P
> i.MX8(QM/QXP) - added support for JR driver model.
> sec is initialized based on job ring information processed
> from device tree.
> Signed-off-by: Gaurav Jain
> Signed-off-by: Horia Geantă
> Reviewed-by: Ye Li
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
> device tree imported from linux kernel.
> c500bee1c5b2 (tag: v5.14-rc4) Linux 5.14-rc4
> Signed-off-by: Gaurav Jain
> Reviewed-by: Priyanka Jain
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX S
> LS(1021/1012/1028/1043/1046/1088/2088), LX2160 - updated device tree
> Signed-off-by: Gaurav Jain
> Reviewed-by: Priyanka Jain
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineerin
> removed sec_init() call from board files.
> sec is initialized based on job ring information processed
> from device tree.
> Signed-off-by: Gaurav Jain
> Reviewed-by: Priyanka Jain
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
> From: Ye Li
> Because we don't use SPL_DM on mx6sabresd and mx6sabreauto, so it is
> unnecessary to have SPL DTB related configs and SPL_OF_CONTROL enabled.
> Signed-off-by: Ye Li
> Reviewed-by: Fabio Estevam
> Reviewed-by: Gaurav Jain
Applied to u-boot-imx, master, thanks !
Best regards,
St
Add read-modify-write unlocked accessor for accessing a PHY register.
Signed-off-by: Ariel D'Alessandro
Reviewed-by: Ramon Fried
---
drivers/net/phy/phy.c | 20
include/phy.h | 2 ++
2 files changed, 22 insertions(+)
diff --git a/drivers/net/phy/phy.c b/drivers/ne
This macro currently supports only one parameter. Based on Linux iopoll,
let's extend read_poll_timeout common API to allow multiple variable
parameters.
Signed-off-by: Ariel D'Alessandro
---
arch/arm/mach-socfpga/reset_manager_s10.c | 20 +++-
drivers/mmc/rockchip_sdhci.c
This driver supports NXP C45 TJA11XX PHYs, but there're also other NXP
TJA11XX PHYs. Let's rename functions in this driver to be c45 variant
specific, so further drivers can be introduced adding support for NXP
TJA11XX PHYs.
Signed-off-by: Ariel D'Alessandro
---
drivers/net/phy/nxp-c45-tja11xx.c
From: Michael Trimarchi
Add init_nand_clk to enable gpmi nand clock. Since i.MX8M not use CCF,
so we still use legacy mode to configure the clock.
Signed-off-by: Michael Trimarchi
---
arch/arm/include/asm/arch-imx8m/clock.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/a
From: Michael Trimarchi
Add regs used by GPMI
Signed-off-by: Michael Trimarchi
Signed-off-by: Ariel D'Alessandro
Reviewed-by: Fabio Estevam
---
arch/arm/include/asm/arch-imx8m/imx-regs.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h
b/
Introduce BSH SystemMaster (SMM) S2 board family, which consists of:
iMX8MN SMM S2 and iMX8MN SMM S2 PRO boards.
This patchset also adds support for NXP TJA11xx Ethernet PHYs.
Changes in v5:
* Export init_nand_clk() function.
* Drop __ASSEMBLY__ in ddr config.
* Init nand clk in spl, required whe
On Tue, Apr 12, 2022 at 7:01 AM Tom Rini wrote:
>
> On Tue, Apr 12, 2022 at 12:43:15PM +0100, Abdellatif El Khlifi wrote:
> > On Thu, Apr 07, 2022 at 08:58:11AM -0400, Tom Rini wrote:
> > > On Thu, Apr 07, 2022 at 01:54:24PM +0100, Abdellatif El Khlifi wrote:
> > > > On Wed, Apr 06, 2022 at 03:47:
On Tue, Apr 12, 2022 at 04:03:37PM +0800, Jim Liu wrote:
> The patch series add basic supoorts for NPCM750, which
> is Nuvoton's 3th-generation BMC (Baseboard Management Controller).
> Add drivers to support Clock,Timer,Uart for NPCM7xx SoC.
>
> the NPCM750 computing subsystem comprises a dual-co
Update the capsule update functionality related documentation to
refect the additional definitions that need to be made per platform
for supporting the capsule update feature.
Signed-off-by: Sughosh Ganu
---
Changes since V5: None
doc/develop/uefi/uefi.rst | 51
While building a capsule, the GUID value of that specific image is to
be passed through the --guid command option to the mkeficapsule
tool. This renders the EFI_FIRMWARE_IMAGE_TYPE_UBOOT_FIT_GUID and
EFI_FIRMWARE_IMAGE_TYPE_UBOOT_RAW_GUID values superfluous. Remove the
--raw and --fit command line
The capsule update code has been modified for getting the image GUID
values from the platform code. With this, each image now has a unique
GUID value. With this change, there is no longer a need for defining
GUIDs for FIT and raw images. Remove these GUID values.
Signed-off-by: Sughosh Ganu
Revie
The current UEFI capsule updation code uses two GUID values, one for
FIT images, and one for raw images across platforms. This logic is
being changed to have GUID values per image, per platform. Change the
tests for the capsule update code to reflect this change. The GUID
values now used are the on
Currently, there are a bunch of boards which enable the UEFI capsule
update feature. The actual update of the firmware images is done
through the dfu framework which uses the dfu_alt_info environment
variable for getting information on the update, like device, partition
number/address etc. The dfu
The current capsule update code compares the image GUID value in the
capsule header with the image GUID value obtained from the
GetImageInfo function of the Firmware Management Protocol(FMP). This
comparison is done to ascertain if the FMP's SetImage function can be
called for the update. Make this
Currently, the image descriptor array that has been passed to the
GetImageInfo function of the Firmware Management Protocol(FMP) gets
populated through the data stored with the dfu framework. The
dfu data is not restricted to contain information only of the images
updatable through the capsule upda
Add a structure which defines the information that is needed for
executing capsule updates on a platform. Some information in the
structure like the dfu string is used for making the update process
more robust while some information like the per platform image GUIDs
is used for fixing issues. Initi
This series is cleaning up the usage of the image GUIDs that are used
in capsule update and the EFI System Resource Table(ESRT). There are
some other enhancements being made to the capsule update code to make
it more robust.
Firstly, an overview of the fixes being made.
Currently, there are two
On 12.04.22 13:50, Ariel D'Alessandro wrote:
Hi Stefano,
On 4/11/22 12:56, Stefano Babic wrote:
Hi Ariel,
On 11.04.22 13:56, Ariel D'Alessandro wrote:
Hi,
Gentle re-ping. What's blocking this?
This has been reviewed and queued for some time already. Please, be
clear on the status or what's t
On Tue, Apr 12, 2022 at 12:43:15PM +0100, Abdellatif El Khlifi wrote:
> On Thu, Apr 07, 2022 at 08:58:11AM -0400, Tom Rini wrote:
> > On Thu, Apr 07, 2022 at 01:54:24PM +0100, Abdellatif El Khlifi wrote:
> > > On Wed, Apr 06, 2022 at 03:47:11PM -0400, Tom Rini wrote:
> > > > On Tue, Mar 29, 2022 at
On Tue, Apr 12, 2022 at 07:09:24AM -0300, Fabio Estevam wrote:
> Hi Peng,
>
> Thanks for reworking this series.
>
> On Tue, Apr 12, 2022 at 12:33 AM Peng Fan (OSS) wrote:
> >
> > From: Peng Fan
> >
> > Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
> > marked with u-boot,dm-spl.
> >
On Tue, Mar 29, 2022 at 02:02:38PM -0400, Sean Anderson wrote:
> If .bss does not immediately follow the end of the image, then
> CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
> is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
> these arches, CONFIG
On Tue, Apr 12, 2022 at 05:43:49PM +0800, Peng Fan (OSS) wrote:
>
>
> On 2022/4/11 21:45, Tom Rini wrote:
> > On Sun, Apr 10, 2022 at 04:31:55PM +0800, Peng Fan (OSS) wrote:
> >
> > > From: Peng Fan
> > >
> > > V2:
> > > Drop imx93 which is wrongly included
> > >
> > > This patchset is to c
Hi Stefano,
On 4/11/22 12:56, Stefano Babic wrote:
> Hi Ariel,
>
> On 11.04.22 13:56, Ariel D'Alessandro wrote:
>> Hi,
>>
>> Gentle re-ping. What's blocking this?
>> This has been reviewed and queued for some time already. Please, be
>> clear on the status or what's the plan for this patchset.
>>
On Thu, Apr 07, 2022 at 08:58:11AM -0400, Tom Rini wrote:
> On Thu, Apr 07, 2022 at 01:54:24PM +0100, Abdellatif El Khlifi wrote:
> > On Wed, Apr 06, 2022 at 03:47:11PM -0400, Tom Rini wrote:
> > > On Tue, Mar 29, 2022 at 04:16:53PM +0100, abdellatif.elkhl...@arm.com
> > > wrote:
> > > > From: Abd
Am Freitag, dem 08.04.2022 um 11:25 +0800 schrieb Peng Fan (OSS):
> From: Peng Fan
>
> With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
> CONFIG_SYS_FSL_USDHC_NUM
> CONFIG_SYS_FSL_ESDHC_ADDR
Thank you for the patch.
Acked-By: Teresa Remmet
Regards,
Teresa
>
> Signed-off-by
From: Fabio Estevam
The "mmc dev ${mmcdev}" command is done twice.
Remove one ocurrence to avoid the duplication.
Signed-off-by: Fabio Estevam
---
configs/warp7_bl33_defconfig | 2 +-
configs/warp7_defconfig | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/configs/w
Hi Marek,
On 03.04.22 23:24, Marek Vasut wrote:
Enable instruction cache early on to speed up the boot process on i.MX8M.
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
---
arch/arm/mach-imx/imx8m/soc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/a
On Mon, Apr 11, 2022 at 10:32 PM Peng Fan (OSS) wrote:
> +&aips3 {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&{/soc/bus@3080/spba-bus@3080} {
&aips3 would be easier to read.
> +&iomuxc_lpsr {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&{/soc/bus@3000/iomuxc@3033/imx7d-sdb} {
On Tue, Apr 12, 2022 at 12:33 AM Peng Fan (OSS) wrote:
>
> From: Peng Fan
>
> Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
> marked with u-boot,dm-spl.
>
> File generated with make savedefconfig
Same comment about mixing savedefconfig changes into the same patch applies.
You missed
Hi Peng,
Thanks for reworking this series.
On Tue, Apr 12, 2022 at 12:33 AM Peng Fan (OSS) wrote:
>
> From: Peng Fan
>
> Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
> marked with u-boot,dm-spl.
>
> File generated with make savedefconfig
IMHO, running savedefconfig in the same pat
On 2022/4/11 21:45, Tom Rini wrote:
On Sun, Apr 10, 2022 at 04:31:55PM +0800, Peng Fan (OSS) wrote:
From: Peng Fan
V2:
Drop imx93 which is wrongly included
This patchset is to convert COUNTER_FREQUENCY to CONFIG_COUNTER_FREQUENCY
for arm64. arm32 is not included for now, this could be i
On Thursday 07 April 2022 09:47:09 Tom Rini wrote:
> On Thu, Apr 07, 2022 at 03:31:25PM +0200, Stefan Roese wrote:
>
> > Added Tom to To...
> >
> > On 4/7/22 10:29, Pali Rohár wrote:
> > > On Monday 04 April 2022 09:43:21 Stefan Roese wrote:
> > > > On 4/3/22 00:36, Pali Rohár wrote:
> > > > > Ca
Implementation in linux/crc16.h provides standard CRC-16 algorithm with
polynomial x^16 + x^15 + x^2 + 1. Use it and remove duplicate ext4 CRC-16
specific code.
Signed-off-by: Pali Rohár
---
fs/ext4/Makefile | 2 +-
fs/ext4/crc16.c | 62 ---
fs
ATSHA204A uses bit-reversed checksum of standard CRC-16 with polynomial
x^16 + x^15 + x^2 + 1.
This ATSHA204A specific checksum can be calculated just by using common
U-Boot functions bitrev16() and crc16().
So replace custom driver CRC-16 implementation by common U-Boot functions.
Signed-off-by
This implementation provides standard CRC-16 algorithm with polynomial
x^16 + x^15 + x^2 + 1.
Signed-off-by: Pali Rohár
---
fs/ubifs/Makefile | 2 +-
include/u-boot/crc.h | 3 +++
lib/Makefile | 1 +
{fs/ubifs => lib}/crc16.c | 0
4 files changed, 5 insertions(+), 1 del
This patch series removes duplicate implementations of CRC-16 with
polynomial x^16 + x^15 + x^2 + 1. One implementation is enough.
Atsha 5/5 patch depends on another atsha patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220402223634.20256-1-p...@kernel.org/
Pali Rohár (5):
crc16-ccitt
U-Boot CRC-16 implementation uses polynomial x^16 + x^12 + x^5 + 1 which is
not standard CRC-16 algorithm, but it is known as CRC-16-CCITT. Rename file
crc16.c to crc16-ccitt.c to reduce confusion.
Signed-off-by: Pali Rohár
---
include/u-boot/crc.h | 2 +-
lib/Makefile
File fs/ubifs/crc16.h is standard linux's crc16.h include file. So move it
from fs/ubifs to include/linux where are also other linux include files.
Signed-off-by: Pali Rohár
---
fs/ubifs/crc16.c| 2 +-
fs/ubifs/lpt.c | 2 +-
fs/ubifs/lpt_commit.c
Hi Leo,
On Thu, Apr 7, 2022 at 11:13 AM Leo Liang wrote:
>
> Hi Alex,
> On Thu, Mar 10, 2022 at 09:03:08AM +0100, Alexandre Ghiti wrote:
> > Hi Leo,
> >
> > On Wed, Mar 9, 2022 at 7:31 AM Leo Liang wrote:
> > >
> > > Hi Alex,
> > > On Thu, Mar 03, 2022 at 11:06:18AM +, Leo Liang wrote:
> > >
Hi Marek
Good catch! Thanks!
On Mon, 2022-04-11 at 22:39 +0200, Marek Vasut wrote:
> The power/bd71837.h should no longer be included, since V1.1 SoM
> uses only the PCA9450 PMIC and the BD71837 support was removed.
> Drop the header too.
>
> Signed-off-by: Marek Vasut
Acked-by: Marcel Ziswile
Add Nuvoton BMC NPCM7xx/NPCM8xx timer driver.
Signed-off-by: Jim Liu
Signed-off-by: Stanley Chu
---
Changes for v2:
- coding style cleanup
---
drivers/timer/Kconfig | 9 +++
drivers/timer/Makefile | 1 +
drivers/timer/npcm-timer.c | 115 +
3 f
Add clock controller driver for NPCM750
Signed-off-by: Jim Liu
Signed-off-by: Stanley Chu
---
Changes for v2:
- combine NPCM750 and NPCM845 clk driver.
---
drivers/clk/Makefile | 1 +
drivers/clk/nuvoton/Makefile | 2 +
drivers/clk/nuvoton/clk_np
Add Nuvoton BMC NPCM7xx/NPCM8xx uart driver
Signed-off-by: Jim Liu
Signed-off-by: Stanley Chu
---
Changes for v2:
- coding style cleanup
- Add support for setting parent clock
---
drivers/serial/Kconfig | 9 ++
drivers/serial/Makefile | 1 +
drivers/serial/serial_npcm.c | 1
Add basic support for the Nuvoton NPCM750 EVB (Poleg).
Signed-off-by: Jim Liu
---
Changes for v2:
- coding style cleanup
- remove reset.c and use sysreset function
- re-generate the defconfig
- remove v1 dts/dtsi and use linux upstream dts/dtsi
---
arch/arm/Kconfig
The patch series add basic supoorts for NPCM750, which
is Nuvoton's 3th-generation BMC (Baseboard Management Controller).
Add drivers to support Clock,Timer,Uart for NPCM7xx SoC.
the NPCM750 computing subsystem comprises a dual-core ARM a9
at 800MHz speed with L1/L2 caches
dts,dtsi and npcm7xx-re
Hi Gaurav,
On 12.04.22 09:20, Gaurav Jain wrote:
Hi Stefano
Kshitiz has already a posted a patch which fixes the reported failure and
merged by Priyanka.
http://patchwork.ozlabs.org/project/uboot/patch/20220407120518.748609-1-kshitiz.varsh...@nxp.com/
Thanks for link, I will pick up Kshitiz
Hi Stefano
Kshitiz has already a posted a patch which fixes the reported failure and
merged by Priyanka.
http://patchwork.ozlabs.org/project/uboot/patch/20220407120518.748609-1-kshitiz.varsh...@nxp.com/
So I think v11 can be applied?
Regards
Gaurav Jain
> -Original Message-
> From: Ste
Hi Heinrich,
heinrich.schucha...@canonical.com wrote on Mon, 11 Apr 2022 22:54:44
+0200:
> * Don't check argument of free(). Free does this itself.
> * Reduce scope of data_buffer. Remove duplicate free().
> * Avoid superfluous NULL assignment.
>
> Signed-off-by: Heinrich Schuchardt
Reviewed-b
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