Hi
On Mon, May 16, 2022 at 8:51 AM Francesco Dolcini
wrote:
>
> Hello,
>
> On Fri, May 13, 2022 at 08:00:31PM +0200, Michael Nazzareno Trimarchi wrote:
> > Il ven 13 mag 2022, 19:56 Fabio Estevam ha scritto:
> > > On Fri, May 13, 2022 at 2:41 PM Thierry Bultel
> > > wrote:
> > > > There are err
On 06.05.22 20:01, Robert Marko wrote:
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not
work under U-boot.
In order to reduce
On 06.05.22 20:01, Robert Marko wrote:
Currently, pinctrl drivers only get probed if pinconf is actually being
used, however on SoC-s like Armada 3720 pinctrl driver is a also the GPIO
driver.
So, if the pinctrl driver doesn't get probed GPIO-s won't get registered
and thus they cannot be used.
On 09.05.22 20:17, Pali Rohár wrote:
UART base address is located in internal registers.
Internal registers for 32-bit mvebu boards in SPL are at address 0xd000
and in proper U-Boot at address 0xf100.
Fix DEBUG_UART_BASE option for all 32-bit mvebu boards.
Signed-off-by: Pali Rohár
On 06.05.22 11:05, Pali Rohár wrote:
Internal registers in SPL are at address 0xd000 and in proper U-Boot at
address 0xf100. UART base address is located in internal registers.
Fix DEBUG_UART_BASE option to correct value for both SPL and proper U-Boot.
This change fixes hangup of proper
On 06.05.22 11:05, Pali Rohár wrote:
Use CONFIG_VAL(DEBUG_UART_BASE) instead of CONFIG_DEBUG_UART_BASE, so
proper config value (CONFIG_DEBUG_UART_BASE or CONFIG_SPL_DEBUG_UART_BASE)
is used based on building target.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
On 06.05.22 11:05, Pali Rohár wrote:
SPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for SPL.
In some cases base address of UART is different in SPL and proper U-Boot.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
drivers/serial/Kconfig | 7 +++
On 06.05.22 11:05, Pali Rohár wrote:
Moving of internal registers from INTREG_BASE_ADDR_REG to SOC_REGS_PHY_BASE
needs to be done very early, prior calling any function which may touch
internal registers, like debug_uart_init().
So do it earlier in arch_very_early_init() instead of arch_cpu_init
On 06.05.22 11:05, Pali Rohár wrote:
When this option is set then ARM _main() function would call
arch_very_early_init() function at the beginning. It would be before
calling any other functions like debug_uart_init() and also before
initializing C runtime environment.
Signed-off-by: Pali Rohár
hi Peter,
On Sat, 14 May 2022 at 13:44, Peter Robinson wrote:
>
> On Fri, May 13, 2022 at 7:50 AM Sughosh Ganu wrote:
> >
> > Add support for updating the idbloader and u-boot images through the
> > UEFI capsule update functionality. Enable the modules required for
> > supporting the functionali
This commit sets two additional variables in the default BOOTCOMMAND.
Adding 'boot=mmc' and 'addr_fit=0x8b00' removes the need for a
special 'uEnv.txt' to be created. The 'addr_fit' variable is the key
piece here. It is normally defined as 0x9000, in the macro
DEFAULT_FIT_TI_ARGS. For this
This commits enables DM_I2C and sets the default bus to 0.
Signed-off-by: Derald D. Woods
---
configs/omap3_evm_defconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index d451e201c7..2d8e627171 100644
--- a/co
This commit copies the related code changes from the BeagleBoard.
Reference:
-
https://source.denx.de/u-boot/u-boot/-/commit/848cfe098f59c47a2542385513fb554430b874d6
Signed-off-by: Derald D. Woods
---
board/ti/evm/evm.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a
This patch set brings omap3-evm inline with similar boards and improves
the ability to boot a 'fitImage' using DEFAULT_FIT_TI_ARGS.
Derald D. Woods (3):
ARM: omap3: evm: Power on MMC when setting up PMIC
ARM: omap3: evm: Complete DM_I2C migration
ARM: omap3: evm: Fix 'fitImage' booting
boa
On Thu, May 12, 2022 at 4:49 PM Christophe Leroy
wrote:
>
> Migrate mpc8xx_fec driver to DM_ETH.
>
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/cpu/mpc8xx/cpu.c | 12 ---
> arch/powerpc/dts/mcr3000.dts | 4 +
> configs/MCR3000_defconfig | 1 +
> drivers/net/Kconfig
On Thu, May 12, 2022 at 10:35 AM Rasmus Villemoes
wrote:
>
> Similar to what was done for the FEC driver in commit
> 89b5bd54c1a4 (net: fec: Allow the PHY node to be retrieved), make sure
> the PHY is associated with the right device tree node, so that phy
> specific DT properties is accessible by
On Thu, May 12, 2022 at 10:34 AM Rasmus Villemoes
wrote:
>
> Only two boards in the tree set the macro DWC_NET_PHYADDR. Both have
> CONFIG_DM_ETH_PHY=y, so should set the phy address in DT if necessary.
>
> The imx8mp_evk does set the correct address in device tree.
>
> The other board seems to be
On Fri, May 6, 2022 at 1:12 AM Tim Harvey wrote:
>
> A number of IMX8Q boards using FEC configure the address of the ethernet
> controller via defconfig as there are two FEC controllers in the SoC.
>
> Now that the FEC driver uses DM the register address should be coming from
> device-tree.
>
> Re
On Wed, May 11, 2022 at 5:58 PM Rasmus Villemoes
wrote:
>
> I have an iMX8MP with a ti,dp83867 phy in front of the eqos
> interface. The phy is Gbit capable - however, the C and D differential
> pairs are not physically routed to the RJ45 connector. So I need to
> prevent the phy from advertising
On Wed, May 11, 2022 at 5:13 PM Rasmus Villemoes
wrote:
>
> Not only does eqos_remove() fail to free the buffers that have been
> allocated by eqos_probe_resources_core(), it repeats those allocations
> and thus drops twice as much memory on the floor.
>
> Signed-off-by: Rasmus Villemoes
> ---
>
On Wed, May 11, 2022 at 1:58 PM Marek Behún wrote:
>
> On Tue, 10 May 2022 15:49:10 -0700
> Tim Harvey wrote:
>
> > commit ffb0f6f488b9 ("treewide: Rename PHY_INTERFACE_MODE_NONE to
> > PHY_INTERFACE_MODE_NA") broke the phy_string_for_interface function.
> > Fix it.
> >
> > Fixes ffb0f6f488b9 ("t
On Tue, May 10, 2022 at 3:20 PM Weijie Gao wrote:
>
> This patch adds GMAC support for MediaTek MT7621 SoC.
> MT7621 has the same GMAC/Switch configuration as MT7623.
>
> Signed-off-by: Weijie Gao
> ---
> v4 changes:
> Split unrelated changes to new patches
> v3 changes:
> Add register remap
On Tue, May 10, 2022 at 3:20 PM Weijie Gao wrote:
>
> The address returned by regmap_get_range() is not remapped. Directly r/w
> to this address is ok for ARM platforms since it's idential to the virtual
> address.
>
> But for MIPS platform only virtual address should be used for access.
> To solv
On Tue, May 10, 2022 at 3:20 PM Weijie Gao wrote:
>
> The iobase address from dts node is actually physical address. It's
> identical to the virtual address in ARM platform. This is ok because this
> driver was used only by ARM platforms (mt7622/mt7623 ...).
>
> But now this driver will be used by
On Tue, May 10, 2022 at 2:26 PM Michal Simek wrote:
>
> From: T Karthik Reddy
>
> CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy
> framework. Though if ethernet PHY node is in other ethernet node, it
> will use shared MDIO to access the PHY of other ethernet. Move ethernet
> pr
On Tue, May 10, 2022 at 2:26 PM Michal Simek wrote:
>
> From: T Karthik Reddy
>
> CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy
> framework. Though if ethernet PHY node is in other ethernet node, it
> will use shared MDIO to access the PHY of other ethernet. Move ethernet
> pr
On Sun, May 15, 2022 at 9:01 AM Tom Rini wrote:
> On Sun, May 15, 2022 at 03:38:21PM +0200, Anthoine Bourgeois wrote:
>
> > Seems that u-boot can't probe i2c bus at 2.6Mhz speed, so lower
> > the speed to the default value 100Khz.
> >
> > Signed-off-by: Anthoine Bourgeois
> > ---
> > arch/arm/d
Friendly ping on this patch as I've seen a few others being accepted
recently and wanted to make sure this fix hasn't fallen by the
wayside.
On Wed, 23 Mar 2022 at 20:20, Andrew Scull wrote:
>
> Building the sandbox with NO_SDL=1 resulted in an undefined reference to
> 'sandbox_sdl_remove_display
Static events do not currently work post-relocation for boards that enable
CONFIG_NEEDS_MANUAL_RELOC. Relocate event handler pointers for all event
spies to fix this.
Tested on Microblaze.
Signed-off-by: Ovidiu Panait
---
common/board_r.c | 3 +++
common/event.c | 15 +++
includ
The whole event_register() function is wrapped in EVENT_DYNAMIC #ifdef
checks, so the inner check is not needed:
#if CONFIG_IS_ENABLED(EVENT_DYNAMIC)
...
int event_register(...)
{
...
if (!CONFIG_IS_ENABLED(EVENT_DYNAMIC))
return -ENOSYS;
}
#endif
Signed-off-by: Ovidiu Pa
On Sun, May 15, 2022 at 03:38:21PM +0200, Anthoine Bourgeois wrote:
> Seems that u-boot can't probe i2c bus at 2.6Mhz speed, so lower
> the speed to the default value 100Khz.
>
> Signed-off-by: Anthoine Bourgeois
> ---
> arch/arm/dts/omap3-devkit8000.dts | 2 +-
> configs/devkit8000_defconfig
Add the missing ethernet node in u-boot dts.
Signed-off-by: Anthoine Bourgeois
---
arch/arm/dts/omap3-devkit8000-u-boot.dtsi | 6 ++
configs/devkit8000_defconfig | 1 +
2 files changed, 7 insertions(+)
diff --git a/arch/arm/dts/omap3-devkit8000-u-boot.dtsi
b/arch/arm/dts/omap3
This commit adds OMAP3 BeagleBoard devicetree files from Linux
v5.16.0.
This commit fixes CONFIG_DM_MMC warning.
Signed-off-by: Anthoine Bourgeois
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/omap3-devkit8000-u-boot.dtsi | 14 +
arch/arm/dts/omap3-devkit8000.dts |
Seems that u-boot can't probe i2c bus at 2.6Mhz speed, so lower
the speed to the default value 100Khz.
Signed-off-by: Anthoine Bourgeois
---
arch/arm/dts/omap3-devkit8000.dts | 2 +-
configs/devkit8000_defconfig | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/d
On Sun, May 15, 2022 at 6:35 AM Michael Trimarchi
wrote:
>
> Those patches come after some testing of failing in factory on some
> unit. We found out that the bootrom imx loader was not able to handling
> badblock. This can be a limit of the implementation right now in imx8mn.
> Anyway not all the
From: Han Pengfei
Only add the dram channel when we finally setup it successfully at the
last step.
Signed-off-by: Han Pengfei
---
drivers/ram/rockchip/sdram_rk3399.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/ram/rockchip/sdram_rk3399.c
b/drivers/ram/rock
From: Han Pengfei
Only add the dram channel when we finally setup it successfully at the
last step.
Signed-off-by: Han Pengfei
---
drivers/ram/rockchip/sdram_rk3399.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/ram/rockchip/sdram_rk3399.c
b/drivers/ram/rock
On Fri, 13 May 2022 22:24:51 +0200
Pali Rohár wrote:
> Set correct type for 3rd argument of ofnode_get_addr_size_index_notrans()
> function. It expects fdt_size_t * and not fdt_addr_t *.
>
> When these two types do not have same size then U-Boot throw compile
> warning:
>
> drivers/mtd/mtdp
When the board was added, enabling tzc380 was left off by
mistake. The optee was tested with the following configuration
in s2pro
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
romapi is not eble to skip bad block so we need to workaround
using the spl
Signed-off-by: Michael Trimarchi
---
board/bsh/imx8mn_smm_s2/spl.c | 3 +++
1 file changed, 3 insertions(+)
---
V3->V4:
- none
V2->V3:
- Add to series and fix if condition
V1->V2:
- none
---
diff
If the fitImage has some bad block in fit image area, the
offset must be recalulcated. This should be done always.
After implementing it in mxs now is possible to call the function
even for that platform.
Cc: Fabio Estevam
Tested-By: Tim Harvey
Reviewed-by: Tom Rini
Signed-off-by: Michael Trima
The badblock should be skipped properly in reading and writing.
Fix the logic. The bcb struct is written, skipping the bad block,
so we need to read using the same logic. This was tested create
bad block in the area and then flash it and read it back.
Acked-by: Han Xu
Tested-By: Tim Harvey
Signe
The specific implementation was having bug. Those bugs are since
the beginning of the implementation. Some manufactures can already
experience this bug in their SPL code. This bug can be more visible on
architecture that has complicated boot process like imx8mn. Older
version of uboot can be affect
Move the hook after nand_scan_tail is called. The hook must be replaced
to the mxs specific one but those must to be assignment later in the
probe function.
With this fix markbad is working again. Before this change:
nand markbad 0xDEC00
NXS NAND: Writing OOB isn't supported
NXS NAND: Writing OOB
Those patches come after some testing of failing in factory on some
unit. We found out that the bootrom imx loader was not able to handling
badblock. This can be a limit of the implementation right now in imx8mn.
Anyway not all the imx platform has the support of this loader. I found
some problems
romapi is not eble to skip bad block so we need to workaround
using the spl
Signed-off-by: Michael Trimarchi
---
board/bsh/imx8mn_smm_s2/spl.c | 3 +++
1 file changed, 3 insertions(+)
---
V2->V3:
- Add to series and fix if condition
V1->V2:
- none
---
diff --git a/board/bsh/imx8m
romapi is not eble to skip bad block so we need to workaround
using the spl
Signed-off-by: Michael Trimarchi
---
board/bsh/imx8mn_smm_s2/spl.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/board/bsh/imx8mn_smm_s2/spl.c b/board/bsh/imx8mn_smm_s2/spl.c
index 0f61acc630..e778cd16c4 100644
The badblock should be skipped properly in reading and writing.
Fix the logic. The bcb struct is written, skipping the bad block,
so we need to read using the same logic. This was tested create
bad block in the area and then flash it and read it back.
Acked-by: Han Xu
Tested-By: Tim Harvey
Signe
If the fitImage has some bad block in fit image area, the
offset must be recalulcated. This should be done always.
After implementing it in mxs now is possible to call the function
even for that platform.
Cc: Fabio Estevam
Tested-By: Tim Harvey
Reviewed-by: Tom Rini
Signed-off-by: Michael Trima
The specific implementation was having bug. Those bugs are since
the beginning of the implementation. Some manufactures can already
experience this bug in their SPL code. This bug can be more visible on
architecture that has complicated boot process like imx8mn. Older
version of uboot can be affect
Move the hook after nand_scan_tail is called. The hook must be replaced
to the mxs specific one but those must to be assignment later in the
probe function.
With this fix markbad is working again. Before this change:
nand markbad 0xDEC00
NXS NAND: Writing OOB isn't supported
NXS NAND: Writing OOB
Those patches come after some testing of failing in factory on some
unit. We found out that the bootrom imx loader was not able to handling
badblock. This can be a limit of the implementation right now in imx8mn.
Anyway not all the imx platform has the support of this loader. I found
some problems
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