Hi Tom,
please pull these Marvell patches into next:
- Enable CONFIG_TIMER for all Kirkwood / MVEBU boards (Stefan)
- u-boot-spl.kwb/SPL: Add / improve size limit setup / detection (Pali)
- mvebu: theadorable: Misc updates in defco
On Thu, Sep 15, 2022 at 01:44:44PM +0530, Sughosh Ganu wrote:
> Add an event type EVT_MAIN_LOOP that can be used for registering
> events that need to be run after the platform has been initialised and
> before the main_loop function is called.
>
> Signed-off-by: Sughosh Ganu
> Reviewed-by: Simon
Hi,
On 9/19/22 21:45, Marek Vasut wrote:
The gpio_hog_probe_all() functionality can be perfectly well replaced by
DM_FLAG_PROBE_AFTER_BIND DM flag, which would trigger .probe() callback
of each GPIO hog driver instance after .bind() and thus configure the
hogged GPIO accordingly.
Signed-off-by:
On Fri, Sep 16, 2022 at 04:24:35PM +0530, Sughosh Ganu wrote:
> hi Takahiro,
>
> On Fri, 16 Sept 2022 at 12:20, Takahiro Akashi
> wrote:
> >
> > On Fri, Sep 16, 2022 at 10:52:11AM +0530, Sughosh Ganu wrote:
> > > () hi Takahiro,
> > >
> > > On Fri, 16 Sept 2022 at 07:17, Takahiro Akashi
> > > wr
These patches are based on Marvell's bootloader for the AlleyCat5/5X
which was based on u-boot 2018.03. I've split that code into consumable
chunks and dropped as much unnecessary stuff as I can. I've also tried
to sync the device trees as much as possible with the support that will
land in Linux
Add support for the AlleyCat5 SoC. This lacks the mbus from the other
users of the mvneta.c driver so a new compatible string is needed to
allow for a different window configuration.
Signed-off-by: Chris Packham
---
(no changes since v1)
drivers/net/Kconfig | 2 +-
drivers/net/mvneta.c | 66
Unlike the other 64-bit mvebu SoCs the AlleyCat5 uses the older ehci
block from the 32-bit SoCs. Adapt the ehci-marvell.c driver to cope with
the fact that the ac5 does not have the mbus infrastructure the 32-bit
SoCs have and ensure USB_EHCI_IS_TDI is selected.
Signed-off-by: Chris Packham
---
This uses the same IP block as the Armada-8K SoCs.
Signed-off-by: Chris Packham
---
(no changes since v1)
drivers/pinctrl/mvebu/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/mvebu/Kconfig b/drivers/pinctrl/mvebu/Kconfig
index 574fb4dfb0..7c51d138c8
Add a new UCLASS_SAR, the generic SAR code and an Alleycat5 driver. This
has been adapted from the Marvell SDK but only the AC5 driver has been
brought through (other drivers exist for the ap806, ap807 and cp110 IP
blocks).
Signed-off-by: Chris Packham
---
(no changes since v1)
drivers/misc/Kc
Add support for the Allecat5/Alleycat5X SoC. These are L3 switches with
an integrated CPU (referred to as the CnM block in Marvell's
documentation). These have dual ARMv8.2 CPUs (Cortex-A55). This support
has been ported from Marvell's SDK which is based on a much older
version of U-Boot.
Signed-o
The RD-AC5X-32G16HVG6HLG-A0 development board main components and features
include:
* Main 12V/54V power supply
* 270 Gbps throughput packet processor on the main board
* DDR4:
* SR1: 2GB DDR4 2400MT/S(1GB x 2 pcs ) with ECC(1GB x 1 pcs)
* SR2: 4GB DDR4 2400MT/S(2GB x 2 pcs ) with ECC(2GB x 1
The indentation went far on the right due to an extra tab for
each pinctrl sub-nodes.
Signed-off-by: Dario Binacchi
---
arch/arm/dts/sam9x60ek.dts | 36 ++--
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts
Hi Eugen,
On Thu, Sep 1, 2022 at 7:57 AM wrote:
>
> On 8/31/22 5:19 PM, Michael Nazzareno Trimarchi wrote:
> > Hi
> >
> > On Wed, Aug 31, 2022 at 3:31 PM wrote:
> >>
> >> On 8/31/22 4:14 PM, Michael Nazzareno Trimarchi wrote:
> >>> Hi
> >>>
> >>> On Mon, Aug 29, 2022 at 8:20 AM Balamanikandan Gu
Hi
On Tue, Sep 20, 2022 at 10:33 AM Dario Binacchi
wrote:
>
> The indentation went far on the right due to an extra tab for
> each pinctrl sub-nodes.
>
> Signed-off-by: Dario Binacchi
> ---
>
> arch/arm/dts/sam9x60ek.dts | 36 ++--
> 1 file changed, 18 insertions
Hi Waldemar
On 9/19/22 23:03, Waldemar Brodkorb wrote:
> Hi Patrice,
> Patrice CHOTARD wrote,
>
>> Waldemar,
>>
>> You can applied the following series on current U-Boot master
>> branch (a0759684e015bd7252be3af508c0fcfdbb8ec5dc):
>>
>> https://patchwork.ozlabs.org/project/uboot/list/?series=318
Hi Marek,
On 9/19/22 21:45, Marek Vasut wrote:
The gpio_hog_probe_all() functionality can be perfectly well replaced by
DM_FLAG_PROBE_AFTER_BIND DM flag, which would trigger .probe() callback
of each GPIO hog driver instance after .bind() and thus configure the
hogged GPIO accordingly.
Signed-o
Hi Waldemar
On 9/20/22 01:12, Waldemar Brodkorb wrote:
> Hi Simon,
> Simon Glass wrote,
>
>> Hi Waldemar,
>>
>> On Mon, 19 Sept 2022 at 13:48, Waldemar Brodkorb wrote:
>>>
>>> Hi again,
>>>
>>> Waldemar Brodkorb wrote,
>>>
Hi,
I am trying to run u-boot on a STM32F746G-DISCO device
On Tuesday 20 September 2022 20:31:49 Chris Packham wrote:
> Unlike the other 64-bit mvebu SoCs the AlleyCat5 uses the older ehci
> block from the 32-bit SoCs. Adapt the ehci-marvell.c driver to cope with
> the fact that the ac5 does not have the mbus infrastructure the 32-bit
> SoCs have and ensur
On 20.09.22 10:31, Chris Packham wrote:
Add support for the AlleyCat5 SoC. This lacks the mbus from the other
users of the mvneta.c driver so a new compatible string is needed to
allow for a different window configuration.
Signed-off-by: Chris Packham
---
(no changes since v1)
drivers/net/K
On Tuesday 20 September 2022 20:31:52 Chris Packham wrote:
> Add support for the Allecat5/Alleycat5X SoC. These are L3 switches with
> an integrated CPU (referred to as the CnM block in Marvell's
> documentation). These have dual ARMv8.2 CPUs (Cortex-A55). This support
> has been ported from Marvel
On 9/20/22 11:00, Quentin Schulz wrote:
Hi Marek,
Hi,
On 9/19/22 21:45, Marek Vasut wrote:
The gpio_hog_probe_all() functionality can be perfectly well replaced by
DM_FLAG_PROBE_AFTER_BIND DM flag, which would trigger .probe() callback
of each GPIO hog driver instance after .bind() and thus
Hi Simon,
Adding Rob for information around putting things in device tree.
> > If a value is not valid during the DT or SYSINFO parsing, we explicitly
> > set that to "Unknown Product" and "Unknown" for the product and
> > manufacturer respectively. It's cleaner if we move the checks insisde
>
Hi Chris,
On Thu, Aug 25, 2022 at 7:00 AM Chris Packham wrote:
>
> Replace the if/else chain in pxa_ecc_init() with a lookup table. This
> makes the code more concise and hopefully easier to follow. Remove the
> unused ecc_layout tables and replace it with a single dummy one (the
> pxa3xx driver
On Tuesday 20 September 2022 20:31:51 Chris Packham wrote:
> diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> index 96b6b71a60..26e5c82bcd 100644
> --- a/lib/fdtdec.c
> +++ b/lib/fdtdec.c
> @@ -74,7 +74,11 @@ static const char * const compat_names[COMPAT_COUNT] = {
> COMPAT(ALTERA_SOCFPGA_F2SDR2, "
On Tuesday 20 September 2022 20:31:48 Chris Packham wrote:
> diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
> index d2c42c4396..07919d6d35 100644
> --- a/drivers/net/mvneta.c
> +++ b/drivers/net/mvneta.c
> @@ -91,6 +91,8 @@ DECLARE_GLOBAL_DATA_PTR;
> #define MVNETA_WIN_SIZE_MASK
Hi Patrice,
Patrice CHOTARD wrote,
> Hi Waldemar
>
> On 9/19/22 23:03, Waldemar Brodkorb wrote:
> > Hi Patrice,
> > Patrice CHOTARD wrote,
> >
> >> Waldemar,
> >>
> >> You can applied the following series on current U-Boot master
> >> branch (a0759684e015bd7252be3af508c0fcfdbb8ec5dc):
> >>
> >>
Hi Patrice, Hi Simon,
Patrice CHOTARD wrote,
> Hi Waldemar
>
> On 9/20/22 01:12, Waldemar Brodkorb wrote:
> > Hi Simon,
> > Simon Glass wrote,
> >
> >> Hi Waldemar,
> >>
> >> On Mon, 19 Sept 2022 at 13:48, Waldemar Brodkorb wrote:
> >>>
> >>> Hi again,
> >>>
> >>> Waldemar Brodkorb wrote,
> >>>
On Tue, Sep 6, 2022 at 2:44 PM Ilias Apalodimas
wrote:
>
> If a value is not valid during the DT or SYSINFO parsing, we explicitly
> set that to "Unknown Product" and "Unknown" for the product and
> manufacturer respectively. It's cleaner if we move the checks insisde
> smbios_add_string() and a
On Tuesday 20 September 2022 20:31:53 Chris Packham wrote:
> The RD-AC5X-32G16HVG6HLG-A0 development board main components and features
> include:
> * Main 12V/54V power supply
> * 270 Gbps throughput packet processor on the main board
> * DDR4:
> * SR1: 2GB DDR4 2400MT/S(1GB x 2 pcs ) with ECC(
On Tue, Sep 6, 2022 at 2:44 PM Ilias Apalodimas
wrote:
>
> In order to fill in the SMBIOS tables U-Boot currently relies on a
> "u-boot,sysinfo-smbios" compatible node. This is fine for the boards
> that already include such nodes. However with some recent EFI changes,
> the majority of boards c
Hi Peng,
On Tue, Sep 20, 2022 at 3:56 AM Peng Fan wrote:
>
> Hi Fabio,
>
> Just have a question, the tcpci driver is not supported, so how
> do you manage to make SDP work?
I understand that the tcpci driver is required when a USB role switch is needed.
I am only using the usbotg1 as a peripher
Hello Neil,
> Concerning the alias name, can you specify in the patch the link to the
> Boot Loader Specification ? And probably update the PXE doc but reusing
> the same wording.
I'm not sure I understand what you mean about the PXE doc, is it better if the
devicetree and devicetree-overlay keywo
Use regulator_set_enable_if_allowed() api instead of regulator_set_enable()
while disabling vbus supply. This way the driver doesn't see an error
when it disable an always-on regulator for VBUS.
This patch is needed for STM32MP157C-DK2 board when the regulator
v3v3: buck4 used as the phy vbus supp
Hi Nate,
On Wed, Sep 14, 2022 at 11:31 AM Nate Drude wrote:
> Thanks for the discussion and feedback. I prefer to avoid changing the
> bindings in Linux if possible.
>
> Would it be acceptable if I rework gpio_hog_probe_all so that it prints
> an error "Failed to probe device..." if any device_p
On 2022/9/16 00:25, Quentin Schulz wrote:
From: Quentin Schulz
CONFIG_SERIAL_TAG is not selectable for ARM64 machines. While
get_board_serial is weakly defined if ENV_VARS_UBOOT_RUNTIME_CONFIG is
defined, it is only called when CONFIG_SUPPORT_PASSING_ATAGS is defined,
which also is not select
On 2022/9/18 19:30, andys...@163.com wrote:
From: Andy Yan
Specification
- Rockchip RK3399
- LPDDR3 4GB
- TF sd scard slot
- eMMC
- AP6255 for WiFi + BT
- Gigabit ethernet
- HDMI out
- 40 pin header
- USB 2.0 x 2
- USB 3.0 x 1
- USB 3.0 Type-C x 1 work in otg mode
- 12V DC Power supply
The d
On 2022/9/15 15:23, Manoj Sai wrote:
This patch enables the following:
1) use preboot configuration to enable usb devices.
2) Enable USB configs so keyboards and other USB devices work,
update the number of ports of the usb root hub.
- with this addition the updated USB device Tree:
Hi all,
Just so there's a written summary on the ML rather than only on IRC.
On 9/20/22 11:53, Marek Vasut wrote:
On 9/20/22 11:00, Quentin Schulz wrote:
Hi Marek,
Hi,
On 9/19/22 21:45, Marek Vasut wrote:
The gpio_hog_probe_all() functionality can be perfectly well replaced by
DM_FLAG_PRO
Hi Patrick, Quentin,
Here is the definition about the ENV_IS_NOWHERE:
config ENV_IS_NOWHERE
bool "Environment is not stored"
help
Define this if you don't want to or can't have an environment
stored
on a storage medium. In this case the environemnt will still
exist
Hi Waldemar
On 9/20/22 12:53, Waldemar Brodkorb wrote:
> Hi Patrice,
> Patrice CHOTARD wrote,
>
>> Hi Waldemar
>>
>> On 9/19/22 23:03, Waldemar Brodkorb wrote:
>>> Hi Patrice,
>>> Patrice CHOTARD wrote,
>>>
Waldemar,
You can applied the following series on current U-Boot master
>>
On Mon, Aug 8, 2022 at 10:05 AM Michal Simek wrote:
>
>
>
> On 8/6/22 19:33, Ramon Fried wrote:
> > On Wed, Jul 13, 2022 at 5:02 PM Samuel Obuch
> > wrote:
> >>
> >> Use __raw_read* and __raw_write* functions to ensure read/write
> >> is passed to the memory-mapped regions, as non-volatile acces
The workaround for the Mask ROM bug in a lot of Rockchip SoCs is applied
unconditionally, but at least on the RK3328 it is not needed and causes
a boot failure if applied.
Make a new column in the SoC feature description and skip the workaround
if the SoC doesn't need it.
Signed-off-by: Lorenz Br
Include linux/sizes.h because it defines SZ_64K which is used in many
places inside k3-udma.c
This fixes the error: ‘SZ_64K’ undeclared which appears during build
time
Signed-off-by: Dhruva Gole
---
I came across this error while trying to build upstream u-boot for the
AM62x. I needed to enable
Hi,
On 19/09/2022 20:50, Edoardo Tomelleri wrote:
This adds keyword devicetree-overlay as an alias for fdtoverlays in
extlinux (sysboot) and pxe to better follow the Boot Loader Specification,
improves documentation around them by adding an example for both
fdtoverlays and devicetree-overlay and
On Tue, 20 Sept 2022 at 13:46, Takahiro Akashi
wrote:
>
> On Fri, Sep 16, 2022 at 04:24:35PM +0530, Sughosh Ganu wrote:
> > hi Takahiro,
> >
> > On Fri, 16 Sept 2022 at 12:20, Takahiro Akashi
> > wrote:
> > >
> > > On Fri, Sep 16, 2022 at 10:52:11AM +0530, Sughosh Ganu wrote:
> > > > () hi Takahi
Hi Jagan,
On 2022/9/2 14:43, Jagan Teki wrote:
On Fri, 2 Sept 2022 at 08:36, Kever Yang wrote:
On 2022/8/18 22:52, Jagan Teki wrote:
Rockchip PX30 has 16KB sram, bootrom reserved 4KB as stack.
NAK, the origin code is correct, do not modify this.
SPL size increment due to updating high row
Hi Kever,
On 9/20/22 14:28, Kever Yang wrote:
Hi Patrick, Quentin,
Here is the definition about the ENV_IS_NOWHERE:
config ENV_IS_NOWHERE
bool "Environment is not stored"
help
Define this if you don't want to or can't have an environment
stored
on a storage med
On 9/19/22 19:03, Jan Remes wrote:
On Mon, Aug 8, 2022 at 10:05 AM Michal Simek wrote:
On 8/6/22 19:33, Ramon Fried wrote:
On Wed, Jul 13, 2022 at 5:02 PM Samuel Obuch wrote:
Use __raw_read* and __raw_write* functions to ensure read/write
is passed to the memory-mapped regions, as non
Which speed up sha1/sha256 operations, about 10x faster with
a imx8mm evk for a 20MiB kernel hash verification (12ms vs 165ms).
Signed-off-by: Loic Poulain
---
configs/imx8mm-cl-iot-gate-optee_defconfig| 1 +
configs/imx8mm-cl-iot-gate_defconfig | 1 +
configs/imx8mm-icore-mx8mm-cto
On Mon, 19 Sept 2022 at 21:52, Marek Vasut wrote:
>
> Make spl_board_init() a weak symbol and get rid of Kconfig symbols
> and ifdeffery guarding this function. Since the spl_board_init() is
> now a weak symbol, boards can either use the default implementation
> which is empty and gets inlined wit
On 9/20/22 17:43, Simon Glass wrote:
On Mon, 19 Sept 2022 at 21:52, Marek Vasut wrote:
Make spl_board_init() a weak symbol and get rid of Kconfig symbols
and ifdeffery guarding this function. Since the spl_board_init() is
now a weak symbol, boards can either use the default implementation
whic
This series is fixing issues in SPL boot mode:
- SPL binary size over 0x8000 bytes for STM32F746-disco, STM32F769-DISCO and
STM32746G-EVAL boards
- fix embedded flash size for STM32F769-DISCO
- fix CONFIG_SYS_SPL_ARGS_ADDR for STM32F746-DISCO and STM32746G-EVAL
Changes in v2:
- Remov
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set
STM32F746 embeds 1 MB of internal flash [0x0800-0x080f],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.
Signed-off-by: Patrice Chotard
---
(no changes since v1)
configs/stm32f746-disco_spl_defconfig | 2 +-
1 file changed, 1 insertion(+),
STM32F746 embeds 1 MB of internal flash [0x0800-0x080f],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.
Signed-off-by: Patrice Chotard
---
(no changes since v1)
configs/stm32746g-eval_spl_defconfig | 2 +-
1 file changed, 1 insertion(+),
By pressing "c" key during SPL execution, we force U-boot execution
instead of a kernel XIP image.
This fixes a hard fault when booting stm32f746-disco in SPL with "c"
key pressed during SPL execution.
U-Boot SPL 2022.10-rc5-9-g40d02baa91 (Sep 20 2022 - 17:21:21 +0200)
Trying to boot from XIP
arch-stm32f7/stm32.h file is shared between STM32F746 and STM32F769
MCUs. But STM32F769 embeds 2MB of internal flash instead of 1MB for
STM32F746. The flash layout is quite similar between the 2 SoCs :
STM32F746 STM32F769
4 * 32KB sectors 4 * 3
This also includes the imx6q-tbs2910-u-boot.dtsi file now.
Signed-off-by: Soeren Moch
---
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: "NXP i.MX U-Boot Team"
Cc: u-boot@lists.denx.de
---
board/tbs/tbs2910/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/tbs/tbs
... to avoid loosing characters when pasting text into the serial console.
This allows to remove the workaround to disable the vidconsole output
when no HDMI device is detected. This workaround only was there to speed-up
serial console processing.
Signed-off-by: Soeren Moch
---
Cc: Stefano Babic
On Mon, Sep 19, 2022 at 5:35 AM Stefano Babic wrote:
>
> Hi Tom,
>
> please pull from u-boot-imx, thanks!
>
> The following changes since commit 1977d72a69f3c8d97bd25a86a6be4da27cde3724:
>
>Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
> (2022-09-18 08:27:23 -0400)
>
> are avai
On Mon, Sep 19, 2022 at 08:29:58AM +, eugen.hris...@microchip.com wrote:
> Hello Tom,
>
> Please pull tag u-boot-2023.01-a , the first set of new at91 features
> for the next cycle 2023.01 .
>
> This feature set includes the important update on PIO4 pinctrl driver
> that solves a long time
On Tue, Sep 20, 2022 at 08:59:43AM +0200, Stefan Roese wrote:
> Hi Tom,
>
> please pull these Marvell patches into next:
>
Applied to u-boot/next, thanks!
--
Tom
signature.asc
Description: PGP signature
On Tue, Sep 20, 2022 at 10:56:02AM +0530, Dhruva Gole wrote:
> Include linux/sizes.h because it defines SZ_64K which is used in many
> places inside k3-udma.c
> This fixes the error: ‘SZ_64K’ undeclared which appears during build
> time
>
> Signed-off-by: Dhruva Gole
Reviewed-by: Tom Rini
--
On Tue, Sep 20, 2022 at 1:05 PM Soeren Moch wrote:
>
> This also includes the imx6q-tbs2910-u-boot.dtsi file now.
>
> Signed-off-by: Soeren Moch
Reviewed-by: Fabio Estevam
On Tue, Sep 20, 2022 at 1:05 PM Soeren Moch wrote:
>
> ... to avoid loosing characters when pasting text into the serial console.
> This allows to remove the workaround to disable the vidconsole output
> when no HDMI device is detected. This workaround only was there to speed-up
> serial console p
Hi Stefano and Tom,
On Sun, Aug 14, 2022 at 2:25 PM Marek Vasut wrote:
>
> On 8/13/22 14:03, Fabio Estevam wrote:
> > From: Fabio Estevam
> >
> > When running the script to sign SPL/U-Boot on a kontron-sl-mx8mm board,
> > the fit_block_size was calculated as 0x1000 instead of 0x1020.
> >
> > Add
Hi Stefano and Tom,
On Wed, Aug 24, 2022 at 7:09 AM Frieder Schrempf
wrote:
>
> Hi Fabio,
>
> Am 24.08.22 um 03:09 schrieb Fabio Estevam:
> > When CONFIG_IMX_HAB is selected the 'hab_status' command reports several
> > error events, indicating that the BootROM failed to authenticate the SPL.
> >
On 20.09.22 20:44, Fabio Estevam wrote:
On Tue, Sep 20, 2022 at 1:05 PM Soeren Moch wrote:
... to avoid loosing characters when pasting text into the serial console.
This allows to remove the workaround to disable the vidconsole output
when no HDMI device is detected. This workaround only wa
On Tue, Sep 20, 2022 at 05:56:50PM +0200, Marek Vasut wrote:
> On 9/20/22 17:43, Simon Glass wrote:
> > On Mon, 19 Sept 2022 at 21:52, Marek Vasut wrote:
> > >
> > > Make spl_board_init() a weak symbol and get rid of Kconfig symbols
> > > and ifdeffery guarding this function. Since the spl_board_
Hi Patrice,
Patrice Chotard wrote,
>
> This series is fixing issues in SPL boot mode:
>- SPL binary size over 0x8000 bytes for STM32F746-disco, STM32F769-DISCO
> and STM32746G-EVAL boards
>- fix embedded flash size for STM32F769-DISCO
>- fix CONFIG_SYS_SPL_ARGS_ADDR for STM32F746-DIS
On Mon, Sep 05, 2022 at 11:31:19AM +0200, Pali Rohár wrote:
> Like in all other console functions, implement also serial_flush() function
> as a fallback int console flush() function.
>
> Flush support is available only when config option CONSOLE_FLUSH_SUPPORT is
> enabled. So when it is disabled
On Tuesday 20 September 2022 17:40:39 Tom Rini wrote:
> On Mon, Sep 05, 2022 at 11:31:19AM +0200, Pali Rohár wrote:
>
> > Like in all other console functions, implement also serial_flush() function
> > as a fallback int console flush() function.
> >
> > Flush support is available only when config
On Wed, Sep 21, 2022 at 12:18:57AM +0200, Pali Rohár wrote:
> On Tuesday 20 September 2022 17:40:39 Tom Rini wrote:
> > On Mon, Sep 05, 2022 at 11:31:19AM +0200, Pali Rohár wrote:
> >
> > > Like in all other console functions, implement also serial_flush()
> > > function
> > > as a fallback int c
On Tuesday 20 September 2022 18:29:02 Tom Rini wrote:
> On Wed, Sep 21, 2022 at 12:18:57AM +0200, Pali Rohár wrote:
> > On Tuesday 20 September 2022 17:40:39 Tom Rini wrote:
> > > On Mon, Sep 05, 2022 at 11:31:19AM +0200, Pali Rohár wrote:
> > >
> > > > Like in all other console functions, impleme
On Wed, Sep 21, 2022 at 12:32:33AM +0200, Pali Rohár wrote:
> On Tuesday 20 September 2022 18:29:02 Tom Rini wrote:
> > On Wed, Sep 21, 2022 at 12:18:57AM +0200, Pali Rohár wrote:
> > > On Tuesday 20 September 2022 17:40:39 Tom Rini wrote:
> > > > On Mon, Sep 05, 2022 at 11:31:19AM +0200, Pali Rohá
Hi Loic,
On 9/20/2022 11:32 PM, Loic Poulain wrote:
Which speed up sha1/sha256 operations, about 10x faster with
a imx8mm evk for a 20MiB kernel hash verification (12ms vs 165ms).
wow! this looks great.
Signed-off-by: Loic Poulain
---
configs/imx8mm-cl-iot-gate-optee_defconfig| 1 +
On 9/20/22 14:26, Quentin Schulz wrote:
Hi all,
Hi,
Just so there's a written summary on the ML rather than only on IRC.
Thanks
[...]
Something like:
diff --git a/drivers/core/device.c b/drivers/core/device.c
index d9ce546c0c..103ec47b88 100644
--- a/drivers/core/device.c
+++ b/drivers/
On 9/20/22 21:04, Tom Rini wrote:
On Tue, Sep 20, 2022 at 05:56:50PM +0200, Marek Vasut wrote:
On 9/20/22 17:43, Simon Glass wrote:
On Mon, 19 Sept 2022 at 21:52, Marek Vasut wrote:
Make spl_board_init() a weak symbol and get rid of Kconfig symbols
and ifdeffery guarding this function. Since
On Tue, Sep 20, 2022 at 9:17 PM Stefan Roese wrote:
>
> On 20.09.22 10:31, Chris Packham wrote:
> > Add support for the AlleyCat5 SoC. This lacks the mbus from the other
> > users of the mvneta.c driver so a new compatible string is needed to
> > allow for a different window configuration.
> >
> >
On Tue, Sep 20, 2022 at 10:48 PM Pali Rohár wrote:
>
> On Tuesday 20 September 2022 20:31:48 Chris Packham wrote:
> > diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
> > index d2c42c4396..07919d6d35 100644
> > --- a/drivers/net/mvneta.c
> > +++ b/drivers/net/mvneta.c
> > @@ -91,6 +91,8 @@
On Tue, Sep 20, 2022 at 7:30 PM Edoardo Tomelleri wrote:
>
> Hello Neil,
>
> > Concerning the alias name, can you specify in the patch the link to the
> > Boot Loader Specification ? And probably update the PXE doc but reusing
> > the same wording.
> I'm not sure I understand what you mean about t
On Tue, Sep 20, 2022 at 9:22 PM Pali Rohár wrote:
>
> On Tuesday 20 September 2022 20:31:52 Chris Packham wrote:
> > Add support for the Allecat5/Alleycat5X SoC. These are L3 switches with
> > an integrated CPU (referred to as the CnM block in Marvell's
> > documentation). These have dual ARMv8.2
These patches are based on Marvell's bootloader for the AlleyCat5/5X
which was based on u-boot 2018.03. I've split that code into consumable
chunks and dropped as much unnecessary stuff as I can. I've also tried
to sync the device trees as much as possible with the support that will
land in Linux
Add support for the AlleyCat5 SoC. This lacks the mbus from the other
users of the mvneta.c driver so a new compatible string is needed to
allow for a different window configuration.
Signed-off-by: Chris Packham
Reviewed-by: Stefan Roese
---
Changes in v3:
- Remove unnecessary changes to RX des
Unlike the other 64-bit mvebu SoCs the AlleyCat5 uses the older ehci
block from the 32-bit SoCs. Adapt the ehci-marvell.c driver to cope with
the fact that the ac5 does not have the mbus infrastructure the 32-bit
SoCs have and ensure USB_EHCI_IS_TDI is selected.
Signed-off-by: Chris Packham
---
This uses the same IP block as the Armada-8K SoCs.
Signed-off-by: Chris Packham
---
(no changes since v1)
drivers/pinctrl/mvebu/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/mvebu/Kconfig b/drivers/pinctrl/mvebu/Kconfig
index 574fb4dfb0..7c51d138c8
Add a new UCLASS_SAR, the generic SAR code and an Alleycat5 driver. This
has been adapted from the Marvell SDK but only the AC5 driver has been
brought through (other drivers exist for the ap806, ap807 and cp110 IP
blocks).
Signed-off-by: Chris Packham
---
Changes in v3:
- None. Note some change
Add support for the Allecat5/Alleycat5X SoC. These are L3 switches with
an integrated CPU (referred to as the CnM block in Marvell's
documentation). These have dual ARMv8.2 CPUs (Cortex-A55). This support
has been ported from Marvell's SDK which is based on a much older
version of U-Boot.
Signed-o
The RD-AC5X-32G16HVG6HLG-A0 development board main components and features
include:
* Main 12V/54V power supply
* 270 Gbps throughput packet processor on the main board
* DDR4:
* SR1: 2GB DDR4 2400MT/S(1GB x 2 pcs ) with ECC(1GB x 1 pcs)
* SR2: 4GB DDR4 2400MT/S(2GB x 2 pcs ) with ECC(2GB x 1
On 9/20/2022 7:13 PM, Fabio Estevam wrote:
Hi Peng,
On Tue, Sep 20, 2022 at 3:56 AM Peng Fan wrote:
Hi Fabio,
Just have a question, the tcpci driver is not supported, so how
do you manage to make SDP work?
I understand that the tcpci driver is required when a USB role switch is needed.
On 9/20/2022 8:20 AM, Fabio Estevam wrote:
Add an entry for USB boot so that U-Boot could be loaded via
the Serial Download Protocol.
Signed-off-by: Fabio Estevam
Reviewed-by: Peng Fan
---
board/freescale/imx8mm_evk/spl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/fr
On 9/20/2022 8:20 AM, Fabio Estevam wrote:
Add Serial Download Protocol support as it is a useful method to
load flash.bin to RAM and run it via 'uuu'.
With this patch, it is possible to start both U-Boot SPL and U-Boot
proper using the following 'uuu'command:
$ uuu -brun spl flash.bin
Base
Sughosh,
On Tue, Sep 20, 2022 at 06:34:12PM +0530, Sughosh Ganu wrote:
> On Tue, 20 Sept 2022 at 13:46, Takahiro Akashi
> wrote:
> >
> > On Fri, Sep 16, 2022 at 04:24:35PM +0530, Sughosh Ganu wrote:
> > > hi Takahiro,
> > >
> > > On Fri, 16 Sept 2022 at 12:20, Takahiro Akashi
> > > wrote:
> > >
On 21.09.22 06:59, Chris Packham wrote:
The RD-AC5X-32G16HVG6HLG-A0 development board main components and features
include:
* Main 12V/54V power supply
* 270 Gbps throughput packet processor on the main board
* DDR4:
* SR1: 2GB DDR4 2400MT/S(1GB x 2 pcs ) with ECC(1GB x 1 pcs)
* SR2: 4GB D
On 9/20/2022 3:41 AM, Marek Vasut wrote:
Enable DM USB, DM PHY and USB gadget support in imx8mm-mx8menlo SPL
to let the board continue SDP loading of second stage after the first
stage was loaded by BootROM SDP implementation. It is not possible to
jump back into BootROM v1 and let the BootROM
On 9/20/2022 3:41 AM, Marek Vasut wrote:
Instead of duplicating code implemented by i.MX8M version of arch_misc_init()
in every board, enable CONFIG_ARCH_MISC_INIT and call arch_misc_init() from
spl_board_init(). This removes the duplication. No functional change.
Signed-off-by: Marek Vasut
On 9/20/2022 3:41 AM, Marek Vasut wrote:
The current implementation of spl_board_init() is not correct,
the MX8MM BootROM v1 does not support SDP load when re-entered
from U-Boot SPL, it is up to U-Boot to perform the next stage
load using its own internal CI gadget driver and SDP protocol
imp
On 9/20/2022 3:41 AM, Marek Vasut wrote:
The current implementation of spl_board_init() USB boot handling is
not correct, the MX8MM BootROM v1 does not support SDP load when
re-entered from U-Boot SPL, it is up to U-Boot to perform the next
stage load using its own internal CI gadget driver an
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