A friendly ping...
Best Regards,
Alice Guo
> -Original Message-
> From: U-Boot On Behalf Of Alice Guo (OSS)
> Sent: Tuesday, September 6, 2022 5:38 PM
> To: sba...@denx.de; feste...@gmail.com; s...@chromium.org
> Cc: dl-uboot-imx ; u-boot@lists.denx.de
> Subject: [PATCH v1] gpio:
Set the necessary config options that help to build the
necessary drivers that support spansion S28HS512T Flash
Signed-off-by: Dhruva Gole
---
configs/am62x_evm_a53_defconfig | 13 +
1 file changed, 13 insertions(+)
diff --git a/configs/am62x_evm_a53_defconfig
There's a S28HS512T Flash (by Cypress) on the AM625 SK EVM.
- Add necessary DT nodes to enable OSPI interface with this flash.
- Enable all configs that enable the OSPI related drivers and commands
like SF probe.
Tested on my AM62 SK EVM, attaching logs below.
Logs:
Add DT nodes to enable S28HS512T OSPI flash on the SK board.
Signed-off-by: Dhruva Gole
---
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 24 +
arch/arm/dts/k3-am625-sk.dts | 77
2 files changed, 101 insertions(+)
diff --git
On Tue, Sep 27, 2022 at 5:27 AM Christian Kohlschütter
wrote:
>
> > On 26. Sep 2022, at 13:59, Chen-Yu Tsai wrote:
> >
> > On Mon, Sep 26, 2022 at 7:53 PM Christian Kohlschütter
> > wrote:
> >>
> >> Some RK3399 boards, such as newer revisions of NanoPi R4S, do not
> >> provide an EEPROM chip
On Mon, Sep 26, 2022 at 08:06:52AM +0200, Heinrich Schuchardt wrote:
>
>
> On 9/16/22 02:58, AKASHI Takahiro wrote:
> > On Thu, Sep 15, 2022 at 10:02:40PM +0200, Heinrich Schuchardt wrote:
> > > The medium a device like 'mmc 0' or 'usb 0' points to may change over
> > > time. Hence device type
When building U-Boot with clang, it notices that the i8259.h include
guard does not work correctly due to a typo. Fix it.
Signed-off-by: Alistair Delva
Cc: Simon Glass
Cc: Bin Meng
Cc: Nick Desaulniers
---
arch/x86/include/asm/i8259.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
From: Jiyong Park
Previously Android AVB supported block devices only on eMMC. This change
eliminates the restriction by using the generic block driver model.
The `avb init' command is modified to accept another parameter which
specifies the interface type. e.g., `avb init virtio 0' initializes
For future DM based FPGA drivers and for now to have a meaningful
logging class for old FPGA drivers.
Suggested-by: Michal Simek
Suggested-by: Simon Glass
Signed-off-by: Alexander Dahl
---
arch/sandbox/dts/test.dts | 4
drivers/fpga/Kconfig | 14 ++
common/spl/spl_atf.c:187:51: warning: value size does not match register
size specified by the constraint and modifier [-Wasm-operand-widths]
__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
^
The LLVM toolchain does not have or need libgcc, so do not require
it to exist on the library path. Even if "-print-libgcc-file-name"
returned the empty string, -lgcc would be specified.
This leaves CONFIG_USE_PRIVATE_LIBGCC alone because I did not have
a target/toolchain combination available
From: Nick Desaulniers
It seems that for aarch64, unless we apply dynamic relocations to the
location being relocated, we fail to boot.
As Fangrui notes:
For dynamic relocations using the RELA format (readelf -Wr), GNU ld
sets the initial content to r_addend; ld.lld doesn't do that by
When building the standalone example with llvm, the link step fails:
examples/standalone/libstubs.o: In function `dummy':
include/_exports.h:10: undefined reference to `jt'
include/_exports.h:11: undefined reference to `jt'
include/_exports.h:12: undefined reference to `jt'
include/_exports.h:13:
On Mon, Sep 26, 2022 at 10:12 AM Fabio Estevam wrote:
>
> Hi Adam,
>
> On Mon, Sep 26, 2022 at 2:07 PM Adam Ford wrote:
>
> > Tim,
> >
> > I have it building successfully now, and it loads over USB. I had to
> > disable BD718x7 PMIC children binding which required a small change to
> > the PMIC
On Mon, Sep 26, 2022 at 03:33:44PM +0200, Heinrich Schuchardt wrote:
> On 9/26/22 15:13, Tom Rini wrote:
> > On Mon, Sep 26, 2022 at 02:33:23PM +0300, Ilias Apalodimas wrote:
> > > Hi Tom
> > >
> > > On Wed, 21 Sept 2022 at 19:15, Tom Rini wrote:
> > > >
> > > > On Wed, Sep 21, 2022 at
On Thu, 1 Sept 2022 at 02:28, Heinrich Schuchardt wrote:
> > On 7/22/22 19:43, jassisinghb...@gmail.com wrote:
> >> diff --git a/board/socionext/developerbox/developerbox.c
> >> b/board/socionext/developerbox/developerbox.c
> >> index f5a5fe0121..ad2260e3d7 100644
> >> ---
On 9/26/22 1:28 PM, Adam Ford wrote:
> On Mon, Sep 26, 2022 at 12:12 PM Fabio Estevam wrote:
>>
>> Hi Adam,
>>
>> On Mon, Sep 26, 2022 at 2:07 PM Adam Ford wrote:
>>
>> > Tim,
>> >
>> > I have it building successfully now, and it loads over USB. I had to
>> > disable BD718x7 PMIC children
On Mon, Sep 26, 2022 at 12:12 PM Fabio Estevam wrote:
>
> Hi Adam,
>
> On Mon, Sep 26, 2022 at 2:07 PM Adam Ford wrote:
>
> > Tim,
> >
> > I have it building successfully now, and it loads over USB. I had to
> > disable BD718x7 PMIC children binding which required a small change to
> > the PMIC
On Mon, Sep 26, 2022 at 10:06 AM Adam Ford wrote:
>
> On Mon, Sep 26, 2022 at 11:59 AM Tim Harvey wrote:
> >
> > On Sat, Sep 24, 2022, 2:54 PM Adam Ford wrote:
> > >
> > > On Sat, Sep 24, 2022 at 4:47 PM Marek Vasut wrote:
> > > >
> > > > On 9/24/22 21:10, Adam Ford wrote:
> > > >
> > > > Hi,
Hi Adam,
On Mon, Sep 26, 2022 at 2:07 PM Adam Ford wrote:
> Tim,
>
> I have it building successfully now, and it loads over USB. I had to
> disable BD718x7 PMIC children binding which required a small change to
> the PMIC driver [1]. I then removed HS400, HS200 and UHS support in
> SPL. Once
On Mon, Sep 26, 2022 at 11:59 AM Tim Harvey wrote:
>
> On Sat, Sep 24, 2022, 2:54 PM Adam Ford wrote:
> >
> > On Sat, Sep 24, 2022 at 4:47 PM Marek Vasut wrote:
> > >
> > > On 9/24/22 21:10, Adam Ford wrote:
> > >
> > > Hi,
> > >
> > > [...]
> > >
> > > > I am using the Mainline with the
On Sat, Sep 24, 2022, 2:54 PM Adam Ford wrote:
>
> On Sat, Sep 24, 2022 at 4:47 PM Marek Vasut wrote:
> >
> > On 9/24/22 21:10, Adam Ford wrote:
> >
> > Hi,
> >
> > [...]
> >
> > > I am using the Mainline with the aarch64 gcc from Ubuntu 22.04. I am
> > > over by ~1100 bytes with LTO enabled,
Add DT for DHCOR Testbench board, which is a testbench for testing of
DHCOR SoM during manufacturing. This is effectively a trimmed down
version of AV96 board with CSI-2 bridge, HDMI bridge, WiFi, Audio and
LEDs removed and used as GPIOs instead. Furthermore, the PMIC Buck3
is always configured
CONFIG_SYSRESET provides its own implementation of reset_cpu. Disable
our version when it is enabled.
Signed-off-by: Sean Anderson
---
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
Remove duplicate newline, no functional change.
Signed-off-by: Marek Vasut
Cc: Patrice Chotard
Cc: Patrick Delaunay
---
arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
The btrfs filesystem provides advanced functionality like copy-on-write
and snapshots, as well as metadata and data duplication and checksumming.
Enable btrfs in U-Boot to permit even the primary partition to be btrfs
and let system boot from it.
Signed-off-by: Marek Vasut
---
The QSPI clocks are only used when CONFIG_NXP_FSPI=y, so only build the
QSPI clocks in this case to reduce the final SPL binary size.
Signed-off-by: Fabio Estevam
---
drivers/clk/imx/clk-imx8mm.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git
The ecspi clocks are only used when CONFIG_DM_SPI=y, so only build the
ecspi clocks in this case to reduce the final SPL binary size.
Signed-off-by: Fabio Estevam
---
drivers/clk/imx/clk-imx8mm.c | 31 ++-
1 file changed, 18 insertions(+), 13 deletions(-)
diff --git
Ethernet is not used inside SPL, so move the IMX8MM_CLK_ENET_AXI clock
inside the non-SPL block to reduce the final SPL binary size.
Signed-off-by: Fabio Estevam
---
drivers/clk/imx/clk-imx8mm.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
PWM is not used inside SPL, so do not define the PWM clocks inside
SPL to reduce the final SPL binary size.
Signed-off-by: Fabio Estevam
---
drivers/clk/imx/clk-imx8mm.c | 34 ++
1 file changed, 18 insertions(+), 16 deletions(-)
diff --git
Reduce the SPL binary size by building some clocks only for the
non-SPL case, such as Ethernet and PWM and by also building ECSPI
and QSPI when their respective drivers are enabled.
On a imx8mm_evk_defconfig the following SPL binary reduction was
observed.
Prior to this series:
$
Some STM32 MCU's board need their SYS_MALLOC_F_LEN value enlarged
to avoid the "alloc space exhausted" error message during their boot
process.
Use the default SYS_MALLOC_F_LEN value which is set to 0x2000 in
Kconfig.
Signed-off-by: Patrice Chotard
---
configs/stm32746g-eval_defconfig |
On 9/26/22 14:52, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/23/22 13:20, Patrice Chotard wrote:
>> Device tree alignment with kernel v6.0-rc4.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> arch/arm/dts/stm32429i-eval-u-boot.dtsi | 2 +-
>> arch/arm/dts/stm32746g-eval.dts | 18
On 9/26/22 15:02, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> By pressing "c" key during SPL execution, we force U-boot execution
>> instead of a kernel XIP image.
>>
>> This fixes a hard fault when booting stm32f746-disco in SPL with "c"
>> key pressed during
On 9/26/22 15:05, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> arch-stm32f7/stm32.h file is shared between STM32F746 and STM32F769
>> MCUs. But STM32F769 embeds 2MB of internal flash instead of 1MB for
>> STM32F746. The flash layout is quite similar between the
On 9/26/22 14:58, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> STM32F746 embeds 1 MB of internal flash [0x0800-0x080f],
>> fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
>> It solves hard fault when jumping from SPL to U-Boot.
>>
>> Signed-off-by: Patrice
On 9/26/22 14:58, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> STM32F746 embeds 1 MB of internal flash [0x0800-0x080f],
>> fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
>> It solves hard fault when jumping from SPL to U-Boot.
>>
>> Signed-off-by: Patrice
On 9/26/22 14:57, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
>> replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
>> As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable,
On 9/26/22 14:57, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
>> replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
>> As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable,
On 9/26/22 14:50, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
>> replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
>> As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable,
At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.
Also drop the SATA command, which does not work with driver model.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/Kconfig | 1 -
On Thu, 1 Sept 2022 at 18:32, Heinrich Schuchardt
wrote:
>
> The following faulty behavior was observed. The sandbox configured with
> CONFIG_SANDBOX_CRASH_RESET=y was invoked with
>
> ./u-boot -T -S
>
> After executing `exception undefined' the sandbox reboots.
> When executing `exception
In preparation for sharing the emulation code between two drivers, move
some of the fields into a new struct. Use a separate header file so it
can be used by various drivers.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/usb/emul/sandbox_flash.c | 60
This has the same name as a field in our local private struct, which is
confusing. Change the name to xfer_len instead.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/usb/emul/sandbox_flash.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Applied to u-boot-dm,
Move this information into struct scsi_emul_info so we can use it in
common code.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/usb/emul/sandbox_flash.c | 10 --
include/scsi_emul.h | 5 +
2 files changed, 9 insertions(+), 6 deletions(-)
Applied to
Move the buffer into this struct so it can be shared between different
implementations.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/usb/emul/sandbox_flash.c | 41 +++-
include/scsi_emul.h | 5
2 files changed, 35 insertions(+),
This will be needed to run unit tests, once the SCSI code is used for USB
as well. Enable it for all sandbox builds.
Signed-off-by: Simon Glass
---
(no changes since v1)
configs/sandbox64_defconfig| 5 +
configs/sandbox_flattree_defconfig | 4
configs/sandbox_noinst_defconfig
Add a simple uclass test for SCSI. It reads the partition table from a
disk image and checks that it looks correct.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/sandbox/dts/sandbox.dtsi | 4
arch/sandbox/dts/test.dts | 5 +
test/dm/Makefile | 1 +
On Mon, Sep 26, 2022 at 3:48 AM Sughosh Ganu wrote:
>
> On Mon, 26 Sept 2022 at 08:22, Jassi Brar wrote:
> >
> > On Thu, Sep 15, 2022 at 3:16 AM Sughosh Ganu
> > wrote:
> >
> > > diff --git a/drivers/fwu-mdata/Kconfig b/drivers/fwu-mdata/Kconfig
> > > new file mode 100644
> > > index
On Mon, Sep 26, 2022 at 4:01 AM Sughosh Ganu wrote:
> On Mon, 26 Sept 2022 at 08:25, Jassi Brar wrote:
> > .
> > >
> > > +static __maybe_unused efi_status_t fwu_post_update_process(bool
> > > fw_accept_os)
> > > +{
> > > + int status;
> > > + u32 update_index;
> > > +
On Mon, Sep 26, 2022 at 5:00 AM Sughosh Ganu wrote:
>
> On Mon, 26 Sept 2022 at 08:28, Jassi Brar wrote:
> >
> >
> > .
> > > +/**
> > > + * fwu_revert_boot_index() - Revert the active index in the FWU metadata
> > > + *
> > > + * Revert the active_index value in the FWU metadata, by
Hi,
can you please update subject line?
Currently this driver is enabled by microblaze and mips which means there are
not broken builds that's why subject is not correct.
On 9/23/22 14:31, samuel.ob...@codasip.com wrote:
From: Samuel Obuch
Function ioremap_nocache seems to be defined only
Hi Simon,
Hi Michal,
On 25.09.22 16:15, Simon Glass wrote:
Hi Stefan,
On Wed, 21 Sept 2022 at 08:06, Stefan Roese wrote:
Currently this timer driver provides timer_get_boot_us() to support the
BOOTSTAGE functionality. This patch adds the timer_early functions so
that the "normal" timer
Add MM communication support using FF-A transport
This feature allows accessing MM partitions services through
EFI MM communication protocol. MM partitions such as StandAlonneMM
or smm-gateway secure partitions which reside in secure world.
An MM shared buffer and a door bell event are used to
turn on EFI MM communication
On corstone1000 platform MM communication between u-boot
and the secure world (Optee) is done using the FF-A bus.
Signed-off-by: Abdellatif El Khlifi
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
configs/corstone1000_defconfig | 4
Add functional test cases for the FF-A core driver
These tests rely on the FF-A Sandbox driver which helps in
inspecting the FF-A core driver.
Signed-off-by: Abdellatif El Khlifi
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
Changelog:
===
v4:
Add Sandbox test for the armffa command
Signed-off-by: Abdellatif El Khlifi
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
Changelog:
===
v4: drop use of helper APIs
v1: introduce armffa command sandbox test
MAINTAINERS | 1 +
Provide a Sandbox driver to emulate the FF-A ABIs
The emulated ABIs are those supported by the FF-A core driver
and according to FF-A specification v1.0.
The Sandbox driver provides operations allowing the test
application to read the status of all the inspected ABIs
and perform functional tests
Add the driver implementing Arm Firmware Framework for Armv8-A v1.0
The Firmware Framework for Arm A-profile processors (FF-A v1.0) [1]
describes interfaces (ABIs) that standardize communication
between the Secure World and Normal World leveraging TrustZone
technology.
This driver uses 64-bit
Provide armffa command showcasing the use of the FF-A driver
The armffa command allows to query secure partitions data from
the secure world and exchanging messages with the partitions.
Signed-off-by: Abdellatif El Khlifi
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
convert big endian UUID string to little endian buffer
Signed-off-by: Abdellatif El Khlifi
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
Changelog:
===
v4:
* rename ffa_uuid_str_to_bin to be_uuid_str_to_le_bin and put in
a standalone commit (the
set to zero the x0-x17 registers
As per the SMCCC v1.2 spec, unused result and scratch registers
can leak information after an SMC call. We can mitigate against
this risk by returning zero in each register.
The leakage we are referring to is data leakage across exception
levels. The intent is to
add support for x0-x17 registers used by the SMC calls
In SMCCC v1.2 [1] arguments are passed in registers x1-x17.
Results are returned in x0-x17.
This work is inspired from the following kernel commit:
arm64: smccc: Add support for SMCCCv1.2 extended input/output registers
[1]:
Moving the changelogs in each commit to the changes section.
No code change in v5.
Changelog of the major changes:
===
v5:
* move changelogs in each commit to the changes section
v4: [4]
* add FF-A support README (doc/README.ffa.drv)
* improving error handling by
On Mon, Sep 26, 2022 at 5:08 AM Sughosh Ganu wrote:
>
> On Mon, 26 Sept 2022 at 08:29, Jassi Brar wrote:
> > .
> > > +static int fwu_boottime_checks(void *ctx, struct event *event)
> > > +{
> > > + int ret;
> > > + struct udevice *dev;
> > > + u32 boot_idx, active_idx;
> >
Hi Tom,
please pull the following patches to your tree. It is the second round with
small updates but especially adding new Xilinx SOC.
CI loop doesn't show any issue.
Thanks,
Michal
The following changes since commit ebdd6afa543324648138f780a648b8fb65d488eb:
Merge branch 'next' of
On Mon, Sep 26, 2022 at 01:59:09PM +0200, Stefan Roese wrote:
> Hi Tom,
>
> please pull this Turris GPIO fix from Pali:
>
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Mon, Sep 26, 2022 at 03:39:17AM +0200, Marek Vasut wrote:
> One outstanding driver and one bugfix.
>
> The following changes since commit 435596d57f8beedf36b5dc858fe7ba9d6c03334b:
>
> Merge tag 'u-boot-imx-20220922' of
> https://gitlab.denx.de/u-boot/custodians/u-boot-imx (2022-09-22
On 9/21/22 18:06, Paul Barker wrote:
+
+ log_debug("Added EFI_SPI_IO_PROTOCOL for %s with guid "
+
"%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x\n",
+ name,
+ guid->b[3], guid->b[2], guid->b[1], guid->b[0],
+
Hi Simon,
On 25.09.22 16:15, Simon Glass wrote:
Hi Stefan,
On Wed, 21 Sept 2022 at 08:06, Stefan Roese wrote:
The early timer functions provided via CONFIG_TIMER_EARLY don't need
CONFIG_TIMER to be enabled, as they don't make use of the DM timer
and uclass interface. This patch now allow
Hi Heinrich,
[...]
> > > +};
> > > +
> > > +static struct efi_legacy_spi_controller_protocol
> > > +dummy_legacy_spi_controller_protocol = {
> > > + .maximum_offset = 0,
> > > + .maximum_range_bytes = 0,
> > > + .range_register_count = 0,
> > > + .erase_block_opcode = legacy_erase_block_opcode,
On 9/26/22 15:13, Tom Rini wrote:
On Mon, Sep 26, 2022 at 02:33:23PM +0300, Ilias Apalodimas wrote:
Hi Tom
On Wed, 21 Sept 2022 at 19:15, Tom Rini wrote:
On Wed, Sep 21, 2022 at 05:06:27PM +0100, Paul Barker wrote:
Add properties to the Authenta SPI flash device node to enable access by
a
On 9/26/22 14:52, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/23/22 13:20, Patrice Chotard wrote:
>> Device tree alignment with kernel v6.0-rc4.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> arch/arm/dts/stm32429i-eval-u-boot.dtsi | 2 +-
>> arch/arm/dts/stm32746g-eval.dts | 18
On 9/21/22 18:06, Paul Barker wrote:
Signed-off-by: Paul Barker
---
configs/am335x_evm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index f0fbe475b394..f73123e0b71d 100644
--- a/configs/am335x_evm_defconfig
+++
On Mon, Sep 26, 2022 at 02:33:23PM +0300, Ilias Apalodimas wrote:
> Hi Tom
>
> On Wed, 21 Sept 2022 at 19:15, Tom Rini wrote:
> >
> > On Wed, Sep 21, 2022 at 05:06:27PM +0100, Paul Barker wrote:
> > > Add properties to the Authenta SPI flash device node to enable access by
> > > a UEFI
On 9/26/22 14:43, Ilias Apalodimas wrote:
Hi Paul,
On Wed, Sep 21, 2022 at 05:06:26PM +0100, Paul Barker wrote:
This addition allows UEFI applications running under u-boot to access
peripherals on SPI busses. It is based on the UEFI Platform
Initialization (PI) Specification, Version 1.7
Hi,
On 9/20/22 18:04, Patrice Chotard wrote:
arch-stm32f7/stm32.h file is shared between STM32F746 and STM32F769
MCUs. But STM32F769 embeds 2MB of internal flash instead of 1MB for
STM32F746. The flash layout is quite similar between the 2 SoCs :
STM32F746
Hi,
On 9/20/22 18:04, Patrice Chotard wrote:
By pressing "c" key during SPL execution, we force U-boot execution
instead of a kernel XIP image.
This fixes a hard fault when booting stm32f746-disco in SPL with "c"
key pressed during SPL execution.
U-Boot SPL 2022.10-rc5-9-g40d02baa91 (Sep
Hi,
On 9/20/22 18:04, Patrice Chotard wrote:
STM32F746 embeds 1 MB of internal flash [0x0800-0x080f],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.
Signed-off-by: Patrice Chotard
---
(no changes since v1)
Hi,
On 9/20/22 18:04, Patrice Chotard wrote:
STM32F746 embeds 1 MB of internal flash [0x0800-0x080f],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.
Signed-off-by: Patrice Chotard
---
(no changes since v1)
Hi,
On 9/20/22 18:04, Patrice Chotard wrote:
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Hi,
On 9/20/22 18:04, Patrice Chotard wrote:
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Hi,
On 9/23/22 13:20, Patrice Chotard wrote:
Device tree alignment with kernel v6.0-rc4.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32429i-eval-u-boot.dtsi | 2 +-
arch/arm/dts/stm32746g-eval.dts | 18 -
arch/arm/dts/stm32f4-pinctrl.dtsi| 2 +-
Hi,
On 9/20/22 18:04, Patrice Chotard wrote:
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Hi Paul,
On Wed, Sep 21, 2022 at 05:06:26PM +0100, Paul Barker wrote:
> This addition allows UEFI applications running under u-boot to access
> peripherals on SPI busses. It is based on the UEFI Platform
> Initialization (PI) Specification, Version 1.7 Errata A (April 2020).
> Only the core
On 9/19/22 14:21, Michal Simek wrote:
Hi,
I am sending support for new Xilinx/AMD SoC called Versal NET.
Versal NET is very similar to origin Versal SOC. There is different
register layout, some IPs have been upgraded like i3c and some other
changes in different location.
Thanks,
Michal
On Mon, Sep 26, 2022 at 7:53 PM Christian Kohlschütter
wrote:
>
> Some RK3399 boards, such as newer revisions of NanoPi R4S, do not
> provide an EEPROM chip containing a globally unique MAC address.
>
> Currently, this means that a randomly generated temporary MAC address
> may be generated each
Hi Tom,
please pull this Turris GPIO fix from Pali:
- gpio: turris_omnia_mcu: Fix registering gpios (Pali)
Here the Azure build, without any issues:
On 22.09.22 13:25, Pali Rohár wrote:
Currently all GPIOs supported by CMD_EXT_CONTROL/CMD_GET_EXT_CONTROL_STATUS
commands (last 16 GPIOs) are available only when FEAT_PERIPH_MCU feature
bit is set. So do not register these GPIOs by U-Boot driver when this
feature bit is not set, so U-Boot 'gpio'
The LS1043ARDB rev v7.0 board replace nand device MT29F4G08ABBDAH4-AITX:D
with MT29F4G08ABBFAH4-AIT:F. Reflecting this change in board_fix_fdt().
CPLD V3.0 is needed for nandboot as the nand device changed.
A new macro CPLD_CFG_RCW_SRC_NAND_4K(4Kpage) is added to distinguish from
Hallo Marek,
> Can you be more specific about those logitech receivers ? I might have one
> of those devices, and I have DWC3 in i.MX8MP and i.MX8MQ, as well as ZynqMP,
> so I should be able to try and trigger the problem. Can you share the
> reproducer test case for this problem ?
I can
Avoid signed extension for uuid and byte.
Eliminate the below smatch warnings:
board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup()
warn: impossible condition '(byte == 255) => ((-128)-127 == 255)'
board/xilinx/common/board.c:466 board_late_init_xilinx()
warn: argument 3 to %02x
Please ignore this patch.
Thanks
Venkatesh
> -Original Message-
> From: Venkatesh Yadav Abbarapu
> Sent: Monday, September 26, 2022 11:55 AM
> To: u-boot@lists.denx.de
> Cc: Simek, Michal ; g...@xilinx.com
> Subject: [v2 UBOOT PATCH 1/3] xilinx: common: Fix static checker warnings
>
>
Avoid signed extension for uuid and byte.
Eliminate the below smatch warnings:
board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup()
warn: impossible condition '(byte == 255) => ((-128)-127 == 255)'
board/xilinx/common/board.c:466 board_late_init_xilinx()
warn: argument 3 to %02x
In fdt_rw.c, -FDT_ERR_BADOFFSET is returned when either the sum of the
old
length and the splice point are less than the splice point, or when the
sum of the old length and the splice point exceed the end of the
pointer.
Adding an int and a pointer may result in a pointer overflow, an
undefined
Some RK3399 boards, such as newer revisions of NanoPi R4S, do not
provide an EEPROM chip containing a globally unique MAC address.
Currently, this means that a randomly generated temporary MAC address
may be generated each time the device is rebooted, leading to ARP cache
issues and other
I'm running ubuntu 20.04 server (which uses u-boot v2021.01 with minor
changes/enhancements)
fw_printenv doesn't seem to work -- it always comes up with a crc error (I
haven't tried fw_setenv yet).
Is there a spec of how the environment works? I haven't seen one.
Without this patch, I get:
On Fri, Aug 12, 2022 at 08:21:02PM -0600, Simon Glass wrote:
> Hi Abdellatif,
>
> On Mon, 1 Aug 2022 at 11:21, Abdellatif El Khlifi
> wrote:
> >
> > Add the driver implementing Arm Firmware Framework for Armv8-A v1.0
> >
> > The Firmware Framework for Arm A-profile processors (FF-A)
> >
Hi Tom
On Wed, 21 Sept 2022 at 19:15, Tom Rini wrote:
>
> On Wed, Sep 21, 2022 at 05:06:27PM +0100, Paul Barker wrote:
> > Add properties to the Authenta SPI flash device node to enable access by
> > a UEFI application using a fixed GUID. Also specify that this device is
> > JEDEC compatible so
On Tue, Aug 16, 2022 at 01:48:31PM +0200, Jens Wiklander wrote:
> On Mon, Aug 1, 2022 at 7:21 PM Abdellatif El Khlifi
> wrote:
> >
> > set to zero the x0-x17 registers
> >
> > As per the SMCCC v1.2 spec, unused result and scratch registers can leak
> > information after an SMC call. We can
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