[PATCH v2] riscv: andesv5: Prefer using the generic RISC-V timer driver in S-mode

The Andes PLMT driver directly accesses the mtime MMIO region, indicating its intended use in the M-mode boot stage. However, since U-Boot proper (S-mode) also uses the PLMT driver, we need to specifically mark the region as readable through PMPCFGx (or S/U-mode read-only shared data region for

Re: [PATCH] riscv: andesv5: Prefer using the generic RISC-V timer driver in S-mode

Hi Samuel, On Wed, Sep 27, 2023 at 04:32:30PM -0500, Samuel Holland wrote: > On 9/27/23 02:25, Yu Chien Peter Lin wrote: > > The Andes PLMT driver directly accesses the mtime MMIO region, > > indicating its intended use in the M-mode boot stage. However, > > since U-Boot proper (S-mode) also uses

Re: [PATCH v5 5/7] cmd: efidebug: add uri device path

On Thu, 28 Sept 2023 at 23:32, Maxim Uvarov wrote: > > > > On Wed, 27 Sept 2023 at 15:38, Masahisa Kojima > wrote: >> >> This adds the URI device path option for 'boot add' subcommand. >> User can add the URI load option for downloading ISO image file >> or EFI application through network.

Re: [PATCH v4 4/8] efi_loader: support boot from URI device path

Hi Maxim, On Thu, 28 Sept 2023 at 20:35, Maxim Uvarov wrote: > > > > On Tue, 26 Sept 2023 at 09:01, Masahisa Kojima > wrote: >> >> Hi Ilias, >> >> On Mon, 25 Sept 2023 at 21:37, Ilias Apalodimas >> wrote: >> > >> > On Fri, Sep 22, 2023 at 04:11:15PM +0900, Masahisa Kojima wrote: >> > > This

Re: [PATCH] spl: Jump to image at end of board_init_r

On 9/27/23 23:44, Jonas Karlman wrote: spl_board_prepare_for_boot() is not called before jumping/invoking atf, optee, opensbi or linux images. Jump to image at the end of board_init_r() to fix this. Signed-off-by: Jonas Karlman --- This patch have dependencies on the following patches: spl:

[PATCH 0/2] stdio: fix stdio_deregister_dev()

When setting or copying the name field of a stdio device we must ensure that the target field is NUL terminated. Avoid truncation in stdio_deregister_dev(). Heinrich Schuchardt (2): dm: serial: fix serial_post_probe() stdio: fix stdio_deregister_dev() common/stdio.c | 6

[PATCH 2/2] stdio: fix stdio_deregister_dev()

When copying the name of a stdio device we must ensure that it is NUL terminated before passing it to strcmp() to avoid a buffer overrun. Truncating the name field leads to failure to deregister a stdio device. When copying we must ensure that the name field sizes match. Addresses-Coverity-ID:

[PATCH 1/2] dm: serial: fix serial_post_probe()

The size of the name of a udevice is not limited. When setting the fixed sized name field of a stdio device we must ensure that the target string is NUL terminated to avoid buffer overflows. Fixes: 57d92753d4ca ("dm: Add a uclass for serial devices") Signed-off-by: Heinrich Schuchardt ---

Re: [PATCH] spl: Jump to image at end of board_init_r

On Wed, 27 Sept 2023 at 15:44, Jonas Karlman wrote: > > spl_board_prepare_for_boot() is not called before jumping/invoking atf, > optee, opensbi or linux images. > > Jump to image at the end of board_init_r() to fix this. > > Signed-off-by: Jonas Karlman > --- > This patch have dependencies on

[PATCH v2 22/22] sunxi: add MangoPi MQ-R board support

This copies the T113s specific DTs from the Linux kernel tree (v6.4-rc1), and adds a defconfig to get the board booted. Signed-off-by: Andre Przywara --- arch/arm/dts/Makefile | 2 + .../arm/dts/sun8i-t113s-mangopi-mq-r-t113.dts | 35 +

[PATCH v2 21/22] ARM: dts: sunxi: add Allwinner T113-s SoC .dtsi

The Allwinner T113-s SoC is apparently using the same (or at least a very similar) die as the D1/D1s, but replaces the single RISC-V core with two Arm Cortex-A7 cores. Since the D1 core .dtsi already describes all common peripherals, we just need a DT describing the ARM specific peripherals: the

[PATCH v2 20/22] riscv: dts: allwinner: Add the D1/D1s SoC devicetree

From: Samuel Holland D1 (aka D1-H), D1s (aka F133), R528, and T113 are a family of SoCs based on a single die, or at a pair of dies derived from the same design. D1 and D1s contain a single T-HEAD Xuantie C906 CPU, whereas R528 and T113 contain a pair of Cortex-A7's. D1 and R528 are the full

[PATCH v2 19/22] sunxi: refactor serial base addresses to avoid asm/arch/cpu.h

At the moment we have each SoC's memory map defined in its own cpu.h, which is included in include/configs/sunxi_common.h. This will be a problem with the introduction of Allwinner RISC-V support. Remove the inclusion of that header file from the common config header, instead move the required

[PATCH v2 18/22] sunxi: R528: add SMHC2 pin pull ups support

From: Okhunjon Sobirjonov Add support for eMMC (SMHC2) pin pull ups for R528 boards. The D1 and T113s (and even R329) SoCs do not support 8-bit eMMC anymore, so it's just four data pins to cover here. Signed-off-by: Okhunjon Sobirjonov Reviewed-by: Andre Przywara [Andre: adjust commit

[PATCH v2 17/22] sunxi: add Allwinner R528/T113 SoC support

This adds the remaining code bits to teach U-Boot about Allwinner's newest SoC generation. This was introduced with the RISC-V based Allwinner D1 SoC, which actually shares a die with the ARM cores versions called R528 (BGA, without DRAM) and T113s (QFP, with embedded DRAM). This adds the new

[PATCH v2 16/22] sunxi: add R528/T113-s3/D1(s) DRAM initialisation code

The Allwinner R528/T113-s/D1/D1s SoCs all share the same die, so use the same DRAM initialisation code. Make use of prior art here and lift some code from awboot[1], which carried init code based on earlier decompilation efforts, but with a GPL2 license tag. This code has been heavily reworked and

[PATCH v2 15/22] Kconfig: sunxi: prepare for using drivers/ram/sunxi

At the moment all Allwinner DRAM initialisation routines are stored in arch/arm/mach-sunxi, even though those "drivers" are just a giant collection of writel's, without any architectural dependency. The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V cores) share the same die, so

[PATCH v2 14/22] sunxi: clock: support D1/R528 PLL6 clock

The PLL_PERIPH0 clock changed a bit in the D1/R528/T113s SoCs: there is new P0 divider at bits [18:16], and the M divider is 1. Add code to support this version of "PLL6". Signed-off-by: Andre Przywara --- .../include/asm/arch-sunxi/clock_sun50i_h6.h | 2 ++

[PATCH v2 13/22] sunxi: clock: D1/R528: Enable PLL LDO during PLL1 setup

The D1/R528/T113s SoCs introduce a new "LDO enable" bit in the CPUX_PLL. Just enable that when we program that PLL. Signed-off-by: Andre Przywara --- arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h | 1 + arch/arm/mach-sunxi/clock_sun50i_h6.c | 12 +++- 2 files changed, 8

[PATCH v2 12/22] clk: sunxi: Add support for the D1 CCU

From: Samuel Holland Since the D1 CCU binding is defined, we can add support for its gates/resets, following the pattern of the existing drivers. Signed-off-by: Samuel Holland Reviewed-by: Andre Przywara Acked-by: Sean Anderson Signed-off-by: Andre Przywara --- drivers/clk/sunxi/Kconfig

[PATCH v2 11/22] pinctrl: sunxi: add Allwinner D1 pinctrl description

Apart from using the new pinctrl MMIO register layout, the Allwinner D1 and related SoCs still need to usual set of mux values hardcoded in U-Boot's pinctrl driver. Add the values we need so far to this list, so that DM based drivers will just work without further ado. Signed-off-by: Andre

[PATCH v2 10/22] sunxi: introduce NCAT2 generation model

Allwinner seems to typically stick to a common MMIO memory map for several SoCs, but from time to time does some breaking changes, which also introduce new generations of some peripherals. The last time this happened with the H6, which apart from re-organising the base addresses also changed the

[PATCH v2 09/22] pinctrl: sunxi: add new D1 pinctrl support

For the first time since at least the Allwinner A10 SoCs, the D1 (and related cores) use a new pincontroller MMIO register layout, so we cannot use our hardcoded, fixed offsets anymore. Ideally this would all be handled by devicetree and DM drivers, but for the DT-less SPL we still need the legacy

[PATCH v2 08/22] pinctrl: sunxi: move PIO_BASE into sunxi_gpio.h

On the Allwinner platform we were describing a quite comprehensive memory map in a per-SoC header unser arch/arm. In the old days that was used by every driver, but nowadays it should only be needed by SPL drivers (not using the DT). Many addresses in there were never used, and some are not needed

[PATCH v2 07/22] pinctrl: sunxi: remove GPIO_EXTRA_HEADER

U-Boot's generic GPIO_EXTRA_HEADER is a convenience symbol to allow code to more easily include platform specific GPIO headers. This should not be needed in a DM world anymore, since the generic GPIO framework handles that nicely. For Allwinner boards we still need to deal with non-DM GPIO in the

[PATCH v2 06/22] pinctrl: sunxi: remove struct sunxi_gpio

So far every Allwinner SoC used the same basic pincontroller/GPIO register frame, and just differed by the number of implemented banks and pins, plus some special functionality from time to time. However the D1 and successors use a slightly different pinctrl register layout. Use that opportunity

[PATCH v2 05/22] pinctrl: sunxi: add GPIO in/out wrappers

So far we were open-coding the pincontroller's GPIO output/input access in each function using that. Provide functions that wrap that nicely, and follow the existing pattern (set/get_{bank,}), so users don't need to know about the internals, and we can abstract the new D1 pinctrl more easily.

[PATCH v2 04/22] pinctrl: sunxi: move pinctrl code

Move the existing sunxi-specific low level pinctrl routines from arch/arm/mach-sunxi into the existing GPIO code under drivers/gpio, so that the common code can be shared outside of arch/arm. This also takes the opportunity to move some definitions from our header file into the driver C file, as

[PATCH v2 03/22] sunxi: remove CONFIG_MACPWR

The CONFIG_MACPWR Kconfig symbol is used to point to a GPIO that enables the power for the Ethernet "MAC" (mostly PHY, really). In the DT this is described with the phy-supply property in the MAC DT node, pointing to a (GPIO controlled) regulator. Since we need Ethernet only in U-Boot proper, and

[PATCH v2 02/22] net: sunxi_emac: chase DT nodes to find PHY regulator

At the moment the sun4i EMAC driver relies on hardcoded CONFIG_MACPWR Kconfig symbols to enable potential PHY regulators. As we want to get rid of those, we need to find the regulator by chasing up the DT. The sun4i-emac binding puts the PHY regulator into the MDIO node, which is the parent of

[PATCH v2 01/22] sunxi: remove CONFIG_SATAPWR

The CONFIG_SATAPWR Kconfig symbol was used to point to a GPIO that enables the power for a SATA harddisk. In the DT this is described with the target-supply property in the AHCI DT node, pointing to a (GPIO controlled) regulator. Since we need SATA only in U-Boot proper, and use a DM driver for

[PATCH v2 00/22] sunxi: Allwinner T113s support

Hi, this is an update to the Allwinner T113s support series. It addresses some comments I got (many thanks to the reviewers!). Samuel had a mishap where his email client ate his draft responses, so the put the gist of his review comments in an IRC query. Most of the GPIO changes in this series

Re: [PATCH v2] dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation : regression

Hi Roger, On 2023-09-28 14:59, Roger Quadros wrote: > Hi, > > On 21/08/2023 01:03, Jonas Karlman wrote: >> Nodes with bootph-pre-sram/ram props are bound in multiple phases: >> 1. At TPL (bootph-pre-sram) or SPL (bootph-pre-ram) phase >> 2. At U-Boot proper pre-relocation phase >> 3. At U-Boot

[PATCH] spl: Jump to image at end of board_init_r

spl_board_prepare_for_boot() is not called before jumping/invoking atf, optee, opensbi or linux images. Jump to image at the end of board_init_r() to fix this. Signed-off-by: Jonas Karlman --- This patch have dependencies on the following patches: spl: add __noreturn attribute to

[PATCH v2 3/3] rockchip: cmd: add rkmtd command

The command rkmtd creates a virtual block device to transfer Rockchip boot block data to and from NAND with block orientated tools like "ums" and "rockusb". It uses the Rockchip MTD driver to scan for boot blocks and copies data from the first block in a GPT formated virtual disk. Data must be

[PATCH v2 2/3] dm: prepare rkmtd UCLASS

Prepare a rkmtd UCLASS in use for writing Rockchip boot blocks in combination with existing userspace tools and rockusb command. Signed-off-by: Johan Jonker Reviewed-by: Kever Yang --- disk/part.c| 4 drivers/block/blk-uclass.c | 1 + include/dm/uclass-id.h | 1 + 3

[PATCH v2 1/3] mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option

On Rockchip SoCs the first boot stages are written on NAND with help of manufacturer software that uses a different format then the MTD framework. Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN option to be able to pass the driver probe function and to let the original data unchanged.

[PATCH v2 0/3] Add rkmtd command

The command rkmtd creates a virtual block device to transfer Rockchip boot block data to and from NAND with block orientated tools like "ums" and "rockusb". It uses the Rockchip MTD driver to scan for boot blocks and copies data from the first block in a GPT formatted virtual disk. Data must be

Re: [PATCH] board: LicheePi_Zero: add emac support

On Sat, 23 Sep 2023 16:53:49 +0800 clb...@outlook.com wrote: Hi, thanks for sending a patch. Please make sure to CC: the respective maintainers, as listed by scripts/get_maintainer.pl. First this needs some commit message, stating why this change is needed. Looking down, this actually looks

Re: [PATCH v1 3/3] arm: npcm8xx: support dcache off

On Thu, Sep 28, 2023 at 10:32:51PM +0800, Jim Liu wrote: > Hi Tom > > Thanks for your understanding. > but this patch is an incomplete patch. > After I applied this patch I had another error. > > arch/arm/cpu/armv8/cache_v8.c:773:2: error: #error Please describe > your MMU layout in

Re: [PATCH] dt-bindings: mtd: Add a schema for binman

Hi again Rob, On Wed, 27 Sept 2023 at 10:43, Simon Glass wrote: > > Hi Rob, > > On Tue, 26 Sept 2023 at 11:29, Rob Herring wrote: > > > > On Tue, Sep 26, 2023 at 2:48 AM Miquel Raynal > > wrote: > > > > > > Hello, > > > > > > > > > > > These are firmware bindings, as indicated, but I > > > >

Re: [PATCH v1] board: toradex: verdin-imx8mm: set fixed LPDDR4 refresh rate as per errata ERR050805

On Thu, 2023-09-28 at 16:39 +0200, Andrejs Cainikovs wrote: > From: Andrejs Cainikovs > > Update lpddr4 configuration and training using updated spreadsheet and > tools from NXP using data from previous spreadsheet and verified > toward datasheet: > > - MX8M_Mini_LPDDR4_RPA_v22.xlsx > -

[PATCH v3 1/4] common: Only mark malloc initialized after mem_malloc_init

Instead of marking malloc as initialized as soon as relocation is done, defer it until after we call mem_malloc_init. This ensures that malloc initialization is done before we switch away from simple_malloc, and matches the SPL behavior. Fixes: c9356be3074 ("dm: Split the simple malloc()

[PATCH v3 2/4] malloc: Don't use ifdefs for SYS_MALLOC_DEFAULT_TO_INIT

With CONFIG_IS_ENABLED we can eliminate some ifdefs. Signed-off-by: Sean Anderson Reviewed-by: Heinrich Schuchardt Reviewed-by: Simon Glass --- (no changes since v1) common/dlmalloc.c | 9 ++--- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/common/dlmalloc.c

[PATCH v3 3/4] malloc: Don't statically initialize av_ if using malloc_init

When we enable malloc_init, there is no need to statically initialize av_, since we are going to do it manually. This lets us move av_ to .bss, saving around 1-2k of data (depending on the pointer size). cALLOc must be adjusted to not access top before malloc_init. While we're at it,

[PATCH v3 4/4] malloc: Enable SYS_MALLOC_RUNTIME_INIT by default in SPL

On boards with size restrictions, 1-2k can be a significant fraction of the binary size. Add a new SPL version of SYS_MALLOC_RUNTIME_INIT. As this trades text size for BSS size, enable it by default only for boards with at least 16k of BSS. Signed-off-by: Sean Anderson --- Changes in v3: -

[PATCH v3 0/4] malloc: Reduce size by initializing data at runtime

In my efforts to get SPL to fit into flash after some changes I made, I noticed that av_ is one of the largest variables in SPL. As it turns out, we can generate it at runtime, and the code is already there. This has the potential to save 1-2k across the board, for some (very) minor boot time

Re: SSE instructions

Hi Simon, On Thu, Sep 28, 2023 at 10:20 PM Simon Glass wrote: > > Hi Bin, > > On Thu, 28 Sept 2023 at 08:15, Bin Meng wrote: > > > > Hi Simon, > > > > On Thu, Sep 28, 2023 at 10:41 AM Simon Glass wrote: > > > > > > Hi Bin, > > > > > > U-Boot 64-bit on x86 disables sse, but when enabling

[PATCH v1] board: toradex: verdin-imx8mm: set fixed LPDDR4 refresh rate as per errata ERR050805

From: Andrejs Cainikovs Update lpddr4 configuration and training using updated spreadsheet and tools from NXP using data from previous spreadsheet and verified toward datasheet: - MX8M_Mini_LPDDR4_RPA_v22.xlsx - mscale_ddr_tool_v3.31_setup.exe The most relevant update is related to errata

Re: [PATCH v1 3/3] arm: npcm8xx: support dcache off

Hi Tom Thanks for your understanding. but this patch is an incomplete patch. After I applied this patch I had another error. arch/arm/cpu/armv8/cache_v8.c:773:2: error: #error Please describe your MMU layout in CONFIG_SYS_MEM_MAP and enable dcache. 773 | #error Please describe your MMU

Re: [PATCH v5 5/7] cmd: efidebug: add uri device path

On Wed, 27 Sept 2023 at 15:38, Masahisa Kojima wrote: > This adds the URI device path option for 'boot add' subcommand. > User can add the URI load option for downloading ISO image file > or EFI application through network. Currently HTTP is only supported. > > Signed-off-by: Masahisa Kojima >

Re: [PATCH 1/4] arm: dts: Refactor common dtsi file for R5 and A53 SPL

On 15:09-20230928, Nitin Yadav wrote: > > > On 27/09/23 17:26, Nishanth Menon wrote: > > On 13:51-20230927, Nitin Yadav wrote: > >> Add k3-am62x-r5-sk-common to include nodes common for R5 > >> SPL from k3-am625-r5-sk for AM62x SoC based boards. Add > >>

Re: [PATCH 2/4] arm: dts: Add support for AM62x LP SK

On 15:00-20230928, Nitin Yadav wrote: > Hi, > > On 27/09/23 17:22, Nishanth Menon wrote: > > On 13:51-20230927, Nitin Yadav wrote: > >> The AM62x LP SK board is similar to the AM62x SK board, > >> but has some significant changes that requires different > >&

Re: SSE instructions

Hi Bin, On Thu, 28 Sept 2023 at 08:15, Bin Meng wrote: > > Hi Simon, > > On Thu, Sep 28, 2023 at 10:41 AM Simon Glass wrote: > > > > Hi Bin, > > > > U-Boot 64-bit on x86 disables sse, but when enabling Truetype I get a > > compiler error: > > > > drivers/video/console_truetype.c: In function

Re: SSE instructions

Hi Heinrich, On Thu, 28 Sept 2023 at 00:26, Heinrich Schuchardt wrote: > > On 9/28/23 04:41, Simon Glass wrote: > > Hi Bin, > > > > U-Boot 64-bit on x86 disables sse, but when enabling Truetype I get a > > compiler error: > > > > drivers/video/console_truetype.c: In function 'frac': > >

Re: SSE instructions

Hi Simon, On Thu, Sep 28, 2023 at 10:41 AM Simon Glass wrote: > > Hi Bin, > > U-Boot 64-bit on x86 disables sse, but when enabling Truetype I get a > compiler error: > > drivers/video/console_truetype.c: In function 'frac': > drivers/video/console_truetype.c:30:15: error: SSE register return >

Re: [PATCH v2] dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation : regression

Hi, On 21/08/2023 01:03, Jonas Karlman wrote: > Nodes with bootph-pre-sram/ram props are bound in multiple phases: > 1. At TPL (bootph-pre-sram) or SPL (bootph-pre-ram) phase > 2. At U-Boot proper pre-relocation phase > 3. At U-Boot proper normal phase > > However the binding and U-Boot Driver

Re: [PATCH v2 1/6] Kbuild: Fix cleanup of generated sources in tools

On 20/06/2023 00.41, Tobias Deiminger wrote: > quiet_cmd_wrap = WRAP$@ > -cmd_wrap = echo "\#include <../$(patsubst $(obj)/%,%,$@)>" >$@ > +cmd_wrap = echo "\#include <../$(patsubst $(obj)/generated/%,%,$@)>" >$@ > > -$(obj)/boot/%.c $(obj)/common/%.c $(obj)/env/%.c $(obj)/lib/%.c: >

Re: [PATCH v1 3/3] arm: npcm8xx: support dcache off

On Thu, Sep 28, 2023 at 08:49:23AM +0800, Jim Liu wrote: > Hi Tom > > Thanks for the quick review. > > if we set the CONFIG_SYS_DCACHE_OFF the armv8 will build error. > So we added a workaround for our bmc uboot. > > the error message as below: > > CONFIG_SYS_DCACHE_OFF can't be enabled on

[PATCH] mkimage: allow internalization of data-position

Make it possible for data that was externalized using a static external position (-p) to be internalized. Enables the ability to convert existing FIT images built with -p to be converted to a FIT image where the data is internal, to be converted to a FIT image where the data is external relative

Re: [PATCH v4 4/8] efi_loader: support boot from URI device path

On Tue, 26 Sept 2023 at 09:01, Masahisa Kojima wrote: > Hi Ilias, > > On Mon, 25 Sept 2023 at 21:37, Ilias Apalodimas > wrote: > > > > On Fri, Sep 22, 2023 at 04:11:15PM +0900, Masahisa Kojima wrote: > > > This supports to boot from the URI device path. > > > When user selects the URI device

Re: [PATCH] mmc: Add SPL_MMC_PWRSEQ to fix link issue when building SPL

On Mon Sep 25, 2023 at 11:55 PM CEST, Jonas Karlman wrote: > With MMC_PWRSEQ enabled the following link issue may happen when > building SPL and SPL_PWRSEQ is not enabled. > > aarch64-linux-gnu-ld.bfd: drivers/mmc/meson_gx_mmc.o: in function > `meson_mmc_probe': >

Re: [PATCH v3 02/16] arm: mach-k3: Add basic support for J784S4 SoC definition

On 09/09/23 16:18, Roger Quadros wrote: Hi, On 08/09/2023 14:05, Apurva Nandan wrote: Add j784s4 initialization files for initial SPL boot. Please be consistent in naming. J784S4 ? Signed-off-by: Hari Nagalla [ add firewall configurations and change the R5 MCU scratchpad ] Signed-off-by:

Re: [PATCH v3 02/16] arm: mach-k3: Add basic support for J784S4 SoC definition

On 09/09/23 16:18, Roger Quadros wrote: Hi, On 08/09/2023 14:05, Apurva Nandan wrote: Add j784s4 initialization files for initial SPL boot. Please be consistent in naming. J784S4 ? Signed-off-by: Hari Nagalla [ add firewall configurations and change the R5 MCU scratchpad ] Signed-off-by:

Re: [PATCH 1/4] arm: dts: Refactor common dtsi file for R5 and A53 SPL

On 27/09/23 17:26, Nishanth Menon wrote: > On 13:51-20230927, Nitin Yadav wrote: >> Add k3-am62x-r5-sk-common to include nodes common for R5 >> SPL from k3-am625-r5-sk for AM62x SoC based boards. Add >> k3-am62x-sk-common-u-boot to move common nodes of A53 SPL >> stage from k3-am625-sk-u-boot.

Re: [PATCH 0/4] Add AM62x LP SK support

On 27/09/23 17:26, Nishanth Menon wrote: > On 13:51-20230927, Nitin Yadav wrote: >> This series adds support of AM62x LP SK. The AM62x LP SK board >> is similar to AM62x SK but has some significant changes that >> requires different set of device tree at each stage of bootloader. >> Also

Re: [PATCH 2/4] arm: dts: Add support for AM62x LP SK

Hi, On 27/09/23 17:22, Nishanth Menon wrote: > On 13:51-20230927, Nitin Yadav wrote: >> The AM62x LP SK board is similar to the AM62x SK board, >> but has some significant changes that requires different >> device tree. >> >> The differences are mainly: >> - AM62x SoC in the AMC package that

Re: [RFT PATCH 0/2] mmc: meson-gx: improve MMC reliabilty

From: Neil Armstrong Hi, On Fri, 15 Sep 2023 18:01:28 +0200, Jerome Brunet wrote: > Amlogic MMC on the GX (and later) SoCs has been problematic for years, > especially with u-boot. > > Linux has been fairly stable for a few years. It is using a fixed phase > setting with Core = 180, Tx = 0 and

Re: [PATCH v2 0/2] clk: amlogic: a1: Add Amlogic A1 clock driver

Hi, On Mon, 25 Sep 2023 18:52:07 +0300, Igor Prusov wrote: > This series adds dt-bindings and driver implementation for Amlogic A1 > PLL and Peripherals clock controllers. > > V1: > https://lore.kernel.org/all/20230917101308.1250-1-ivpru...@salutedevices.com/ > > V1 -> V2: > - Add more

Re: [PATCH v3 0/8] Add SM uclass and Meson SM driver

Hi, On Thu, 21 Sep 2023 11:13:33 +0300, Alexey Romanov wrote: > At the moment, there is no single general approach to using > secure monitor in U-Boot, there is only the smc_call() function, > over which everyone builds their own add-ons. This patchset > is designed to solve this problem by

Re: [RFT PATCH 0/2] mmc: meson-gx: improve MMC reliabilty

Hi, On 15/09/2023 18:01, Jerome Brunet wrote: Amlogic MMC on the GX (and later) SoCs has been problematic for years, especially with u-boot. Linux has been fairly stable for a few years. It is using a fixed phase setting with Core = 180, Tx = 0 and Rx = 0 (the latter cannot be set starting

Re: [PATCH] mmc: Add SPL_MMC_PWRSEQ to fix link issue when building SPL

On 25/09/2023 23:55, Jonas Karlman wrote: With MMC_PWRSEQ enabled the following link issue may happen when building SPL and SPL_PWRSEQ is not enabled. aarch64-linux-gnu-ld.bfd: drivers/mmc/meson_gx_mmc.o: in function `meson_mmc_probe': drivers/mmc/meson_gx_mmc.c:295: undefined reference

Re: [PATCH v2 0/2] clk: amlogic: a1: Add Amlogic A1 clock driver

On 25/09/2023 17:52, Igor Prusov wrote: This series adds dt-bindings and driver implementation for Amlogic A1 PLL and Peripherals clock controllers. V1: https://lore.kernel.org/all/20230917101308.1250-1-ivpru...@salutedevices.com/ V1 -> V2: - Add more verbose comments for driver Igor

Re: [PATCH v3 0/8] Add SM uclass and Meson SM driver

On 21/09/2023 10:13, Alexey Romanov wrote: Hello! At the moment, there is no single general approach to using secure monitor in U-Boot, there is only the smc_call() function, over which everyone builds their own add-ons. This patchset is designed to solve this problem by adding a new uclass -

[PATCH 5/4] mkimage: update man page and -h output

The man page correctly said that -B was ignored without -E, while the `mkimage -h` output suggested otherwise. Now that -B can actually be used by itself, update the man page. While at it, also amend the `mkimage -h` line to mention the connection with -E. The FDT header is a fixed 40 bytes, so

Re: [PATCH 1/2] configs: am65x: Merge the HS and non-HS defconfigs

Hi Andrew, On 04/08/23 10:35, Manorit Chawdhry wrote: > Hi Andrew, > > On 09:54-20230803, Andrew Davis wrote: >> K3 devices have runtime type board detection. Make the default defconfig >> include the secure configuration. Then remove the HS specific config. >> >> Non-HS devices will continue to

Re: [PATCH 1/4] mkimage: also honour -B even without external data

On 27/09/2023 21.02, Sean Anderson wrote: > On 9/19/23 07:37, Rasmus Villemoes wrote: >> In some cases, using the "external data" feature is impossible or >> undesirable, but one may still want (or need) the FIT image to have a >> certain alignment. Also, given the current 'mkimage -h' output, >>

Re: SSE instructions

On 9/28/23 04:41, Simon Glass wrote: Hi Bin, U-Boot 64-bit on x86 disables sse, but when enabling Truetype I get a compiler error: drivers/video/console_truetype.c: In function 'frac': drivers/video/console_truetype.c:30:15: error: SSE register return with SSE disabled 30 | static double

Re: [PATCH v2 1/1] mtd: nand: raw: atmel: Add error handling when rb-gpios missing

On 9/23/23 19:50, Michael Nazzareno Trimarchi wrote: On Fri, Sep 22, 2023 at 11:40 AM Eugen Hristev wrote: On 9/22/23 12:08, Alexander Dahl wrote: Adapt behaviour to Linux kernel driver. The return value of gpio_request_by_name_nodev() was not checked before, and thus in case 'rb-gpios' was