Yixun Lan 于2024年5月23日周四 07:39写道：
>
> Hi Kongyang:
>
> I've got one compiling error
>
> On 23:07 Sun 19 May , Kongyang Liu wrote:
> > Add clock controller driver for sophgo cv1800b SoC
> >
> > Signed-off-by: Kongyang Liu
> > ---
> >
> > drivers/clk/Kconfig | 1 +
> >
Add ss_cfg memory region which maps the DDRSS configuration region
for the memory controller node.
Signed-off-by: Santhosh Kumar K
Signed-off-by: Neha Malcom Francis
---
arch/arm/dts/k3-am62a-ddr.dtsi | 7 ---
arch/arm/dts/k3-j721s2-ddr.dtsi | 12
As there are few redundant functions in board/ti/*/evm.c files, pull
them to a common location of access to reuse and include the common file
to access the functions.
Call k3-ddrss driver through fixup_ddr_driver_for_ecc() to fixup the
device tree and resize the available amount of DDR, if ECC is
From: Neha Malcom Francis
Set CONFIG_NR_DRAM_BANKS to 2 as we have two banks described in the
memory/ node for lower and higher addressible DDR regions.
This allows use of FDT functions from fdt_support.c to set up and fixup
the memory/ node correctly.
Signed-off-by: Neha Malcom Francis
---
From: Neha Malcom Francis
Add CONFIG_K3_INLINE_ECC so that ECC functions can be compiled into R5 SPL
only when the config has been enabled.
Signed-off-by: Neha Malcom Francis
---
drivers/ram/Kconfig | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/ram/Kconfig
Enable ECC 1-bit error, 2-bit error, multiple 1-bit error interrupts
by setting the respective bits in the DDRSS_V2A_INT_SET_REG register.
Signed-off-by: Santhosh Kumar K
---
drivers/ram/k3-ddrss/k3-ddrss.c | 8
1 file changed, 8 insertions(+)
diff --git
Setup the ECC region's start and range using the device private data,
ddrss->ddr_bank_base[0] and ddrss->ddr_ram_size. Also, move start and
range of ECC regions from 32 bits to 64 bits to accommodate for
DDR greater than or equal to 4GB.
Signed-off-by: Santhosh Kumar K
---
As R5 is a 32 bit processor, the RAM banks' base and size calculation
is restricted to 32 bits, which results in wrong values if bank's base
is greater than 32 bits or bank's size is greater than or equal to 4GB.
So, add k3_ddrss_ddr_bank_base_size_calc() to get the base address and
size of RAM's
From: Georgi Vlaev
The 1-bit inline ECC support in TI's DDRSS bridge requires
the configured memory regions to be preloaded with a pattern
before use. This is done by the k3-ddrss driver from the
R5 SPL in a 'for' loop. It takes around 10 seconds to fill
2GB of memory, for example. Memset can
Hello,
This series is to:
Add support for Inline ECC in DDR for AM64X, AM62X, AM62AX, AM62PX,
J721S2 and J784S4 devices.
(1/8) Enable ECC priming with BIST engine
(2/8) Add a function to store base address and size of RAM's banks
in a 64-bit device private data
(3/8) Setup the ECC region
Tom Rini writes:
> On Tue, May 21, 2024 at 09:20:26PM -0500, Jon Humphreys wrote:
>> Tom Rini writes:
>>
>> > On Fri, Apr 19, 2024 at 04:28:16PM -0500, Jonathan Humphreys wrote:
>> >
>> >> Fill in the BeaglePlay's capsule GUID properties of the base binman
>> >> capsule
>> >> nodes.
>> >>
>>
On 2024/5/22 01:40, Quentin Schulz wrote:
From: Quentin Schulz
In order to be able to properly mux UART on PX30 EVB, the pinmux needs
to be done at runtime, so let's not remove the pinctrl nodes from the
SPL DTB.
Signed-off-by: Quentin Schulz
Reviewed-by: Kever Yang
Thanks,
- Kever
---
On 2024/5/22 01:40, Quentin Schulz wrote:
From: Quentin Schulz
In the Device Tree, UART5 is the system UART, but in the defconfig it
currently is UART2. Let's sync the two by making the defconfig use UART5
as well.
Signed-off-by: Quentin Schulz
Reviewed-by: Kever Yang
Thanks,
- Kever
On 2024/5/22 01:40, Quentin Schulz wrote:
From: Quentin Schulz
This adds the default pinmux for UART2 and UART5 to the TPL/SPL DTB (if
not removed through the CONFIG_OF_SPL_REMOVE_PROPS symbol) as those two
controllers are always made available to all boards.
Signed-off-by: Quentin Schulz
On 2024/5/22 01:40, Quentin Schulz wrote:
From: Quentin Schulz
U-Boot proper pre-reloc is currently running out of memory on PX30
Ringneck and it is thus impossible to boot into U-Boot CLI. It is
assumed the same problem can be seen on other PX30 boards though I
cannot guarantee it since I
On 2024/5/22 01:39, Quentin Schulz wrote:
From: Quentin Schulz
U-Boot proper pre-reloc is currently running out of memory on PX30
Ringneck and it is thus impossible to boot into U-Boot CLI. It is
assumed the same problem can be seen on other PX30 boards though I
cannot guarantee it since I
On 2024/5/22 01:39, Quentin Schulz wrote:
From: Quentin Schulz
U-Boot proper pre-reloc is currently running out of memory on PX30
Ringneck and it is thus impossible to boot into U-Boot CLI. It is
assumed the same problem can be seen on other PX30 boards though I
cannot guarantee it since I
On 2024/5/22 01:39, Quentin Schulz wrote:
From: Quentin Schulz
U-Boot proper pre-reloc is currently running out of memory and it is
thus impossible to boot into U-Boot CLI.
Fix this by migrating to the common bss and stack addresses for PX30,
which drastically increases the size of the
On 2024/5/22 01:39, Quentin Schulz wrote:
From: Quentin Schulz
U-Boot proper pre-reloc is currently running out of memory on PX30
Ringneck and it is thus impossible to boot into U-Boot CLI. It is
assumed the same problem can be seen on other PX30 boards though I
cannot guarantee it since I
On 2024/5/22 01:39, Quentin Schulz wrote:
From: Quentin Schulz
See commit 008ba0d56d00 ("rockchip: Add common default bss and stack
addresses") for memory layout. This migrates PX30 to use the new layout,
except for TPL. Indeed, PX30 is extremely limited in SRAM, so we need to
be extra
On 2024/5/22 01:39, Quentin Schulz wrote:
From: Quentin Schulz
This is the kind of setting that typically doesn't need to be changed
between boards based on the same SoC, so let's make it the default in
PX30 Kconfig so we don't have to care about it in the defconfig if we
don't want to.
On 2024/5/21 23:45, Chris Morgan wrote:
From: Chris Morgan
This reverts commit 41a60d0e5cef54a59596a58940fa7c9cf071034b.
On some of the supported devices the adc detect code always returns
that the button has been pushed, and as a result the device will
not boot normally.
Have you check
On 2024/5/21 23:45, Chris Morgan wrote:
From: Chris Morgan
Some of the rgxx3 devices do not have a way to recover from a poor
flash of a bootloader to eMMC. Set the device to always attempt to boot
from sdmmc0 first which ensures that we can override the boot from
emmc if we have a card
On 2024/5/21 23:45, Chris Morgan wrote:
From: Chris Morgan
This reverts commit 41a60d0e5cef54a59596a58940fa7c9cf071034b.
On some of the supported devices the adc detect code always returns
that the button has been pushed, and as a result the device will
not boot normally.
Signed-off-by:
On 2024/5/23 01:31, Heiko Stuebner wrote:
From: Heiko Stuebner
All parts expect the SPLL to run at 702MHz. In U-Boot it's the SPLL_HZ
declaring this rate and in the kernel it's a fixed clock definition.
While everything is expecting 702MHz, the SPLL is not running that
frequency when coming
On 2024/5/21 23:33, Chris Morgan wrote:
From: Chris Morgan
The Indiedroid Nova is a Rockchip RK3588S based SBC from Indiedroid.
Specifications:
Rockchip RK3588S SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
Optional eMMC
2x
On 2024/5/21 23:25, Chris Morgan wrote:
From: Chris Morgan
The Powkiddy X55 is a Rockchip RK3566 based handheld gaming device.
UART, ADC, eMMC, and SDMMC are tested to work in U-Boot and this
successfully boots mainline Linux.
Kernel commit:
e99adc97e21a ("arm64: dts: rockchip: Add Powkiddy
Revise the default baudrate to 57600
Signed-off-by: DelphineCCChiu
---
configs/ast2600_openbmc_spl_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/configs/ast2600_openbmc_spl_defconfig
b/configs/ast2600_openbmc_spl_defconfig
index efd683570f..5e95780a9a 100644
On Thu, 16 May 2024 14:11:48 -0700, Raymond Mao wrote:
> This patch set is picked from the previously posted serie:
> "[RFC] Integrate MbedTLS v3.6 LTS with U-Boot"
>
> They are not directly related to MbedTLS integration, but the
> prerequisite for a few clean-up, refactoring and minor fixes.
>
Hi Kongyang:
I've got one compiling error
On 23:07 Sun 19 May , Kongyang Liu wrote:
> Add clock controller driver for sophgo cv1800b SoC
>
> Signed-off-by: Kongyang Liu
> ---
>
> drivers/clk/Kconfig | 1 +
> drivers/clk/Makefile | 1 +
>
eMMC is enabled on E850-96 board now. Mention that in the board
documentation.
Signed-off-by: Sam Protsenko
---
doc/board/samsung/e850-96.rst | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/doc/board/samsung/e850-96.rst b/doc/board/samsung/e850-96.rst
index
Enable MMC subsystem and DW MMC driver support to make eMMC functional.
Also enable a couple of related commands so the user can make use of
eMMC from U-Boot shell.
Signed-off-by: Sam Protsenko
---
configs/e850-96_defconfig | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff
Upstream properties were added to device trees to follow current Linux
kernel. DW MMC driver was updated accordingly. Safely remove outdated
MMC properties. Details on removed properties are as follows:
* samsung,removable: replaced by non-removable
* samsung,bus-width: replaced by bus-width
*
Fix most of checkpatch warnings and other obvious style issues.
No functional change.
Signed-off-by: Sam Protsenko
---
arch/arm/mach-exynos/include/mach/dwmmc.h | 36 +--
drivers/mmc/exynos_dw_mmc.c | 26 ++--
2 files changed, 29 insertions(+), 33
Reduce U-Boot footprint by reusing dev->name as a driver's displayed
name. This changes boot device name (and "mmc info" output) from "EXYNOS
DWMMC" to something like "mmc@1210".
Signed-off-by: Sam Protsenko
---
drivers/mmc/exynos_dw_mmc.c | 2 +-
1 file changed, 1 insertion(+), 1
add_dwmci() is already calling dwmci_setup_cfg() internally, there is no
needed to call dwmci_setup_cfg() again in case when add_dwmci() is used
(for non-DM cases). Fix it by calling dwmci_setup_cfg() only in DM
cases, when add_dwmci() wasn't called. Also, this assignment:
host->mmc = >mmc;
There is no logical sense to split the initialization code between
multiple functions. Pull both do_dwmci_init() and
exynos_dwmci_core_init() into exynos_dwmmc_probe() to make the code more
simple and obvious.
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/exynos_dw_mmc.c |
Use CONFIG_IS_ENABLED() macro to check config options as recommended by
checkpatch, instead of checking those with just #ifdef CONFIG_...
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/exynos_dw_mmc.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff
common.h header is marked for removal treewide and shouldn't be used.
Remove it from Exynos DW MMC driver.
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/exynos_dw_mmc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/mmc/exynos_dw_mmc.c
Add the compatible entry and corresponding chip data for Exynos7
compatible chips, which covers modern ARM64 based Exynos chips. They
have some differences w.r.t. old ARM32 Exynos chips:
- CLKSEL register offset is different
- 64-bit IDMAC descriptor and 64-bit IDMAC registers are used
By now exynos_dw_mmc driver was relying on the correct CIU clock
frequency being set on driver init. But dw_mmc core is actually trying
to change CIU clock rate dynamically, on init and in set_ios() callback,
which it's requesting via host->get_mmc_clk() callback (the name is
misleading: although
DDR timing values should be defined in "samsung,dw-mshc-ddr-timing" dts
property, and used when DDR MMC mode is selected. Read that value from
dts and use it. If it's not available, use SDR timing values instead.
This change is following upstream Linux kernel implementation.
Signed-off-by: Sam
host->quirks field is only used internally in exynos_dw_mmc.c driver.
To avoid cluttering the scope of struct dwmci_host, move quirks field
into Exynos driver's chip data, where it can be statically defined.
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/exynos_dw_mmc.c |
Instead of using non-standard "bus_hz" dts property, read common
"clock-frequency" property used in upstream Linux kernel. It's safe to
do so, as "clock-frequency" property was already added to corresponding
nodes in all affected Exynos device tree files.
No functional change.
Signed-off-by: Sam
Instead of using non-standard "samsung,bus-width" dts property, read
common "bus-width" property used in upstream Linux kernel. It's safe to
do so, as "bus-width" property was already added to corresponding nodes
in all affected Exynos device tree files.
No functional change.
Signed-off-by: Sam
Some chips like Exynos4412 have fixed internal CIU clock divider.
Instead of reading it from non-standard "div" dts property, store its
value in the driver internally, in static chip data associated with
corresponding compatible. This makes it possible to avoid using
host->div for storing it, so
CLKSEL register offset may vary between different Exynos chips, e.g. on
ARM64 vs ARM32 chips. Provide a way to specify its offset value for each
compatible instead of hard-coding its value in read/write calls.
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/exynos_dw_mmc.c |
Update the driver to use livetree API instead of FDT one.
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/exynos_dw_mmc.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index
The obsolete "samsung,timing" dts property is now split into
"samsung,dw-mshc-ciu-div" (for holding the internal DW MMC divider
value) and "samsung,dw-mshc-sdr-timing" (for actual timing values) in
upstream Linux kernel. Rework the driver to make use of new properties
instead of the old one. All
exynos_dwmci_get_config() is called from the probe function and used to
read data from device tree. Make use of .of_to_plat driver callback
instead, and convert exynos_dwmci_get_config() to match its signature.
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/exynos_dw_mmc.c
Getting the base address with outdated fdtdec_get_addr() API and further
casting it to (void *) leads to next build warning on ARM64 platforms:
In function 'exynos_dwmci_get_config':
warning: cast to pointer from integer of different size
[-Wint-to-pointer-cast]
Add missing header guard to prevent possible build errors.
Fixes: 77b55e8cfcee ("ARM: exynos: move SoC sources to mach-exynos")
Signed-off-by: Sam Protsenko
---
arch/arm/mach-exynos/include/mach/dwmmc.h | 5 +
1 file changed, 5 insertions(+)
diff --git
New Exynos chips should implement clock drivers using CCF framework. In
that case corresponding CCF functions can be used to get/set the clock
rates. Moreover, already existing get_mmc_clk() and set_mmc_clk() calls
are only implemented for CONFIG_CPU_V7A (i.e. ARM32 chips). In case of
ARM64 chips
Pinmux configuration on ARM64 platforms must be performed during startup
in pinctrl driver using info from device tree. exynos_pinmux_config()
and pinmux_decode_periph_id() are only available on ARM32 platforms, so
don't call those functions on ARM64 platforms. Instead of the latter
function, use
In case of CONFIG_DM_MMC, host->priv actually holds (struct udevice *),
and not (struct dwmci_exynos_priv_data *). This makes *priv pointer
invalid and may lead to Synchronous Abort during its dereference later
in exynos_dwmci_board_init(). Fix it by extracting
exynos_dwmmc_get_priv() helper from
Fix most of checkpatch warnings and other obvious style issues.
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/dw_mmc.c | 69 ++--
include/dwmmc.h | 149 ++-
2 files changed, 110 insertions(+), 108 deletions(-)
Update the bindings doc for Exynos DW MMC block to follow the upstream
example and reflect the latest changes made in corresponding Linux
kernel bindings.
Signed-off-by: Sam Protsenko
---
doc/device-tree-bindings/exynos/dwmmc.txt | 46 +--
1 file changed, 27 insertions(+),
Some device tree properties for DW MMC block were updated in Linux
kernel. Let's follow its example and rework corresponding properties in
all Exynos device trees. Don't remove outdated properties yet, it'll be
done later once DW MMC driver is updated accordingly to read the updated
properties
Replace fifoth_val property with its fifo-depth counterpart in all DW
MMC drivers. fifo-depth is a common property used in upstream Linux
kernel. The FIFOTH register value will be calculated using fifo-depth
value in DW MMC core (dw_mmc.c). This change reduces code duplication in
platform drivers,
Use CONFIG_IS_ENABLED() macro to check config options as recommended by
checkpatch, instead of checking those with just #ifdef CONFIG_...
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/dw_mmc.c | 6 +++---
include/dwmmc.h | 4 ++--
2 files changed, 5 insertions(+), 5
Rework kernel-doc comments in dwmmc.h header so it's actually possible
to generate a proper documentation from it usin scripts/kernel-doc
script, with no errors.
No functional change.
Signed-off-by: Sam Protsenko
---
include/dwmmc.h | 41 ++---
1 file
Some DW MMC blocks (e.g. those on modern Exynos chips) support 64-bit
DMA addressing mode. 64-bit DW MMC variants differ from their 32-bit
counterparts:
- the register layout is a bit different (because there are additional
IDMAC registers present for storing upper part of 64-bit addresses)
Prepare for adding 64-bit IDMAC descriptors by renaming current 32-bit
descriptor and its fields accordingly. While at it, make use of
virt_to_phys() to make it more obvious in which places the physical
addresses have to be used.
No functional change.
Signed-off-by: Sam Protsenko
---
Make dwmci_prepare_data() function easier to read by extracting the
preparation of IDMAC descriptor into a dedicated function.
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/dw_mmc.c | 52 ++--
1 file changed, 31 insertions(+), 21
Make dwmci_send_cmd() easier to read by moving the DMA transfer handling
code into a dedicated function.
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/dw_mmc.c | 51 ++--
1 file changed, 30 insertions(+), 21 deletions(-)
diff --git
FIFO data transfer is implemented as quite a massive chunk of code.
Extract it into a dedicated function to make dwmci_data_transfer()
easier to read and reduce the indentation level of the code.
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/dw_mmc.c | 107
Extract clock control code into a separate routine to avoid code
duplication in dwmci_setup_bus().
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/dw_mmc.c | 60
1 file changed, 33 insertions(+), 27 deletions(-)
diff --git
Move FIFO threshold initialization into a separate function to make
dwmci_init() more readable.
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/dw_mmc.c | 25 +++--
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c
Waiting for data busy is a logically separate operation and should be
implemented as a separate routine. Follow Linux kernel example and
extract it from dwmci_send_cmd(). This way it doesn't clutter
dwmci_send_cmd() function, and can be reused later in other cases.
No functional change.
struct idmac is only used in dw_mmc.c, so move it there from dwmmc.h to
avoid cluttering the interface in the header.
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/dw_mmc.c | 7 +++
include/dwmmc.h | 7 ---
2 files changed, 7 insertions(+), 7 deletions(-)
Nobody seems to use it, so just remove it.
No functional change.
Signed-off-by: Sam Protsenko
---
include/dwmmc.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 136a95b8cdb6..39024fb38aaa 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -163,7
common.h header is marked for removal treewide and shouldn't be used.
Remove it from DW MMC driver.
No functional change.
Signed-off-by: Sam Protsenko
---
drivers/mmc/dw_mmc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index
Bring 64-bit support to dw_mmc core and Exynos dw_mmc drivers, and
enable it on E850-96 board. Additionally do some related cleanups and
device tree updates.
64-bit version of DesignWare MMC can be often found on modern ARM64
chips. It's different from its older 32-bit version (which is already
On Wed, May 22, 2024 at 06:00:10PM +0200, Jerome Forissier wrote:
> Some sandbox tests make strong assumptions on how the network stack is
> implemented. For example, the ping tests assume that ARP resolution
> occurs upon sending out the ICMP packet. This is not always the case
> with the lwIP
On Wed, May 22, 2024 at 10:21:28AM -0500, Andrew Davis wrote:
> On 5/22/24 6:37 AM, Jayesh Choudhary wrote:
> > QoS bit mapping are common across all K3 SoCs so move those defines
> > to common header file (k3_qos.h).
> > This ensures that we do not define these for each SoC.
> >
> >
Enable OF_UPSTREAM to use upstream DT and add marvell/ prefix to the
DEFAULT_DEVICE_TREE in DS116 defconfig. Remove current DTS in
arch/arm/dts/ directory.
Signed-off-by: Tony Dinh
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/armada-385-synology-ds116.dts | 291
On Wed, May 22, 2024 at 12:13 PM H Bell wrote:
>
> Add documentation files
>
> Signed-off-by: Henry Bell
> Cc: ycli...@andestech.com
> Cc: heinrich.schucha...@canonical.com
> ---
>
> Changes since v1
>
> - New patch
>
> Changes since v2
>
> - Remove extra params to
> - Clarification on boot
On Wed, May 22, 2024 at 12:13 PM H Bell wrote:
>
> Similar to the Milk-V Mars, The Star64 board contains few differences to the
> VisionFive 2 boards, so can be part of the same U-boot build.
>
> Signed-off-by: Henry Bell
> Cc: ycli...@andestech.com
> Cc: heinrich.schucha...@canonical.com
> ---
Hi Mattijs,
Thank you for your review.
ср, 22 мая 2024 г. в 17:43, Mattijs Korpershoek :
>
> Hi Roman,
>
> Thank you for the patch.
>
> On dim., mai 19, 2024 at 12:53, Roman Stratiienko
> wrote:
>
> > Quote from [1]:
> >
> > "For devices launching with Android 13, the generic ramdisk is
Quote from [1]:
"For devices launching with Android 13, the generic ramdisk is removed
from the boot image and placed in a separate init_boot image.
This change leaves the boot image with only the GKI kernel."
While at it, update wrong error handling message when vendor_boot
cannot be loaded.
On 21/05/2024 08:34, Chintan Vankar wrote:
>
>
> On 20/05/24 17:42, Roger Quadros wrote:
>>
>>
>> On 25/04/2024 15:59, Chintan Vankar wrote:
>>>
>>>
>>> On 25/04/24 17:57, Roger Quadros wrote:
On 25/04/2024 15:08, Chintan Vankar wrote:
> From: Kishon Vijay Abraham I
>
Am 22.05.24 um 18:20 schrieb Jonas Karlman:
On 2024-05-22 16:18, Alex Bee wrote:
Am 13.05.24 um 01:22 schrieb Jonas Karlman:
On 2024-05-13 00:34, Alex Bee wrote:
Am 12.05.24 um 23:37 schrieb Jonas Karlman:
Hi Alex,
On 2024-05-12 21:49, Alex Bee wrote:
Am 11.05.24 um 20:47 schrieb Jonas
Add documentation files
Signed-off-by: Henry Bell
Cc: ycli...@andestech.com
Cc: heinrich.schucha...@canonical.com
---
Changes since v1
- New patch
Changes since v2
- Remove extra params to
- Clarification on boot section
- Add entry on MAC adresses and how to correct them
Changes since v3
Similar to the Milk-V Mars, The Star64 board contains few differences to the
VisionFive 2 boards, so can be part of the same U-boot build.
Signed-off-by: Henry Bell
Cc: ycli...@andestech.com
Cc: heinrich.schucha...@canonical.com
---
Changes since v1
- Fix typos on naming
- Create pine64_star64
On 5/22/24 20:07, Ilias Apalodimas wrote:
> Hi Jerome,
>
> On Wed, 22 May 2024 at 19:04, Jerome Forissier
> wrote:
>>
>> Some sandbox tests make strong assumptions on how the network stack is
>> implemented. For example, the ping tests assume that ARP resolution
>> occurs upon sending out the
From: Vasileios Amoiridis
Currently, if the environment is not in the current boot media, the
env_get_location() is returning ENVL_UNKNOWN or ENVL_NOWHERE which
is not true (i.e booting from FLASH with environment in eMMC). This
commit adds an extra check to find the environment in the other
ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) by
ArmSoM.
There are two variants depending on the DRAM size : 8G and 16G.
Specification:
Rockchip Rk3588 SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
8/16GB memory LPDDR4x
Mali G610MC4 GPU
2x MIPI CSI 2
On Wed, 22 May 2024 at 19:04, Jerome Forissier
wrote:
>
> Add myself as a maintainer for the lwIP network stack integration code
> and network commands. The library code itself (i.e., most files under
> lib/lwip/ except README, Makefile and integration files in u-boot) is
> unmodified from
Hi Jerome,
On Wed, 22 May 2024 at 19:04, Jerome Forissier
wrote:
>
> Implement the wget_with_dns() function which is needed by
> CONFIG_EFI_HTTP_BOOT=y. Note that there is no dependency added on
> CONFIG_CMD_DNS_LWIP because CONFIG_CMD_WGET_LWIP natively supports
> hostname resolution.
>
>
On 2024-05-22 20:03, Quentin Schulz wrote:
> Hi Jianfeng Liu,
>
> On 5/22/24 6:58 PM, Jianfeng Liu wrote:
> [...]
>> Note that these commits:
>> - e18e5e8188f2 (arm64: dts: rockchip: add USBDP phys on rk3588)
>> - 6fca4edb93d3 (arm64: dts: rockchip: Add rk3588 GPU node)
>> are not synced to
Hi Jerome,
On Wed, 22 May 2024 at 19:04, Jerome Forissier
wrote:
>
> Some sandbox tests make strong assumptions on how the network stack is
> implemented. For example, the ping tests assume that ARP resolution
> occurs upon sending out the ICMP packet. This is not always the case
> with the lwIP
Hi Jianfeng Liu,
On 5/22/24 6:58 PM, Jianfeng Liu wrote:
[...]
Note that these commits:
- e18e5e8188f2 (arm64: dts: rockchip: add USBDP phys on rk3588)
- 6fca4edb93d3 (arm64: dts: rockchip: Add rk3588 GPU node)
are not synced to u-boot, so I remove usb3 drd nodes and gpu from kernel
devicetree.
From: Heiko Stuebner
All parts expect the SPLL to run at 702MHz. In U-Boot it's the SPLL_HZ
declaring this rate and in the kernel it's a fixed clock definition.
While everything is expecting 702MHz, the SPLL is not running that
frequency when coming from the bootrom though, instead it's running
Hi Tom,
BLK is currently a dependency for EFI_LOADER as shown in the snippet from
lib/efi_loader/Kconfig below. Perhaps the question is why EFI_LOADER requires a
block device? If I remove this depends on BLK line, then I can enable EFI and
successfully simulate the EFI hello world on my test
Introduce the board and provide instructions on how to get
it work.
Signed-off-by: Jiaxun Yang
---
doc/board/emulation/index.rst | 1 +
doc/board/emulation/qemu-xtensa.rst | 33 +
2 files changed, 34 insertions(+)
diff --git
Introduce the new board, define every bits.
Signed-off-by: Jiaxun Yang
---
v2:
- Fix maintainers entries
- Refine address mapping for noMMU machine
- Add a dtsi overlay to describe different memory size for noMMU system
---
arch/xtensa/Kconfig | 5
It is required to get it xtensa OF_UPSTREAM work.
Reviewed-by: Sumit Garg
Signed-off-by: Jiaxun Yang
---
dts/upstream/src/xtensa/Makefile | 14 ++
1 file changed, 14 insertions(+)
diff --git a/dts/upstream/src/xtensa/Makefile b/dts/upstream/src/xtensa/Makefile
new file mode 100644
Implement various CPU related functions.
I'm actually just using it to get cpu clock frequency.
Signed-off-by: Jiaxun Yang
---
drivers/cpu/Kconfig | 6 +++
drivers/cpu/Makefile | 1 +
drivers/cpu/xtensa_cpu.c | 117 +++
3 files changed,
Add xtensa semihosting driver.
It can't use regular semihosting driver as Xtensa's has it's own
semihosting ABI.
Signed-off-by: Jiaxun Yang
---
v2:
- Fix simc_serial_pending implementation
- Get puts work
---
drivers/serial/Kconfig | 18 +-
They are all directly imported from Linux kernel.
Reviewed-by: Max Filippov
Signed-off-by: Jiaxun Yang
---
arch/xtensa/Kconfig | 27 ++
arch/xtensa/include/asm/platform/simcall-gdbio.h | 34 +++
arch/xtensa/include/asm/platform/simcall-iss.h | 73
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