On Mon, 27 May 2024 at 14:17, Quentin Schulz wrote:
>
> Hi Jagan,
>
> On 5/27/24 8:39 AM, Jagan Teki wrote:
> > Add support for USB OTG with UMS to program eMMC.
> >
> > Add it for Edgeble NCM6A, NCM6B.
> >
> > Signed-off-by: Jagan Teki
> > ---
&
Add support for USB OTG with UMS to program eMMC.
Add it for Edgeble NCM6A, NCM6B.
Signed-off-by: Jagan Teki
---
.../dts/rk3588-edgeble-neu6a-io-u-boot.dtsi| 18 ++
.../dts/rk3588-edgeble-neu6b-io-u-boot.dtsi| 18 ++
configs/neu6a-io-rk3588_defconfig
Edgeble NCM6B SoM has built-in eMMC so make sdhci has first boot
priority.
Fix it for NCM6A, NCM6B SoM.
Signed-off-by: Jagan Teki
---
arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 6 +-
arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi | 11 ++-
2 files changed, 7 insertions
On Mon, Feb 26, 2024 at 3:56 PM Dmitry Dunaev wrote:
>
> Added support for the Puya Semiconductor chips.
>
> The datasheet can be found here:
> https://www.puyasemi.com/h_xilie715.html
>
> Signed-off-by: Dmitry Dunaev
> ---
Applied to u-boot-spi/master
On Fri, May 24, 2024 at 8:56 PM Tom Rini wrote:
>
> On Fri, May 24, 2024 at 04:09:00PM +0200, Michal Simek wrote:
> >
> >
> > On 5/7/24 17:48, Tom Rini wrote:
> > > On Tue, May 07, 2024 at 04:15:14AM +, Abbarapu, Venkatesh wrote:
> > >
> > > > + Tom Rini
> > > >
> > > > Do you have any
On Mon, Feb 26, 2024 at 3:56 PM Dmitry Dunaev wrote:
>
> Added support for the Puya Semiconductor chips.
>
> The datasheet can be found here:
> https://www.puyasemi.com/h_xilie715.html
>
> Signed-off-by: Dmitry Dunaev
> ---
Reviewed-by: Jagan Teki
On Mon, Mar 4, 2024 at 9:46 PM Marek Vasut wrote:
>
> Some Winbond SPI NORs have special SR3 register which is
> used among other things to control whether non-standard
> "Individual Block/Sector Write Protection" (WPS bit)
> locking scheme is activated. This non-standard locking
> scheme is not
Hi Anatolij,
On Mon, Feb 19, 2024 at 5:19 PM Jagan Teki wrote:
>
> Hi Anatolij,
>
> On Wed, Jan 17, 2024 at 1:22 PM Jagan Teki wrote:
> >
> > From: Jagan Teki
> >
> > Unlike RK3399, Sunxi/Meson DW HDMI the new Rockchip SoC Rk3328 would
> > sup
Hi Jonas,
On Mon, Feb 19, 2024 at 10:51 PM Jonas Karlman wrote:
>
> Hi Jagan,
>
> On 2024-01-17 08:51, Jagan Teki wrote:
> > Model: Firefly roc-rk3328-cc
> > DRAM: 1 GiB (effective 1022 MiB)
> > Video device 'vop@ff37' cannot allocate frame buffer memory -en
Hi Anatolij,
On Wed, Jan 17, 2024 at 1:22 PM Jagan Teki wrote:
>
> From: Jagan Teki
>
> Unlike RK3399, Sunxi/Meson DW HDMI the new Rockchip SoC Rk3328 would
> support external vendor PHY with DW HDMI chip.
>
> Support this vendor PHY by adding new platform PHY ops via DW H
On Tue, Jan 30, 2024 at 10:15 AM Venkatesh Yadav Abbarapu
wrote:
>
> From: Ashok Reddy Soma
>
> Read chipselect properties from DT which are populated using 'reg'
> property and save it in plat->cs[] array for later use.
>
> Also read multi chipselect capability which is used for
>
Hi Tom,
Please pull this PR.
Summary:
- Support Infineon S28HS02GT (Takahiro)
CI:
- https://source.denx.de/u-boot/custodians/u-boot-spi/-/pipelines/19467
thanks,
Jagan.
The following changes since commit 526a865fe4fea59fb2638726c26e39557eb97fdd:
Merge branch 'master-cleanup' of
On Sun, Jan 28, 2024 at 9:25 PM Marek Vasut
wrote:
>
> From: Hai Pham
>
> Support RPC SPI on R8A779H0 V4M SoC.
>
> Reviewed-by: Paul Barker
> Signed-off-by: Hai Pham
> ---
> Cc: Jagan Teki
> Cc: Paul Barker
> ---
Reviewed-by: Jagan Teki
On Mon, Jan 29, 2024 at 6:57 PM Marek Vasut wrote:
>
> On 1/29/24 12:52, Jagan Teki wrote:
> > On Sun, Jan 28, 2024 at 9:25 PM Marek Vasut
> > wrote:
> >>
> >> From: Hai Pham
> >>
> >> Support RPC SPI on R8A779H0 V4M SoC.
> >&
On Wed, Dec 6, 2023 at 3:02 PM Tejas Bhumkar
wrote:
>
> A set of patches has been developed to resolve concerns regarding data
> integrity failures in QSPI and OSPI for the Versal, Versal NET, Zynq,
> and ZynqMP platforms.
>
> The series has undergone testing with flashes on the default setup,
>
On Sun, Dec 31, 2023 at 11:27 PM Bhumkar, Tejas Arvind
wrote:
>
> [AMD Official Use Only - General]
>
> Hi Jagan,
>
> > -Original Message-
> > From: Jagan Teki
> > Sent: Wednesday, December 20, 2023 1:00 PM
> > To: Bhumkar, Tejas Arvind
>
Kuwano
> ---
Reviewed-by: Jagan Teki
> Signed-off-by: Takahiro Kuwano
> ---
Reviewed-by: Jagan Teki
25_post_bfpt_fixup()
> into one named s25_s28_post_bfpt_fixup().
>
> In s25_s28_post_bfpt_fixup(), set_4byte() is called to force the device to
> be 4-byte addressing mode. In S28HS02GT datasheet, the B7 opcode is missing
> but it works actually (confirmed).
>
> Signed-off-by: Takahiro Kuwano
> ---
Reviewed-by: Jagan Teki
n s25_setup()
> so we can consolidate s28hx_t_setup() and s25_setup() into one named
> s25_s28_setup().
>
> spi_nor_wait_till_ready() at the beginning of s28hx_t_setup() can be
> removed since there is no op that makes device busy state before setup.
>
> Signed-off-by: Takahiro Kuwano
> ---
Reviewed-by: Jagan Teki
tion and
> use nor->rdsr_dummy in octal DTR mode.
>
> Signed-off-by: Takahiro Kuwano
> ---
Reviewed-by: Jagan Teki
ncluding S28HS02GT, so
> we need to use CLPEF instead of CLSR.
>
> This change does not affect to S25x02GT which uses spansion_sr_ready() as
> S25Hx-T family also supports CLPEF(0x82) as well as CLSR(0x30).
>
> Signed-off-by: Takahiro Kuwano
> ---
Reviewed-by: Jagan Teki
erface. To support this,
> spansion_read_any_reg() needs to be reworked. Implementation is similar
> to existing read_sr() that already supports Octal DTR mode.
>
> Signed-off-by: Takahiro Kuwano
> ---
Reviewed-by: Jagan Teki
_erase_non_uniform().
>
> Signed-off-by: Takahiro Kuwano
> ---
Reviewed-by: Jagan Teki
rs.
>
> Signed-off-by: Takahiro Kuwano
> ---
Reviewed-by: Jagan Teki
On Tue, Jan 16, 2024 at 11:09 AM Ssunk wrote:
>
> Signed-off-by: Kankan Sun
> ---
Applied to u-boot-spi/master
On Sun, Jan 28, 2024 at 12:08 PM Tejas Bhumkar
wrote:
>
> The current implementation encounters issues when testing data ranging
> from 0 to 8 bytes. This was confirmed through testing with both ISSI
> (IS25WX256) and Micron (MT35XU02G) Flash exclusively in SDR mode.
>
> Upon investigation, it
On Tue, Dec 26, 2023 at 1:28 PM Bruce Suen wrote:
>
> Add Support XTX Technology XT26G01DX, XT26G11DX, XT26Q01DX,
> XT26G02DX, XT26G12DX, XT26Q02DX, XT26G04DX, and
> XT26Q04DX SPI NAND.
>
> These are 3V/1.8V 1G/2G/4Gbit serial SLC NAND flash device with on-die
>
On Wed, Dec 27, 2023 at 9:58 PM Tejas Bhumkar
wrote:
>
> Added support for the ISSI OSPI flash part IS25LX512M.
> Initial testing was performed on the Tenzing-se1 board using
> SDR mode, covering basic erase, write, and readback operations.
>
> Signed-off-by: Tejas Bhumkar
> ---
Applied to
On Sun, Jan 28, 2024 at 9:25 PM Marek Vasut
wrote:
>
> From: Hai Pham
>
> Support RPC SPI on R8A779H0 V4M SoC.
>
> Reviewed-by: Paul Barker
> Signed-off-by: Hai Pham
> ---
> Cc: Jagan Teki
> Cc: Paul Barker
> ---
Applied to u-boot-spi/master
On Thu, Dec 21, 2023 at 3:43 PM Maksim Kiselev wrote:
>
> If even one byte is lost due to Rx FIFO overflow then we will never
> exit the read loop. Because the (priv->rx != priv->rx_end) condition will
> be always true.
>
> Let's check if Rx FIFO overflow occurred and exit the read loop
> in this
Hi Kever,
On Thu, Jan 18, 2024 at 9:09 AM Kever Yang wrote:
>
> Hi Jagan,
>
> Have you check the memory area, does it maybe overlap with other
> area? eg. heap, stack, malloc area and etc.
Start with GD all memory map seems proper before and after relocation.
I did load U-Boot proper of
set
Signed-off-by: Jagan Teki
---
Changes for v3, v2:
- none
configs/roc-cc-rk3328_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
index 4ac3c9403b..4eef9016dc 100644
--- a/configs/roc-cc-rk3328_defconfig
++
Enable video console for Rockchip RK3328.
Signed-off-by: Jagan Teki
---
Changes for v3, v2:
- none
include/configs/evb_rk3328.h| 5 +
include/configs/rk3328_common.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h
index
Enable and set the start address of pre-console buffer for RK3328.
Signed-off-by: Jagan Teki
---
Changes for v3, v2:
- none
arch/arm/mach-rockchip/Kconfig | 1 +
common/Kconfig | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/Kconfig
at call 0021a5c4 (err=-28)
### ERROR ### Please RESET the board ###
Signed-off-by: Jagan Teki
---
Changes for v3, v2:
- none
arch/arm/dts/rk3328-u-boot.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index
From: Jagan Teki
Add support for Rockchip RK3328 VOP.
Require VOP cleanup before handoff to Linux by writing reset values to
WIN registers. Without this Linux VOP trigger page fault as below
[0.752016] Loading compiled-in X.509 certificates
[0.787796
From: Jagan Teki
Add Rockchip RK3328 HDMI Out driver.
Signed-off-by: Jagan Teki
---
Changes for v3:
- drop data
Changes for v2:
- none
drivers/video/rockchip/Makefile | 1 +
drivers/video/rockchip/rk3328_hdmi.c | 126 +++
drivers/video/rockchip/rk_hdmi.h
From: Jagan Teki
Add Rockchip INNO HDMI PHY driver for RK3328.
Reference from linux-next phy-rockchip-inno-hdmi driver.
Signed-off-by: Jagan Teki
---
Changes for v3, v2:
- none
drivers/phy/rockchip/Kconfig | 7 +
drivers/phy/rockchip/Makefile | 1
From: Jagan Teki
Add support to get the hdmiphy clock for RK3328 PCLK_HDMIPHY.
Signed-off-by: Jagan Teki
---
Changes for v3, v2:
- none
drivers/clk/rockchip/clk_rk3328.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3328.c
b/drivers/clk
From: Jagan Teki
VOP get and set clock would needed for VOP drivers.
Add support for it.
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
Changes for v2:
- Add DCLK get rate
.../include/asm/arch-rockchip/cru_rk3328.h| 34 +++
drivers/clk/rockchip/clk_rk3328.c | 88
From: Jagan Teki
Unlike RK3399, RK3288 the Newer Rockchip SoC's like RK3328 have
different offsets for dsp registers.
Group the dsp register set via dsp_regs pointers so that dsp_offset
would point the dsp_regs to access for any changes in the offset value.
Signed-off-by: Jagan Teki
From: Jagan Teki
Unlike RK3399, RK3288 the Newer Rockchip SoC's like RK3328 have
different offsets for win registers.
Group the win register set via win_regs pointers so that win_offset
would point the win_regs to access for any changes in the offset value.
Signed-off-by: Jagan Teki
From: Jagan Teki
Get the regs from priv pointer instead of passing it an argument.
This would simplify the code and better readability.
Signed-off-by: Jagan Teki
---
Changes for v3, v2:
- none
drivers/video/rockchip/rk_vop.c | 8
1 file changed, 4 insertions(+), 4 deletions
From: Jagan Teki
Add support for DW HDMI Setup HPD status.
Signed-off-by: Jagan Teki
---
Changes for v3:
- check hdmi->ops
Changes for v2:
- none
drivers/video/dw_hdmi.c | 3 +++
include/dw_hdmi.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/video/dw_hdmi.c b/driv
From: Jagan Teki
Add support for DW HDMI Read HPD status.
Signed-off-by: Jagan Teki
---
Changes for v3:
- check hdmi->ops
Changes for v2:
- none
drivers/video/dw_hdmi.c | 3 +++
include/dw_hdmi.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/video/dw_hdmi.c b/driv
From: Jagan Teki
HPD detection on some DW HDMIdesigned SoC's would need to read and
setup the HPD status explicitly.
So, extend the HPD detection code by adding the dw_hdmi_detect_hpd
function and move the default detection code caller there.
The new read and setup hdp will integrate the same
From: Jagan Teki
DW HDMI support Vendor PHY like Rockchip RK3328 Inno HDMI PHY.
Extend the vendor phy handling by adding platform phy hooks.
Signed-off-by: Jagan Teki
---
Changes for v3:
- drop data
- assign ops directly
Changes for v2:
- fix meson cfg
drivers/video/dw_hdmi.c
From: Jagan Teki
HDP is a hardware connector event, so detect the same once the
controller and attached PHY initialization are done.
Signed-off-by: Jagan Teki
---
Changes for v3, v2:
- none
drivers/video/rockchip/rk_hdmi.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff
From: Jagan Teki
Unlike RK3399, Sunxi/Meson DW HDMI the new Rockchip SoC Rk3328 would
support external vendor PHY with DW HDMI chip.
Support this vendor PHY by adding new platform PHY ops via DW HDMI
driver and call the respective generic phy from platform driver code.
This series tested
Hi Nikhil,
On Tue, Jul 18, 2023 at 2:27 PM Nikhil M Jain wrote:
>
> This patch series aims at updating SPL splashscreen framework for AM62x.
>
> This patch series depends on
> https://lore.kernel.org/u-boot/20230504225829.2537050-1-...@chromium.org/
>
> This series:
> - Fixes compilation issues
Hi Neil,
On Tue, Dec 19, 2023 at 5:21 PM Jagan Teki wrote:
>
> On Tue, Dec 19, 2023 at 2:34 PM Neil Armstrong
> wrote:
> >
> > On 18/12/2023 20:10, Jagan Teki wrote:
> > > From: Jagan Teki
> > >
> > > DW HDMI support Vendor PHY like Rockchip RK3
Hi Andy,
On Tue, Dec 19, 2023 at 2:17 PM Andy Yan wrote:
>
>
>
> Hi Jaqan，
> 在 2023-12-19 15:42:26，"Jagan Teki" 写道：
> >Hi Andy,
> >
> >On Tue, Dec 19, 2023 at 6:50 AM Andy Yan wrote:
> >>
> >>
> >> Hi Jaqan：
> &g
On Wed, Dec 6, 2023 at 3:02 PM Tejas Bhumkar
wrote:
>
> From: T Karthik Reddy
>
> The spi-nor framework will set up the flash parameters by
> reading the flash id table flags, which include cmd opcodes,
> address width, dummy bytes, and bus width. In case, flash
> supports octal DTR mode and the
On Mon, Dec 18, 2023 at 11:01 PM Maxim Kiselev wrote:
>
> Hello Jagan,
>
> пн, 18 дек. 2023 г. в 14:28, Jagan Teki :
> >
> > On Tue, Oct 17, 2023 at 12:35 PM Maksim Kiselev
> > wrote:
> > >
> > > If even one byte is lost due to Rx FIFO over
On Tue, Dec 19, 2023 at 2:34 PM Neil Armstrong
wrote:
>
> On 18/12/2023 20:10, Jagan Teki wrote:
> > From: Jagan Teki
> >
> > DW HDMI support Vendor PHY like Rockchip RK3328 Inno HDMI PHY.
> >
> > Extend the vendor phy handling by adding platform phy hook
Hi Andy,
On Tue, Dec 19, 2023 at 6:50 AM Andy Yan wrote:
>
>
> Hi Jaqan：
>
> At 2023-12-19 03:11:10, "Jagan Teki" wrote:
> >From: Jagan Teki
> >
> >Add support for Rockchip RK3328 VOP.
> >
> >Require VOP cleanup before handoff to Lin
0 [ + ] rockchip_reset| `-- reset
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
configs/roc-cc-rk3328_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
index 4ac3c9403b..4eef9016dc 100
Enable video console for Rockchip RK3328.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
include/configs/evb_rk3328.h| 5 +
include/configs/rk3328_common.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h
index
Enable and set the start address of pre-console buffer for RK3328.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
arch/arm/mach-rockchip/Kconfig | 1 +
common/Kconfig | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/Kconfig b
at call 0021a5c4 (err=-28)
### ERROR ### Please RESET the board ###
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
arch/arm/dts/rk3328-u-boot.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index a9f2536de2
From: Jagan Teki
Add support for Rockchip RK3328 VOP.
Require VOP cleanup before handoff to Linux by writing reset values to
WIN registers. Without this Linux VOP trigger page fault as below
[0.752016] Loading compiled-in X.509 certificates
[0.787796
From: Jagan Teki
Add Rockchip RK3328 HDMI Out driver.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
drivers/video/rockchip/Makefile | 1 +
drivers/video/rockchip/rk3328_hdmi.c | 131 +++
drivers/video/rockchip/rk_hdmi.h | 3 +
3 files changed, 135
From: Jagan Teki
Add Rockchip INNO HDMI PHY driver for RK3328.
Reference from linux-next phy-rockchip-inno-hdmi driver.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
drivers/phy/rockchip/Kconfig | 7 +
drivers/phy/rockchip/Makefile | 1 +
drivers
From: Jagan Teki
Add support to get the hdmiphy clock for RK3328 PCLK_HDMIPHY.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
drivers/clk/rockchip/clk_rk3328.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3328.c
b/drivers/clk
From: Jagan Teki
VOP get and set clock would needed for VOP drivers.
Add support for it.
Signed-off-by: Jagan Teki
---
Changes for v2:
- Add DCLK get rate
.../include/asm/arch-rockchip/cru_rk3328.h| 34 +++
drivers/clk/rockchip/clk_rk3328.c | 88 ++-
2
From: Jagan Teki
Unlike RK3399, RK3288 the Newer Rockchip SoC's like RK3328 have
different offsets for dsp registers.
Group the dsp register set via dsp_regs pointers so that dsp_offset
would point the dsp_regs to access for any changes in the offset value.
Signed-off-by: Jagan Teki
From: Jagan Teki
Unlike RK3399, RK3288 the Newer Rockchip SoC's like RK3328 have
different offsets for win registers.
Group the win register set via win_regs pointers so that win_offset
would point the win_regs to access for any changes in the offset value.
Signed-off-by: Jagan Teki
From: Jagan Teki
Get the regs from priv pointer instead of passing it an argument.
This would simplify the code and better readability.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
drivers/video/rockchip/rk_vop.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff
From: Jagan Teki
Add support for DW HDMI Setup HPD status.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
drivers/video/dw_hdmi.c | 3 +++
include/dw_hdmi.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/video/dw_hdmi.c b/drivers/video/dw_hdmi.c
index 172e6b45a6
From: Jagan Teki
Add support for DW HDMI Read HPD status.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
drivers/video/dw_hdmi.c | 3 +++
include/dw_hdmi.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/video/dw_hdmi.c b/drivers/video/dw_hdmi.c
index 0a597206f0
From: Jagan Teki
HPD detection on some DW HDMIdesigned SoC's would need to read and
setup the HPD status explicitly.
So, extend the HPD detection code by adding the dw_hdmi_detect_hpd
function and move the default detection code caller there.
The new read and setup hdp will integrate the same
From: Jagan Teki
DW HDMI support Vendor PHY like Rockchip RK3328 Inno HDMI PHY.
Extend the vendor phy handling by adding platform phy hooks.
Signed-off-by: Jagan Teki
---
Changes for v2:
- fix meson cfg
drivers/video/dw_hdmi.c | 29 +++-
drivers/video
From: Jagan Teki
HDP is a hardware connector event, so detect the same once the
controller and attached PHY initialization are done.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
drivers/video/rockchip/rk_hdmi.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
From: Jagan Teki
Unlike RK3399, Sunxi/Meson DW HDMI the new Rockchip SoC Rk3328 would
support external vendor PHY with DW HDMI chip.
Support this vendor PHY by adding new platform PHY ops via DW HDMI
driver and call the respective generic phy from platform driver code.
This series tested
On Mon, Dec 18, 2023 at 7:23 PM Robin Murphy wrote:
>
> On 2023-12-15 7:13 am, Kever Yang wrote:
> > Hi Jagan,
> >
> > On 2023/12/15 14:36, Jagan Teki wrote:
> >> Hi Heiko/Kerver/Anatoloj,
> >>
> >> On Mon, Dec 11, 2023 at 2:30 PM Jagan Teki
&g
Please don't top-post.
On Sun, Dec 17, 2023 at 4:15 AM Johan Jonker wrote:
>
> Hi Jagan,
>
> In your patch U-boot users must add a new file for each new Rockchip SoC.
>
> With the VOP2 introduction the VOP1 structures and functions are
> frozen/stabilized.
>
> My proposal would be to use a
On Wed, Oct 25, 2023 at 1:20 PM Kunihiko Hayashi
wrote:
>
> Currently the controller driver has maximum frequency in plat->frequency
> that is specified by "spi-max-frequency" DT property in the controller
> node. This is special to U-Boot and doesn't exist to Linux.
>
> spi {
>
On Mon, Dec 4, 2023 at 2:23 PM Venkatesh Yadav Abbarapu
wrote:
>
> Add support for ISSI 256MB flash IS25LP02G. This part supports 4byte
> opcodes. It also supports dual and quad read.
>
> Signed-off-by: Sreekanth Sunnam
> Signed-off-by: Venkatesh Yadav Abbarapu
> ---
> Changes in v2:
> - Fixed
On Mon, Nov 6, 2023 at 10:55 AM Venkatesh Yadav Abbarapu
wrote:
>
> Updating the block protection flags for Gigadevice gd25lx256e and
> ISSI is25wx256 OSPI flash parts.
>
> Signed-off-by: Venkatesh Yadav Abbarapu
> ---
Applied to u-boot-spi/master
On Thu, Dec 14, 2023 at 10:06 PM Tejas Bhumkar
wrote:
>
> Added support for Macronix OSPI flash parts MX25UM51345G
> and MX66UM2G45G, with initial testing conducted on the
> Tenzing-se1 board using STR mode for basic erase, write,
> and readback operations.
>
> Signed-off-by: Tejas Bhumkar
> ---
On Thu, Oct 19, 2023 at 8:51 AM Bruce Suen wrote:
>
> Add Support XTX Technology XT26G01DX, XT26G11DX, XT26Q01DX,
> XT26G02DX, XT26G12DX, XT26Q02DX, XT26G04DX, and
> XT26Q04DX SPI NAND.
>
> These are 3V/1.8V 1G/2G/4Gbit serial SLC NAND flash device with on-die
>
On Tue, Oct 17, 2023 at 12:35 PM Maksim Kiselev wrote:
>
> If even one byte is lost due to Rx FIFO overflow then we will never
> exit the read loop. Because the (priv->rx != priv->rx_end) condition will
> be always true.
>
> Let's check if Rx FIFO overflow occurred and exit the read loop
> in
On Fri, Oct 27, 2023 at 9:22 PM Stanislav Bolshakov
wrote:
>
> In accordance with the name of the function 'flash_is_unlocked()',
> it is implied that the return value will be either 'true' or 'false'.
> Moreover, calling this function from other parts of the program is
> based precisely on this
Hi Tom,
Please pull this PR for next.
Summary:
- spi_nor_read_sfdp_dma_unsafe (Vaishnav)
- w25q01/02 (Jim)
CI:
https://source.denx.de/u-boot/custodians/u-boot-spi/-/pipelines/18995
thanks,
Jagan.
The following changes since commit 2f0282922b2c458eea7f85c500a948a587437b63:
Prepare
Hi Heiko/Kerver/Anatoloj,
On Mon, Dec 11, 2023 at 2:30 PM Jagan Teki wrote:
>
> Unlike RK3399, Sunxi/Meson DW HDMI the new Rockchip SoC Rk3328 would
> support external vendor PHY with DW HDMI chip.
>
> Support this vendor PHY by adding new platform PHY ops via DW HDMI
&g
On Mon, Oct 30, 2023 at 9:50 PM Jan Kiszka wrote:
>
> From: Jan Kiszka
>
> We are not iterating CQSPI_REG_RETRY, we are waiting 'timeout' ms, since
> day 1.
>
> Signed-off-by: Jan Kiszka
> ---
Applied to u-boot-spi/master
On Wed, Oct 18, 2023 at 9:08 AM Bruce Suen wrote:
>
> Add support for XTX XT55Q02G(1.8V,2Gbit).
>
> Signed-off-by: Bruce Suen
> ---
Applied to u-boot-spi/master
On Wed, Oct 18, 2023 at 12:59 AM Igor Prusov wrote:
>
> Adaptation of Linux commit d74c36480a67
>
> This patch adds support for ESMT F50L1G41LB and F50D1G41LB.
> It seems that ESMT likes to use random JEDEC ID from other vendors.
> Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses
On Fri, Aug 4, 2023 at 7:56 AM Jit Loon Lim wrote:
>
> From: Teik Heng Chong
>
> Add Support for GigaDevice GD55LB02GEBIR SPI NOR flash as QSPI
> configuration flash
>
> Signed-off-by: Teik Heng Chong
> ---
Applied to u-boot-spi/master
On Fri, Aug 4, 2023 at 7:57 AM Jit Loon Lim wrote:
>
> MT25QU01 OPN with 4B OPCODE support is currently not supported in
> source code and the driver reuses the definition for "n25q00a"
> which has the same silicon ID but is a slower part.
>
> Adding mt25u01g definition to the source code to
On Sat, Aug 5, 2023 at 2:05 AM wrote:
>
> From: Godfrey Mwangi
>
> Add Micron MT25QU128AB flash.
>
> Signed-off-by: Godfrey Mwangi
> ---
Applied u-boot-spi/master
On Tue, Sep 12, 2023 at 3:20 PM Udit Kumar wrote:
>
> Currently spi driver gets flash parameter from first subnode.
>
> Few boards have more than one flash with different parameters
> and selection of flash is done by on board switch settings.
> In such case, uboot needs to be recompiled with
On Tue, Sep 26, 2023 at 2:40 PM Jim Liu wrote:
>
> add flash w25q01jv, w25q01jvfim and w25q02jv support
>
> Signed-off-by: Jim Liu
> ---
Applied to u-boot-spi/master
Hi Simon,
On Thu, Dec 14, 2023 at 1:21 AM Simon Glass wrote:
>
> Hi Jagan,
>
> On Mon, 11 Dec 2023 at 02:00, Jagan Teki wrote:
> >
> > From: Jagan Teki
> >
> > DW HDMI support Vendor PHY like Rockchip RK3328 Inno HDMI PHY.
> >
> > Extend the
On Wed, Dec 13, 2023 at 9:19 PM Michal Simek wrote:
>
>
>
> On 12/4/23 09:52, Venkatesh Yadav Abbarapu wrote:
> > Add support for ISSI 256MB flash IS25LP02G. This part supports 4byte
> > opcodes. It also supports dual and quad read.
> >
> > Signed-off-by: Sreekanth Sunnam
> > Signed-off-by:
On Tue, Dec 12, 2023 at 7:34 PM Tom Rini wrote:
>
> On Sun, Jul 10, 2022 at 11:07:41AM +0530, Jagan Teki wrote:
> > On Fri, Jun 3, 2022 at 12:31 PM Vaishnav Achath wrote:
> > >
> > > During SFDP header parse and BFPT parse, structures in stack are used
> > &g
On Mon, Dec 11, 2023 at 2:38 PM Neil Armstrong
wrote:
>
> On 11/12/2023 09:59, Jagan Teki wrote:
> > From: Jagan Teki
> >
> > DW HDMI support Vendor PHY like Rockchip RK3328 Inno HDMI PHY.
> >
> > Extend the vendor phy handling by adding platform phy hook
0 [ + ] rockchip_reset| `-- reset
Signed-off-by: Jagan Teki
---
configs/roc-cc-rk3328_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
index 4ac3c9403b..4eef9016dc 100644
--- a/configs/roc
Enable video console for Rockchip RK3328.
Signed-off-by: Jagan Teki
---
include/configs/evb_rk3328.h| 5 +
include/configs/rk3328_common.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h
index d10e5b1d2e..c985080f7b
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