On 2023/2/16 07:49, Jonas Karlman wrote:
The cpuid on RK3568 is located at 0xa instead of 0x7 as all other SoCs.
Add and use a CFG_CPUID_OFFSET to define this offset.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk356x-u-boot.dtsi | 12
On 2023/2/16 07:49, Jonas Karlman wrote:
Set eth1addr when there is an ethernet1 alias in the fdt.
Also allow fdt fixup of ethernet mac addresses when CMD_NET is disabled.
Set ethaddr and eth1addr based on HASH and SHA256 options.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
On 2023/2/16 07:49, Jonas Karlman wrote:
Add support for rk3036 compatible.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip-efuse.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/misc
On 2023/2/16 07:48, Jonas Karlman wrote:
Add support for rk3128 compatible.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip-efuse.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/misc
On 2023/2/16 07:48, Jonas Karlman wrote:
Add support for rk3328 compatible.
Signed-off-by: Jonas Karlman
---
drivers/misc/rockchip-efuse.c | 45 +++
Reviewed-by: Kever Yang
Thanks,
- Kever
1 file changed, 45 insertions(+)
diff --git a/drivers/misc
On 2023/2/16 07:48, Jonas Karlman wrote:
Add support for rk3066a, rk3188, rk322x and rk3288 compatible.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/Kconfig | 4 ---
drivers/misc/rockchip-efuse.c | 68
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip-efuse.c | 160 ++
1 file changed, 85 insertions(+), 75 deletions(-)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 083ee65e0ad7..864c9c15bbe5 100644
--- a/drivers/misc
On 2023/2/16 07:48, Jonas Karlman wrote:
Add a simple debug command to dump the content of the otp.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip-otp.c | 35 +++
1 file changed, 35 insertions(+)
diff
On 2023/2/16 07:48, Jonas Karlman wrote:
Add support for rk3568 compatible.
Handle allocation of an aligned bounce buffer in main read op in order
to keep the SoC unique read op simple.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip
On 2023/2/16 07:48, Jonas Karlman wrote:
Add support for rk3588 compatible.
Adjust offset using driver data in main read op.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip-otp.c | 63 +
1 file changed
read op.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip-otp.c | 83 +++--
1 file changed, 43 insertions(+), 40 deletions(-)
diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index
Hi John,
I have pick below patch for gpio bank support, which is the same
logic in kernel and other SoCs.
https://patchwork.ozlabs.org/project/uboot/patch/20230213222742.135093-2-macroalph...@gmail.com/
Thanks,
- Kever
On 2023/1/18 02:15, John Keeping wrote:
Upstream device trees now
Hi Chris,
For this patch, I have pick below patch instead:
https://patchwork.ozlabs.org/project/uboot/patch/20230217115845.75303-11-ja...@amarulasolutions.com/
For those change other than pinctrl-rk3568.c, please send a new
patch is still available.
Thanks,
- Kever
On 2023/2/14 06
Hi Eugen,
The board dts is suppose to sync from kernel, so kernel commit message
will needed.
eg. Sync from kernel v6.2-rc1 or commit number in mainline kernel.
Thanks,
- Kever
On 2023/2/16 21:29, Eugen Hristev wrote:
ROCK 5B is a Rockchip RK3588 based SBC (Single Board Computer) by Radxa
.
Page address(PA) bytes are moved to the last 4 positions before
ECC. Update the description for U-boot.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/rockchip_nfc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a
On 2023/2/18 23:27, Johan Jonker wrote:
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so use dev_read_addr_ptr in the rockchip-saradc.c file.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
depending on CONFIG_PHYS_64BIT setting and fix ARRAY_SIZE
divider.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changed V4:
Fix cast and divider in syscon-uclass.c
---
drivers/core/regmap.c | 2 +-
drivers/core/syscon-uclass.c| 4 ++--
drivers
On 2023/1/25 03:31, Jagan Teki wrote:
The board should be RV1126-NEU2 instead RV1126-ECM0.
Fix the wrong name.
Fixes: b8f1ca954013 ("board: rockchip: Add Edgeble Neu2 IO Board")
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
board/edgeble/neural-comput
GPIO controller.
Signed-off-by: Peter Geis
Signed-off-by: Chris Morgan
With FUKAUMI Naoki's comment apply:
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/include/asm/arch-rockchip/gpio.h | 38 ++
drivers/gpio/rk_gpio.c| 49 +-
drivers/pinctrl/roc
On 2023/2/14 06:27, Chris Morgan wrote:
From: Chris Morgan
Update the MAINTAINERS file to include the devicetree for the
rk3568-evb1-v10 board.
Also update Rockchip board docs to include information on building
RK3568 based devices.
Signed-off-by: Chris Morgan
---
board/rockchip/evb_rk35
On 2023/2/14 06:27, Chris Morgan wrote:
From: Chris Morgan
Add gpio-ranges property to GPIO nodes so that the bank ID can
be correctly derived for each GPIO bank.
Signed-off-by: Chris Morgan
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk356x.dtsi | 5 +
1 file
his update.
Reviewed-by: Kever Yang
Thanks,
- Kever
Regards,
Jonas
+ [BROM_BOOTSOURCE_SPINOR] = "/spi@fe30/flash@0",
+ [BROM_BOOTSOURCE_SD] = "/mmc@fe2b",
+};
+
struct mm_region *mem_map = rk3568_mem_map;
void board_debug_uart_init(void)
("rockchip: add px30 devicetrees")
Signed-off-by: Chris Morgan
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/px30.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index bfa3580429..3152bf107d 100644
--- a/arch/arm/dts/px3
ned-off-by: Chris Morgan
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/gpio/rk_gpio.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index 68f30157a9..98a79b5f4d 100644
--- a/drivers/gpio/rk_gpio.c
+++
Morgan
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/mach-rockchip/rk3568/rk3568.c | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c
b/arch/arm/mach-rockchip/rk3568/rk3568.c
index a2d59abc26..4a08820a09 100644
--- a
tree.
For others:
Reviewed-by: Kever Yang
Thanks,
- Kever
Regards,
Jonas
Signed-off-by: Chris Morgan
---
arch/arm/dts/Makefile | 2 +-
arch/arm/dts/rk3568-evb.dts | 79 --
...-boot.dtsi => rk3568-evb1-v10-u-boot.dtsi} | 0
arch/arm/dt
: serial@feb5
Err: serial@feb5
Model: Edgeble Neu6A IO Board
Net: No ethernet found.
Hit any key to stop autoboot: 0
=>
Add support for Edgeble Neu6 Model A IO Board.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
.../dts/rk3588-edgeble-neu6a-i
On 2023/1/30 22:57, Jagan Teki wrote:
Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RK3588 SoC to boot the SPL.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3588-u-boot.dtsi | 7 +
arch/arm/dts/rk3588s-u
: Kever Yang
Thanks,
- Kever
---
include/configs/rk3328_common.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index fadcb93a5f..24b21c024d 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs
proof for changes increasing the SPL size.
Signed-off-by: Wadim Egorov
Signed-off-by: Samuel Holland
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes in v3:
- New patch for v3
configs/phycore-rk3288_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/phycore
On 2022/10/18 03:02, Christian Kohlschütter wrote:
Provide human-readable manufacturer and product names for the
FriendlyELEC NanoPi R4S.
Enable CONFIG_SYSINFO and CONFIG_SYSINFO_SMBIOS by default.
Signed-off-by: Christian Kohlschütter
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch
Hi Christoph,
The SPL_OPTEE_IMAGE is suppose to use like ATF for armv7:
TPL->SPL->BL31/ATF/OPTEE->U-Boot.
But not for OPTEE use as a BL32 after BL31.
BL31 and U-Boot is package as a itb file, so it's easy to add a
BL32, but you may need to
study how BL31 get entry to BL32 an
Hi Jagan,
On 2023/2/17 05:44, Jonas Karlman wrote:
+ prate = priv->cpll_hz;
Should be gpll_hz instead of cpll_hz.
Do you have new patchset for this series, I will fix this if there is no
new version for other patches.
Thanks,
- Kever
, 98mA)
Logitech USB Receiver
Co-developed-by: Suniel Mahesh
Signed-off-by: Suniel Mahesh
Signed-off-by: Manoj Sai
Reviewed-by: Kever Yang
Thanks,
- Kever
---
configs/radxa-cm3-io-rk3566_defconfig | 11 +++
1 file changed, 11 insertions(+)
diff --git a/configs/radxa-cm3-io-rk3566_defcon
On 2023/2/17 19:58, Jagan Teki wrote:
From: Manoj Sai
Select the DM_REGULATOR_FIXED on RK3568 platform.
Co-developed-by: Suniel Mahesh
Signed-off-by: Suniel Mahesh
Signed-off-by: Manoj Sai
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/mach-rockchip/Kconfig | 1 +
1 file
On 2023/2/17 19:58, Jagan Teki wrote:
From: Jagan Teki
Add driver supporting pin multiplexing on rk3568 platform.
Co-developed-by: Manoj Sai
Signed-off-by: Manoj Sai
Co-developed-by: Jianqun Xu
Signed-off-by: Jianqun Xu
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks
no real requirement for them in U-Boot to handle, hence
mark them as deleted-properties for the probe to success
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk356x-u-boot.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/rk3
ned-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/phy/rockchip/Kconfig | 7 +
drivers/phy/rockchip/Makefile | 1 +
.../rockchip/phy-rockchip-naneng-combphy.c| 441 ++
3 files changed, 449 insertions(+)
create
Jianing
Signed-off-by: Ren Jianing
Co-developed-by: Jagan Teki
Signed-off-by: Jagan Teki
Signed-off-by: Manoj Sai
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 54 +++
1 file changed, 54 insertions(+)
diff --git a/drivers/phy
that case.
Derived and adjusted the similar change from linux-next with below
commit <9c19c531dc98> ("phy: phy-rockchip-inno-usb2: support
#address_cells = 2")
Co-developed-by: Manoj Sai
Signed-off-by: Manoj Sai
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
CM3")
Add support for Radxa CM3 IO Board.
Co-developed-by: FUKAUMI Naoki
Signed-off-by: FUKAUMI Naoki
Co-developed-by: Manoj Sai
Signed-off-by: Manoj Sai
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/
On 2023/2/17 19:58, Jagan Teki wrote:
Like other rockchip SoCs, DM_RESET is useful across rk3568
platform.
Select it from arch kconfig.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/mach-rockchip/Kconfig | 1 +
configs/evb-rk3568_defconfig | 1 -
2
.
Neu6 needs to mount on top of this IO board in order to create a
complete Edgeble Neural Compute Module 6(Neu6) IO platform.
commit ("arm64: dts: rockchip: rk3588: Add Edgeble Neu6
Model A IO")
Add support for Edgeble Neu6 Model A IO Board.
Signed-off-by: Jagan Teki
Reviewed-by:
Neu6 Model A SoM.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3588-edgeble-neu6a.dtsi | 32 ++
1 file changed, 32 insertions(+)
create mode 100644 arch/arm/dts/rk3588-edgeble-neu6a.dtsi
diff --git a/arch/arm/dts/rk3588-edgeble-ne
(+2KiB)
rk3568: 60KiB (-16KiB)
This makes it possible to use latest vendor TPL on RK3328 without
getting a size limit error running the mkimage command.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v4:
- Only change limit for rk3328 and rk3568
v3:
- Sync with
less peripherals) of the former.
commit <9fb232e9911f> (" arm64: dts: rockchip: Add base DT for rk3588
SoC")
commit ("arm64: dts: rockchip: Add rk3588 pinctrl data")
Signed-off-by: Jianqun Xu
Signed-off-by: Kever Yang
Signed-off-by: Jagan Teki
Reviewed-by: Ke
Hi Jagan,
On 2023/1/30 22:57, Jagan Teki wrote:
The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76
and quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU,
Mali-G610 MP4, HDMI Out, HDMI In, DP, eDP, MIPI DSI, MIPI CSI2,
LPDDR4/4X/5, eMMC5.1, SD3.0/MMC4.5, USB OTG 3.0, Type-C, US
Hi Jagan,
I will leave patch 12, 13, 18 before they got a kernel link, and
pick other rk3588 support in this release.
Thanks,
- Kever
On 2023/1/30 22:57, Jagan Teki wrote:
Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RK3588 from Edgeble AI.
Gener
On 2023/1/30 22:57, Jagan Teki wrote:
Add IOC unit header include for rk3588.
Signed-off-by: Steven Liu
Signed-off-by: Joseph Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
.../include/asm/arch-rockchip/ioc_rk3588.h| 101 ++
1 file
On 2023/1/30 22:57, Jagan Teki wrote:
Add reset ID defines for rk3588.
commit <0a8eb7dae617> ("dt-bindings: reset: add rk3588 reset
definitions")
Signed-off-by: Sebastian Reichel
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
.../dt-binding
On 2023/1/30 22:57, Jagan Teki wrote:
Add power-domain header for RK3588 SoC from description in TRM.
commit <67944950c2d0> ("dt-bindings: power: add power-domain header for
rk3588")
Signed-off-by: Finley Xiao
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
On 2023/1/30 22:57, Jagan Teki wrote:
Add ddr driver for rk3588 to get the ram capacity.
Co-developed-by: Jonas Karlman
Signed-off-by: Jonas Karlman
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/ram/rockchip/Makefile | 1 +
drivers/ram/rockchip
On 2023/1/30 22:57, Jagan Teki wrote:
Add clock driver support for Rockchip RK3588 SoC.
Signed-off-by: Elaine Zhang
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/clk/rockchip/Makefile |1 +
drivers/clk/rockchip/clk_rk3588.c | 1996
On 2023/1/30 22:57, Jagan Teki wrote:
Add RK3588 pll set and get rate clock support.
Signed-off-by: Elaine Zhang
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/include/asm/arch-rockchip/clock.h | 24 ++
drivers/clk/rockchip/clk_pll.c | 267
ings/clock/rockchip,rk3588-cru.h | 766 ++
Reviewed-by: Kever Yang
Thanks,
- Kever
1 file changed, 766 insertions(+)
create mode 100644 include/dt-bindings/clock/rockchip,rk3588-cru.h
diff --git a/include/dt-bindings/clock/rockchip,rk3588-cru.h
b/include/dt-bindings/cloc
On 2023/1/30 22:57, Jagan Teki wrote:
Add GRF header for Rockchip RK3588.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
.../include/asm/arch-rockchip/grf_rk3588.h| 35 +++
1 file changed, 35 insertions(+)
create mode 100644 arch/arm
On 2023/1/30 22:57, Jagan Teki wrote:
Add clock and reset unit header include for rk3588.
Signed-off-by: Elaine Zhang
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
.../include/asm/arch-rockchip/cru_rk3588.h| 451 ++
1 file changed, 451
On 2023/1/30 22:57, Jagan Teki wrote:
Add support for rk3588 package header in mkimage tool.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 1f1eaa1675
ar
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes in v2:
- Add MAINTAINER for the board
---
arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi | 17 ++
arch/arm/dts/rk3308-rock-pi-s.dts | 228 ++
board/rockchip/evb_rk3308/MAINTAINERS | 7 +
c
, MIPI DSI/CSI
- USB 3.0 Host/OTG, USB 2.0 Host
- 40-pin GPIO expansion ports
- USB Type C PD 2.0, 9V/2A, 12V/2A, 15V/2A, 20V/2A
Refer Linux commit <22a442e6586c>
("arm64: dts: rockchip: add basic dts for the radxa rock3 model a")
Signed-off-by: Akash Gajjar
Reviewed-by: Kev
Hi Jonas,
On 2023/2/14 18:33, Jonas Karlman wrote:
Sync init size limit from vendor u-boot and the SRAM size specified in a
SoCs TRM. Size is typically defined using the following expression:
-
Although most of SoC follow this rule, but not for all.
So please just do the sync from vendor u-
On 2023/2/14 18:33, Jonas Karlman wrote:
An external TPL binary is now expected to be provided using ROCKCHIP_TPL
when building RK3568 targets.
This reverts commit 31500e7bcfaca08ab7c2879f502a6cf852410244.
Signed-off-by: Jonas Karlman
Reviewed-by: Simon Glass
Reviewed-by: Kever Yang
image for RK3568.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- rename external-tpl-path to rockchip-tpl-path
- rename EXTERNAL_TPL to ROCKCHIP_TPL
- add CONFIG_ROCKCHIP_EXTERNAL_TPL option
Makefile | 1 +
arch/arm/dts/rockchip-u
On 2023/2/14 18:33, Jonas Karlman wrote:
The rockchip-tpl entry can be used when an external TPL binary should be
used instead of the normal U-Boot TPL.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- rename external-tpl to rockchip-tpl
- missing message
On 2023/2/7 22:54, Johan Jonker wrote:
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so convert dev_read_addr output to phys_addr_t in the
rockchip_nfc.c file.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
On 2023/2/7 22:56, Johan Jonker wrote:
Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write
size and 40 bit ecc support
Signed-off-by: Paweł Jarosz
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/nand_ids.c | 3
On 2023/2/7 22:55, Johan Jonker wrote:
Add flash_node to the rockchip_nfc driver chip stucture in order
to find the partitions in the add_mtd_partitions_of() functions.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/rockchip_nfc.c | 1 +
1
functions.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/rockchip_nfc.c | 61 ++---
1 file changed, 20 insertions(+), 41 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c
b/drivers/mtd/nand/raw/rockchip_nfc.c
driver.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/rockchip_nfc.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c
b/drivers/mtd/nand/raw/rockchip_nfc.c
index 78e2a691..3809702e 100644
--- a/
On 2023/2/7 22:53, Johan Jonker wrote:
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so convert dev_read_addr output to phys_addr_t in the
dw-apb-timer.c file.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
On 2023/2/7 22:53, Johan Jonker wrote:
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so convert dev_read_addr output to phys_addr_t in the
rockchip-saradc.c file.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
: Kever Yang
Thanks,
- Kever
---
drivers/core/regmap.c | 2 +-
drivers/core/syscon-uclass.c| 2 +-
drivers/ram/rockchip/sdram_rk3066.c | 2 +-
drivers/ram/rockchip/sdram_rk3188.c | 2 +-
drivers/ram/rockchip/sdram_rk322x.c | 2 +-
drivers/ram/rockchip/sdram_rk3288.c | 2
On 2023/2/7 22:52, Johan Jonker wrote:
When fdt_addr_t and phys_addr_t are split it turns out that
the header don't match the functions, so fix the headers.
Signed-off-by: Johan Jonker
Reviewed-by: Simon Glass
Reviewed-by: Kever Yang
Thanks,
- Kever
---
include/dm/ofnode.h
These partitions synced from Linux end up with
the wrong offset and sizes when only the lower 32-bit is passed.
Decouple the fdt_addr_t and phys_addr_t size as they don't necessary
match.
Signed-off-by: Johan Jonker
Reviewed-by: Simon Glass
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Hi Jonas,
On 2023/2/6 20:51, Jonas Karlman wrote:
Hi Quentin,
On 2023-02-06 12:26, Quentin Schulz wrote:
Hi Jonas,
On 2/5/23 21:21, Jonas Karlman wrote:
Rockchip SoCs typically use U-Boot TPL to initialize DRAM, then jumps
back to boot-rom to load the next stage of the boot flow, U-Boot SPL.
On 2023/2/9 00:06, Quentin Schulz wrote:
Hi Kever,
On 2/8/23 16:41, Kever Yang wrote:
Hi Quentin,
On 2023/2/6 19:26, Quentin Schulz wrote:
Hi Jonas,
On 2/5/23 21:21, Jonas Karlman wrote:
Rockchip SoCs typically use U-Boot TPL to initialize DRAM, then jumps
back to boot-rom to load the
Hi Akash,
Please add MAINTAINER for the board.
Other parts looks good to me.
Thanks,
- Kever
On 2023/2/13 22:39, Akash Gajjar wrote:
Add Radxa ROCK 3 Model A support. sync rk3568-rock-3a.dts from Linux 6.2.0-rc7
Board Specifications
- Rockchip RK3568
- 2/4/8GB LPDDR4 3200MT/s
- eMM
Hi Akash,
You will need to add MAINTAINER for this board.
other parts looks good to me.
Thanks,
- Kever
On 2023/2/14 00:11, Akash Gajjar wrote:
Add Radxa ROCK 3 Model A support. sync rk3308-rock-pi-s.dts from
Linux 6.2.0-rc7.
ROCK Pi S is RK3308 based SBC from radxa.com. ROCK Pi S
quot;)
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3328-sdram-ddr3-666.dtsi| 10 ++
arch/arm/dts/rk3328-sdram-ddr4-666.dtsi| 10 ++
arch/arm/dts/rk3328-sdram-lpddr3-1600.dtsi | 10 ++
arch/arm/dts/rk3328-sdram-l
Hi Quentin,
On 2023/2/6 19:26, Quentin Schulz wrote:
Hi Jonas,
On 2/5/23 21:21, Jonas Karlman wrote:
Rockchip SoCs typically use U-Boot TPL to initialize DRAM, then jumps
back to boot-rom to load the next stage of the boot flow, U-Boot SPL.
For RK356x there is currently no support to initiali
On 2023/2/8 01:27, Jonas Karlman wrote:
Add a second dram bank of usable memory beyond the blob of space for
peripheral near 4GB. Any memory that exists beyond the 4GB mark is added
to the second bank.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- Change
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- No change
arch/arm/include/asm/arch-rockchip/sdram.h | 28 +++---
arch/arm/mach-rockchip/sdram.c | 9 +--
2 files changed, 26 insertions(+), 11 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/sdram.h
Hi Tom,
On 2023/1/31 05:05, Tom Rini wrote:
Hey all,
So, I've gotten back on regular schedule and here is -rc1, on time. I've
picked up a Rockchip revert, which should fix some problems but I
suspect will break some other platforms. I look forward to Kever having
a chance to address the issue
Hi
I think I do this modify for those soc not have TPL, or else it
will cause the CI build error.
TPL/ddr binary is mandatory in all rockchip SoCs now, but the mainline
U-Boot may not
able to provide the the available TPL, will need ddr init binary from
rockchip rkbin repository
ins
Hi Jonas,
On 2023/1/29 17:58, Jonas Karlman wrote:
Hi Kever,
On 2023-01-29 10:47, Kever Yang wrote:
Hi Jonas, Jagan,
On 2023/1/26 06:47, Jonas Karlman wrote:
Hi Jagan,
On 2023-01-25 23:27, Jagan Teki wrote:
This series support Rockchip RK3588. All the device tree files are
synced from
Hi Jonas, Jagan,
On 2023/1/26 06:47, Jonas Karlman wrote:
Hi Jagan,
On 2023-01-25 23:27, Jagan Teki wrote:
This series support Rockchip RK3588. All the device tree files are
synced from linux-next with the proper SHA1 mentioned in the commit
messages.
Unfortunately, the BL31 from rkbin is not
detected while testing each patchset individually and could only be
observed after a merge to master branch.
Fixes: c925be73a0a8 ("rockchip: add support for PX30 Ringneck SoM on Haikou
Devkit")
Cc: Quentin Schulz
Signed-off-by: Quentin Schulz
Reviewed-by: Kever Yang
Thanks,
- Keve
Hi Chris,
On 2023/1/5 23:34, Chris Morgan wrote:
From: Chris Morgan
Enable spl to detect which device it was booted from.
Adapted from Peter Geis's work located here:
https://gitlab.com/pgwipeout/u-boot-quartz64/-/commit/3a10fb6bfbbaa747b425233b1fc08cd008084281
You can add "Signed-off-by "
On 2023/1/5 23:34, Chris Morgan wrote:
From: Chris Morgan
In order to support Rockchip devices with the VOP2, import the VOP2
dt-bindings from Linux.
Signed-off-by: Chris Morgan
Reviewed-by: Kever Yang
Thanks,
- Kever
---
include/dt-bindings/soc/rockchip,vop2.h | 14
Hi Tom,
Please pull the updates for rockchip platform for next:
- Add support for rv1126 soc and rv1126 neu2 io board;
- Add support for rk3399 pine64 pinephone pro board;
- dts sync from linux for rk3399 and px30;
- Add support for PX30 Ringneck SoM board;
CI:
https://source.denx.de/u-boot/custo
On 2023/1/8 10:50, Simon Glass wrote:
Drop the use of scripts and rely on standard boot for all operation.
Signed-off-by: Simon Glass
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes in v2:
- Rebase to -next
include/configs/rk3399_common.h | 5 +
include/configs/rockchip
CM3 IO Board defconfig and -u-boot.dtsi
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi | 18 ++
board/rockchip/evb_rk3568/MAINTAINERS| 5 ++
configs/radxa-cm3-io-rk3566_defconfig| 68
Hi Jagan,
Does this board dts available in mainline kernel, if yes, please
provide where it from.
Thanks,
- Kever
On 2023/1/12 19:00, Jagan Teki wrote:
Radxa Compute Module 3(CM3) IO board an application board from Radxa
and is compatible with Raspberry Pi CM4 IO form factor.
Specific
Raspberry Pi CM4 pinout so it is
possible to mount Radxa CM3 on top of the Rasberry Pi CM4 IO board.
Add support for Radxa CM3.
Co-developed-by: FUKAUMI Naoki
Signed-off-by: FUKAUMI Naoki
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3566-radxa-cm3
On 2023/1/12 19:00, Jagan Teki wrote:
Sync rockchip,vop2.h from linux-next, and the last commit is
commit <604be85547ce> ("drm/rockchip: Add VOP2 driver")
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
include/dt-bindings/soc/rock
ed-off-by: Quentin Schulz
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/mach-rockchip/px30/px30.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/mach-rockchip/px30/px30.c
b/arch/arm/mach-rockchip/px30/px30.c
index 0641e6af0f..35a36700df 100644
--- a/arch/arm/
disable BINMAN_FDT for evb-rk3568 defconfig for now as we are at the
end of the release cycle.
Fixes: 05713d570762 ("rockchip: generate u-boot-rockchip.bin with binman
for ARM64 boards")
Cc: Quentin Schulz
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Chan
17:01, Kever Yang wrote:
Hi Tom,
Please pull the updates for rockchip platform for next:
- Add support for rv1126 soc and rv1126 neu2 io board;
- Add support for rk3399 pine64 pinephone pro board;
- dts sync from linux for rk3399;
Travis:
https://source.denx.de/u-boot/custodians/u-boot-rockchip
On 2023/1/5 03:18, Jagan Teki wrote:
For some newer SoCs like RK3568, the Rockchip has not released
any DDR drivers yet so idbloader needs to create manually using
DDR binaries offered by rkbin. This indeed no requirement to
enable TPL in the U-Boot source code.
If we mark TPL disabled and mar
On 2023/1/5 17:06, Peter Robinson wrote:
Hi Kever,
On Thu, Jan 5, 2023 at 9:02 AM Kever Yang wrote:
Hi Tom,
Please pull the updates for rockchip platform for next:
- Add support for rv1126 soc and rv1126 neu2 io board;
- Add support for rk3399 pine64 pinephone pro board;
- dts sync from
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