Hi Tom,
The following changes since commit 5024a96db8ea6ff2e814f4599af9e5faf09296b7:
Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into
dts/upstream (2024-07-20 11:15:22 -0600)
are available in the Git repository at:
On Thu, Jul 11, 2024 at 12:55:05PM -0700, E Shattow wrote:
> [EXTERNAL MAIL]
>
> Ping. This regression still exists and is now in stable release.
> Should we revert this change or how must it be fixed?
>
> -E
>
Hi all,
I think I could revert this commit for now
if we cannot find the root
On Mon, Jun 24, 2024 at 11:46:58AM +0200, Andreas Schwab wrote:
> Fixes: 44a792c994 ("riscv: sifive: unmatched: migrate to text environment")
> Signed-off-by: Andreas Schwab
> ---
> board/sifive/unmatched/unmatched.env | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Leo
On Wed, Jun 19, 2024 at 05:22:52PM +0200, Heinrich Schuchardt wrote:
> Commit 7400d34ba992 ("riscv: semihosting: replace inline assembly with
> assembly file") reduced the alignment of function smh_trap().
>
> As described in the "RISC-V Semihosting" specification [1] the ssli,
> ebreak, and srai
On Fri, Jun 07, 2024 at 10:41:17AM +0200, Heinrich Schuchardt wrote:
> The firmware invoking main U-Boot uses
>
> * a0 to pass the boot hart
> * a1 to pass a device-tree
>
> Let the bdinfo command print this information, e.g.
>
> boot hart = 0x001b
> firmware fdt=
Hi Tom,
The following changes since commit 46ff00bea5dd2dd247d5e2fdadbf5dcf8653cd9a:
Merge tag 'tpm-master-27052024' of
https://source.denx.de/u-boot/custodians/u-boot-tpm (2024-05-27 08:56:02 -0600)
are available in the Git repository at:
On Wed, May 15, 2024 at 04:04:31PM +0100, Conor Dooley wrote:
> From: Conor Dooley
>
> A given AMP configuration for a board may make either one, or neither
> of, the ethernet ports available to U-Boot. The Icicle's init code will
> fail if mac1 is not present, so move it to the optional
On Wed, May 15, 2024 at 04:04:30PM +0100, Conor Dooley wrote:
> From: Conor Dooley
>
> Node offsets returned by libfdt can contain negative error numbers, so
> the variable type should be "int". As things stand, if the ethernet
> nodes are not found in the early init callback, the if (node < 0)
Hi Tom,
The following changes since commit c8ffd1356d42223cbb8c86280a083cc3c93e6426:
Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"
(2024-05-13 09:15:51 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for
On Mon, May 06, 2024 at 05:10:06PM +0800, Hanyuan Zhao wrote:
> Without the NULL check, if the devicetree that u-boot loads does not have a
> compatible property then a store access fault will be raised and force the
> machine to reset, due to the NULL pointer we passed to strlen. This commit
>
On Tue, May 14, 2024 at 07:51:42AM +0200, Heinrich Schuchardt wrote:
> * We already have a header 'backtrace', there is no need to repeat the
> word backtrace on every line.
> * Add a blank line before the backtrace section of the crash report for
> improved readability.
> * If U-Boot is
On Thu, May 02, 2024 at 08:06:43AM +0200, Lukas Funke wrote:
> [EXTERNAL MAIL]
>
> On 24.04.2024 13:01, Heinrich Schuchardt wrote:
> > On 24.04.24 09:43, lukas.funke-...@weidmueller.com wrote:
> > > From: Lukas Funke
> > >
> > > Rename spl_soc_init() to spl_dram_init() because the generic
Hi Tom,
The following changes since commit ff0de1f0557ed7d2dab47ba976a37347a1fdc432:
Merge patch series "Update PHYTEC SOM Detection" (2024-04-29 10:56:05 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch changes up
On Tue, Apr 16, 2024 at 03:52:38PM +0800, Kongyang Liu wrote:
> Add sysreset driver for cv1800b SoC
>
> Signed-off-by: Kongyang Liu
> ---
>
> drivers/sysreset/Kconfig| 5 +++
> drivers/sysreset/Makefile | 1 +
> drivers/sysreset/sysreset_cv1800b.c | 64
On Tue, Apr 16, 2024 at 03:52:39PM +0800, Kongyang Liu wrote:
> Bind cv1800b sysreset driver for Sophgo Milk-V Duo board in board_init
> function.
>
> Signed-off-by: Kongyang Liu
> ---
>
> board/sophgo/milkv_duo/board.c | 4
> 1 file changed, 4 insertions(+)
Reviewed-by: Leo Yu-Chi Liang
On Tue, Apr 16, 2024 at 03:52:40PM +0800, Kongyang Liu wrote:
> Add sysreset configs as well as poweroff and reset commands for Sophgo
> Milk-V Duo board.
>
> Signed-off-by: Kongyang Liu
> ---
>
> configs/milkv_duo_defconfig | 3 +++
> 1 file changed, 3 insertions(+)
Reviewed-by: Leo Yu-Chi
On Thu, Apr 11, 2024 at 05:29:45PM +0800, Yu Chien Peter Lin wrote:
> The instruction and data cache line sizes of Andes core
> are 64-byte. Select SYS_CACHE_SHIFT_6 for RISCV_NDS so
> the SYS_CACHELINE_SIZE is enabled with a default value.
>
> Signed-off-by: Yu Chien Peter Lin
> ---
>
On Sat, Apr 20, 2024 at 03:00:28PM +0800, Kongyang Liu wrote:
> Add ethernet node for cv1800b SoC
>
> Signed-off-by: Kongyang Liu
> ---
>
> Changes in v2:
> - Change compatible
> - Add clocks and interrupt properties.
>
> arch/riscv/dts/cv1800b-milkv-duo.dts | 7 ++-
>
On Sat, Apr 20, 2024 at 03:08:23PM +0800, Kongyang Liu wrote:
> Add spi nor flash controller driver for cv1800b SoC
>
> Signed-off-by: Kongyang Liu
> ---
>
> drivers/spi/Kconfig| 8 +
> drivers/spi/Makefile | 1 +
> drivers/spi/cv1800b_spif.c | 321
On Sat, Apr 20, 2024 at 03:08:24PM +0800, Kongyang Liu wrote:
> Add spi nor flash controller node for cv18xx SoCs
>
> Signed-off-by: Kongyang Liu
> ---
>
> arch/riscv/dts/cv1800b-milkv-duo.dts | 13 +
> arch/riscv/dts/cv18xx.dtsi | 17 +
> 2 files changed,
On Sat, Apr 20, 2024 at 03:08:25PM +0800, Kongyang Liu wrote:
> Add configs related to spi nor flash for Sophgo Milk-V Duo board
>
> Signed-off-by: Kongyang Liu
> ---
>
> configs/milkv_duo_defconfig | 3 +++
> 1 file changed, 3 insertions(+)
Reviewed-by: Leo Yu-Chi Liang
On Wed, Apr 17, 2024 at 04:01:28PM +0200, Heinrich Schuchardt wrote:
> Let the sbi command detect the coreboot and oreboot SBI Implementation IDs
> defined in SBI specification v2.0.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> cmd/riscv/sbi.c | 2 ++
> 1 file changed, 2 insertions(+)
On Wed, Apr 17, 2024 at 04:01:27PM +0200, Heinrich Schuchardt wrote:
> OpenSBI has implemented the Supervisor Software Events Extension.
> Allow detecting it in the sbi command.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/riscv/include/asm/sbi.h | 1 +
> cmd/riscv/sbi.c | 1
On Wed, Apr 24, 2024 at 09:43:38AM +0200, lukas.funke-...@weidmueller.com wrote:
> From: Lukas Funke
>
> Rename spl_soc_init() to spl_dram_init() because the generic function
> name does not reflect what the function actually does. Also
> spl_dram_init() is commonly used for dram initialization
On Mon, Apr 22, 2024 at 04:43:59PM -0300, Daniel Henrique Barboza wrote:
> [EXTERNAL MAIL]
>
> Hi,
>
> In QEMU we have a 'max' type CPU that implements (almost) all extensions that
> QEMU
> is able to emulate. Recently, in QEMU commit 249e0905d05, we bumped the
> extensions
> for this CPU.
>
Hi Tom,
The following changes since commit 069d07396e30aa9be396c1dd3fc158ac199e6843:
Merge tag 'efi-2024-07-rc1' of
https://source.denx.de/u-boot/custodians/u-boot-efi (2024-04-08 14:33:59 -0600)
are available in the Git repository at:
On Tue, Apr 02, 2024 at 10:49:10AM +0200, Heinrich Schuchardt wrote:
> The differences between the Milk-V Mars board and the VisionFive 2 board
> are small enough that we can support both using the same U-Boot build.
>
> * The model and compatible property are taken from proposed Linux patches.
>
On Tue, Apr 02, 2024 at 10:49:12AM +0200, Heinrich Schuchardt wrote:
> Add instructions to build U-Boot for the Milk-V Mars board
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v3:
> no change
> v2:
> describe how to preset fdtfile
> ---
> doc/board/starfive/index.rst | 1 +
On Tue, Apr 02, 2024 at 10:49:07AM +0200, Heinrich Schuchardt wrote:
> Currently in set_fdtfile() we set the value of environment variable fdtfile
> unconditionally. The implies that a value in the environment will be
> ignored.
>
> With the patch environment variable fdtfile will only be set if
On Thu, Mar 28, 2024 at 10:58:24AM +0100, Łukasz Stelmach wrote:
> [EXTERNAL MAIL]
>
> When virtio_init() gets called from board_init() PCI isn't ready. Thus,
> virtio-over-PCI (e.g. network interfaces) devices can't be detected and
> used without additional `virtio scan` scan in the shell or a
On Tue, Sep 05, 2023 at 01:12:53PM +0100, Ben Dooks wrote:
> When debugging, it is useful to have a backtrace to find
> out what is in the call stack as the previous function (RA)
> may not have been the culprit.
>
> Since this adds size to the build, do not add it by default
> and avoid putting
On Mon, Mar 18, 2024 at 03:16:03PM +, Conor Dooley wrote:
> From: Conor Dooley
>
> A new property has been added, with an extensive rationale at [1], that
> can be used in place of "riscv,isa" to indicate what extensions are
> supported by a given platform that is a list of strings rather
On Mon, Mar 18, 2024 at 03:16:02PM +, Conor Dooley wrote:
> From: Conor Dooley
>
> cpu_get_desc() for the RISC-V CPU currently reads "riscv,isa" to get
> the description, but it is no longer a required property and cannot be
> assummed to always be present, as the new "riscv,isa-extensions"
Hi Heinrich,
On Wed, Mar 27, 2024 at 12:03:01PM +0100, Heinrich Schuchardt wrote:
> [EXTERNAL MAIL]
>
> On 24.03.24 16:00, Aurelien Jarno wrote:
> > On 2024-03-21 19:11, Heinrich Schuchardt wrote:
> > > The differences between the Milk-V Mars board and the VisionFive 2 board
> > > are small
Hi Heinrich,
On Thu, Mar 21, 2024 at 07:11:47PM +0100, Heinrich Schuchardt wrote:
> The differences between the Milk-V Mars board and the VisionFive 2 board
> are small enough that we can support both using the same U-Boot build.
>
> * The model and compatible property are taken from proposed
On Thu, Mar 21, 2024 at 07:11:46PM +0100, Heinrich Schuchardt wrote:
> Set environment variable fdtfile to the correct value for the Milk-V Mars
> board.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v2:
> rebase patch
> ---
> .../visionfive2/starfive_visionfive2.c| 43
On Thu, Mar 21, 2024 at 07:11:48PM +0100, Heinrich Schuchardt wrote:
> The usage of common.h is deprecated. Remove it from board files.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v2:
> no change
> ---
> board/starfive/visionfive2/spl.c| 1 -
>
On Thu, Mar 21, 2024 at 07:11:45PM +0100, Heinrich Schuchardt wrote:
> Export a function get_product_id_from_eeprom() to read the product ID.
> This value can be used for fixing up the device-tree on JH7110 based
> products.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v2:
> no change
>
On Thu, Mar 21, 2024 at 07:11:44PM +0100, Heinrich Schuchardt wrote:
> Currently in set_fdtfile() we set the value of environment variable fdtfile
> unconditionally. The implies that a value in the environment will be
> ignored.
>
> With the patch environment variable fdtfile will only be set if
Hi Tom,
The following changes since commit dde373bde392c38649c8c4420e0c98ef8d38d9dc:
Prepare v2024.04-rc5 (2024-03-25 21:56:50 -0400)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to
On Fri, Mar 22, 2024 at 07:36:37PM +0800, Randolph wrote:
> When Falcon Mode is enabled on RISC-V, use CONFIG_VAL
> to check PAYLOAD_ARGS_ADDR, not CONFIG_IS_ENABLED.
>
> Signed-off-by: Randolph
> ---
> common/spl/spl_opensbi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Tested-by:
Hi Łukasz,
On Mon, Feb 19, 2024 at 01:41:39PM +0100, Łukasz Stelmach wrote:
> The first time virtio_init() gets called from board_init() PCI isn't
> ready. Thus any virtio-over-PCI (e.g. network interfaces) devices can't
> be detected and used without additional `virtio scan` scan in the shell
>
On Sun, Mar 10, 2024 at 01:51:55AM +0800, Kongyang Liu wrote:
> Add sdhci driver for cv1800b SoC.
>
> Signed-off-by: Kongyang Liu
> ---
>
> Changes in v2:
> - Refactored and simplified some of the code.
>
> drivers/mmc/Kconfig | 13
> drivers/mmc/Makefile| 1 +
>
On Sun, Mar 10, 2024 at 01:51:57AM +0800, Kongyang Liu wrote:
> Add configs related to sdhci and mmc for Sophgo Milk-V Duo board
>
> Signed-off-by: Kongyang Liu
> ---
>
> (no changes since v1)
>
> configs/milkv_duo_defconfig | 10 ++
> 1 file changed, 10 insertions(+)
Reviewed-by:
On Sun, Mar 10, 2024 at 01:56:46PM +0800, Kongyang Liu wrote:
> Add configs related to ethernet and ethernet boot command for Sophgo Milk-V
> Duo board
>
> Signed-off-by: Kongyang Liu
> ---
>
> configs/milkv_duo_defconfig | 4
> 1 file changed, 4 insertions(+)
Reviewed-by: Leo Yu-Chi
On Sun, Mar 10, 2024 at 01:56:45PM +0800, Kongyang Liu wrote:
> Add ethernet node for cv1800b SoC
>
> Signed-off-by: Kongyang Liu
> ---
>
> arch/riscv/dts/cv18xx.dtsi | 6 ++
> 1 file changed, 6 insertions(+)
Hi KongYang,
Will there be a patch adding this ethernet node for kernel as well
On Sun, Mar 10, 2024 at 01:56:44PM +0800, Kongyang Liu wrote:
> Initialize register in cv1800b ethernet phy to make it compatible with
> generic phy driver
>
> Signed-off-by: Kongyang Liu
> ---
>
> board/sophgo/milkv_duo/Makefile | 3 +-
> board/sophgo/milkv_duo/board.c| 4 ++
>
On Sun, Mar 10, 2024 at 12:54:57AM +0800, Kongyang Liu wrote:
> Add dcache operations invalidate_dcache_range and flush_dcache_range for
> cv1800b.
>
> Signed-off-by: Kongyang Liu
> ---
>
> (no changes since v1)
>
> arch/riscv/cpu/cv1800b/Makefile | 1 +
> arch/riscv/cpu/cv1800b/cache.c |
On Sun, Mar 10, 2024 at 12:54:56AM +0800, Kongyang Liu wrote:
> Add Sophgo cv1800b SoC to support RISC-V arch.
>
> Signed-off-by: Kongyang Liu
> ---
>
> Changes in v2:
> - Remove duplicate code in function cleanup_before_linux
>
> arch/riscv/Kconfig | 1 +
>
On Sun, Mar 10, 2024 at 01:51:56AM +0800, Kongyang Liu wrote:
> Add clk node and sdhci node for cv18xx SoCs according to patches from Linux
> kernel.
>
> clk:
> https://lore.kernel.org/all/ia1pr20mb4953f9ad6792013b54636f05bb...@ia1pr20mb4953.namprd20.prod.outlook.com/
> sdhci:
Hi Tom,
The following changes since commit f3c979dd0053c082d2df170446923e7ce5edbc2d:
Prepare v2024.04-rc4 (2024-03-11 13:11:46 -0400)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to
On Wed, Feb 21, 2024 at 01:00:14PM +0100, Nam Cao wrote:
> Distro boot scripts are deprecated. Use standard boot instead.
>
> Signed-off-by: Nam Cao
> ---
> configs/starfive_visionfive2_defconfig | 2 +-
> include/configs/starfive-visionfive2.h | 14 +-
> 2 files changed, 2
On Thu, Feb 22, 2024 at 03:52:03PM +0100, thomas.per...@bootlin.com wrote:
> From: Thomas Perrot
>
> It appears that there is some timing marginality either in the
> board layout or the SoC that results in occasional data corruption
> on some boards.
> We observed this issue on some of the new
On Tue, Mar 05, 2024 at 07:00:11PM -0800, Bo Gan wrote:
> Previously PLL node was missing from SPL dts. This caused BUS_ROOT
> to stay on OSC clock (24Mhz). As a result, all peripherals have to
> run at a much lower frequency, and loading from sdcard/emmc is slow.
> Thus, enabling PLL node in dts
On Fri, Mar 08, 2024 at 02:53:36PM +0800, Minda Chen wrote:
> Add PCIe driver file to visionfive2 board MAINTAINERS list.
>
> Signed-off-by: Minda Chen
> ---
> board/starfive/visionfive2/MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Leo Yu-Chi Liang
On Fri, Mar 08, 2024 at 02:53:35PM +0800, Minda Chen wrote:
> Update the maintainer of Starfive VisionFive v2 board.
>
> Signed-off-by: Minda Chen
> ---
> board/starfive/visionfive2/MAINTAINERS | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Leo Yu-Chi Liang
On Mon, Mar 04, 2024 at 09:51:47PM +0100, Leon M. Busch-George wrote:
> From: "Leon M. Busch-George"
>
> Signed-off-by: Leon M. Busch-George
> ---
> arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Leo Yu-Chi Liang
Hi Tom,
The following changes since commit 28760ce8640ff6266bd1c1c568a4a231576f3919:
Merge tag 'clk-2024.04-rc2' of
https://source.denx.de/u-boot/custodians/u-boot-clk (2024-01-30 07:54:28 -0500)
are available in the Git repository at:
On Mon, Jan 29, 2024 at 09:43:09AM +0100, Nam Cao wrote:
> Add the axp15060 regulator device. OpenSBI uses this device to perform
> board reset and shutdown.
>
> Signed-off-by: Nam Cao
> ---
> v2: "stf,axp15060-regulator" -> "x-powers,axp15060" to match Linux.
>
>
On Mon, Jan 29, 2024 at 09:43:08AM +0100, Nam Cao wrote:
> JH7110 has a power management unit controller node. Add this node.
>
> This device is used by OpenSBI during board reset/shutdown.
>
> Signed-off-by: Nam Cao
> ---
> arch/riscv/dts/jh7110.dtsi | 6 ++
> 1 file changed, 6
On Sun, Jan 28, 2024 at 08:22:48PM +0100, Lukasz Tekieli wrote:
> Configure the pad drive strength register for both PHYs.
> The values correspond to what can be found in the Linux DTS
> for VisionFive2 v1.3b.
>
> Pad drive strength configuration is required for the phy0 to work correctly
> with
On Sun, Jan 28, 2024 at 08:22:47PM +0100, Lukasz Tekieli wrote:
> This ports the pad drive strength register configuration which can be
> already found in the Linux driver for this PHY.
>
> Signed-off-by: Lukasz Tekieli
> ---
> drivers/net/phy/motorcomm.c | 130
On Sun, Jan 28, 2024 at 03:05:26PM +0800, Kongyang Liu wrote:
> Add document for Milk-V Duo board which based on Sophgo's CV1800B SoC.
>
> Signed-off-by: Kongyang Liu
> ---
>
> (no changes since v3)
>
> Changes in v3:
> - Add brief description of the procedure to run u-boot-dtb.bin
>
>
On Sun, Jan 28, 2024 at 03:05:25PM +0800, Kongyang Liu wrote:
> Add support for Sophgo's Milk-V Duo board, only minimal device tree and
> serial console are enabled, and it can boot via vendor first stage
> bootloader.
>
> Signed-off-by: Kongyang Liu
> ---
>
> (no changes since v3)
>
> Changes
On Sun, Jan 28, 2024 at 03:05:24PM +0800, Kongyang Liu wrote:
> Import device tree from Linux kernel to add basic support for CPU, PLIC,
> UART and Timer. The name cv1800b in the filename represent the chip used
> on Milk-V Duo board.
>
> Signed-off-by: Kongyang Liu
> ---
>
> Changes in v4:
> -
On Sat, Jan 27, 2024 at 02:48:45PM +0100, Aurelien Jarno wrote:
> The VisionFive 2 board supports saving the u-boot environment settings
> are saved to on-board SPI flash. However the defconfig enables both
> ENV_IS_NOWHERE and ENV_IS_IN_SPI_FLASH, preventing the "saveenv" command
> to work. Fix
On Wed, Jan 17, 2024 at 05:46:52PM +0100, Heinrich Schuchardt wrote:
> Detect and show if the SBI implements the Debug Trigger Extension.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/riscv/include/asm/sbi.h | 1 +
> cmd/riscv/sbi.c | 1 +
> 2 files changed, 2 insertions(+)
On Tue, Jan 16, 2024 at 02:35:57PM +0800, Nylon Chen wrote:
> From: Vincent Chen
>
> LEDs and multiple fans can be controlled by SPL. This patch ensures
> that all fans have been enabled in the SPL stage. In addition, the
> LED's color will be set to yellow.
>
> Signed-off-by: Vincent Chen
>
On Wed, Jan 10, 2024 at 09:26:53PM +0100, Aurelien Jarno wrote:
> QEMU RISC-V supports multiple virtio devices, but only tries to boot to
> the first one. Enable support for a second virtio device, that is useful
> for instance to boot on a disk image + an installer. Ideally that should
> be made
On Wed, Jan 10, 2024 at 09:17:44PM +0100, Aurelien Jarno wrote:
> The difference between the StarFive VisionFive 2 1.2A and 1.3B boards is
> handled dynamically by looking at the PCB version in the EEPROM in order
> to have a single u-boot version for both versions of the board. While
> the
On Fri, Dec 29, 2023 at 04:32:23PM +0800, Randolph wrote:
> Add the address to which the FDT blob is to be moved.
>
> Signed-off-by: Randolph
> ---
> configs/ae350_rv32_falcon_defconfig | 1 +
> configs/ae350_rv32_falcon_xip_defconfig | 1 +
> configs/ae350_rv64_falcon_defconfig | 1 +
>
On Fri, Dec 29, 2023 at 04:32:22PM +0800, Randolph wrote:
> In Falcon Boot mode, the fdt blob should be move to the RAM from
> kernel BSS section. To avoid being cleared by BSS initialisation.
> SPL_PAYLOAD_ARGS_ADDR is the address where SPL copies.
>
> Signed-off-by: Randolph
> ---
>
On Fri, Dec 29, 2023 at 04:32:21PM +0800, Randolph wrote:
> Add documentation to introduce the Falcon Mode on RISC-V.
> In this mode, the boot sequence is SPL -> OpenSBI -> Linux kernel.
>
> Signed-off-by: Randolph
> ---
> doc/develop/falcon.rst | 158 +
>
Hi Tom,
The following changes since commit 4b151562bb8e54160adedbc6a1c0c749c00a2f84:
bootmeth: pass size to efi_binary_run() (2023-12-22 10:36:50 -0500)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git next
for you to fetch changes up to
On Wed, Dec 20, 2023 at 03:53:28PM +0100, Michal Simek wrote:
> Extend compatible string to match the latest change in dt binding.
>
> Fixes: 7576ab2facae ("riscv: Add support for AMD/Xilinx MicroBlaze V")
> Signed-off-by: Michal Simek
> ---
>
> dt binding patch is available here.
>
On Thu, Dec 14, 2023 at 02:09:37PM +, Zong Li wrote:
> The power gating feature of pl2 should be enabled as early as possible,
> it would be better to put it in SPL stage.
>
> Signed-off-by: Zong Li
> ---
> arch/riscv/lib/sifive_cache.c | 21 +
> 1 file changed, 21
On Thu, Dec 14, 2023 at 02:09:36PM +, Zong Li wrote:
> This driver is currently responsible for enabling the clock gating
> feature of SiFive pre core's private L2 cache.
>
> Signed-off-by: Zong Li
> ---
> drivers/cache/Kconfig| 7 +
> drivers/cache/Makefile | 1
Hi Tom,
The following changes since commit fdefb4e194c65777fa11479119adaa71651f41d4:
Merge tag 'efi-next-20231217' of
https://source.denx.de/u-boot/custodians/u-boot-efi into next (2023-12-17
09:11:06 -0500)
are available in the Git repository at:
Hi Tom,
On Thu, Dec 14, 2023 at 07:19:02AM -0500, Tom Rini wrote:
> On Thu, Dec 14, 2023 at 10:38:07AM +0800, Leo Yu-Chi Liang(梁育齊) wrote:
>
> > Hi Tom,
> >
> > The following changes since commit 20d0464300c25db673cfb5e4539aa3767606d151:
> >
> > Merge tag 'u-boot-imx-20231212' of
> >
On Mon, Dec 11, 2023 at 10:22:10AM +0800, Jun Liang Tan wrote:
> From: Kuan Lim Lee
>
> Add timer driver in Starfive SoC. It is an timer that outside
> of CPU core and inside Starfive SoC.
>
> Signed-off-by: Kuan Lim Lee
> Signed-off-by: Wei Liang Lim
>
> Changes for v2:
> - correct driver
On Tue, Oct 31, 2023 at 05:24:39PM +0900, Jaehoon Chung wrote:
> Enable CONFIG_SYSREST config to do reset.
>
> Signed-off-by: Jaehoon Chung
> ---
> configs/starfive_visionfive2_defconfig | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Leo Yu-Chi Liang
On Tue, Oct 31, 2023 at 05:24:38PM +0900, Jaehoon Chung wrote:
> Add gpio-restart node to do reset.
>
> Before applied this patch, System Reset Extension doesn't appear with
> sbi command.
>
> OpenSBI 1.3
> Machine:
> Vendor ID 489
> Architecture ID 8007
> Implementation ID
On Thu, Nov 30, 2023 at 08:07:29PM +0800, Randolph wrote:
> It adds the ATCWDT200 support for Andes AE350 platform.
> It also enables wdt command support.
>
> Signed-off-by: CL Wang
> Signed-off-by: Randolph
> ---
> configs/ae350_rv32_defconfig | 4
>
On Thu, Nov 30, 2023 at 08:07:28PM +0800, Randolph wrote:
> This patch adds an implementation of the Andes watchdog ATCWDT200 driver.
>
> Signed-off-by: CL Wang
> Signed-off-by: Randolph
> ---
> drivers/watchdog/Kconfig | 6 +
> drivers/watchdog/Makefile| 1 +
>
Hi Tom,
The following changes since commit 2f0282922b2c458eea7f85c500a948a587437b63:
Prepare v2024.01-rc4 (2023-12-04 13:46:56 -0500)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to
Hi Kuan Lim,
On Tue, Nov 28, 2023 at 02:42:33PM +0800, Kuan Lim Lee wrote:
> Add timer driver in Starfive SoC. It is an timer that outside
> of CPU core and inside Starfive SoC.
>
> Signed-off-by: Kuan Lim Lee
> Signed-off-by: Wei Liang Lim
>
> Changes for v2:
> - correct driver name,
On Thu, Nov 16, 2023 at 09:01:36PM +0800, Randolph wrote:
> Add the address where the FDT blob should be moved.
>
> Signed-off-by: Randolph
> ---
> configs/ae350_rv32_falcon_defconfig | 1 +
> configs/ae350_rv32_falcon_xip_defconfig | 1 +
> configs/ae350_rv64_falcon_defconfig | 1 +
>
On Thu, Nov 16, 2023 at 09:01:35PM +0800, Randolph wrote:
> In Falcon Boot mode, the fdt blob should be move to the RAM from
> kernel BSS section. To avoid being cleared by BSS initialisation.
> SPL_PAYLOAD_ARGS_ADDR is the address where SPL copies.
>
> Signed-off-by: Randolph
> ---
>
On Thu, Nov 16, 2023 at 09:01:34PM +0800, Randolph wrote:
> Add documentation to introduce the Falcon Mode on RISC-V.
> In this mode, the boot sequence is SPL -> OpenSBI -> Linux kernel.
>
> Signed-off-by: Randolph
> ---
> doc/develop/falcon.rst | 171 +
>
On Mon, Nov 20, 2023 at 02:35:31AM +, John Clark wrote:
> device tree overlay support requires fdtoverlay_addr_r to be set
>
> before
> ~~
> Invalid fdtoverlay_addr_r for loading overlays
>
> after
> ~
> Retrieving file: /boot/overlay/rtc-ds3231.dtbo
>
> Signed-off-by: John Clark
>
On Mon, Nov 06, 2023 at 12:56:47PM +0100, Michal Simek wrote:
> MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP.
> It is hardware compatible with classic MicroBlaze processor.
>
> The patch contains initial wiring and configuration for initial HW design
> with memory, cpu,
On Mon, Nov 06, 2023 at 08:13:18AM +0900, Chanho Park wrote:
> Enables StarFive Watchdog driver and WDT command.
>
> Signed-off-by: Chanho Park
> ---
> configs/starfive_visionfive2_defconfig | 5 +
> 1 file changed, 5 insertions(+)
Reviewed-by: Leo Yu-Chi Liang
On Mon, Nov 06, 2023 at 08:13:17AM +0900, Chanho Park wrote:
> Adds jh7110 watchdog device tree node.
>
> Signed-off-by: Chanho Park
> ---
> arch/riscv/dts/jh7110.dtsi | 10 ++
> 1 file changed, 10 insertions(+)
Reviewed-by: Leo Yu-Chi Liang
On Mon, Nov 06, 2023 at 08:13:16AM +0900, Chanho Park wrote:
> Add to support StarFive watchdog driver. The driver is imported from
> linux kernel's drivers/watchdog/starfive-wdt.c without jh7100 support
> because there is no support of jh7100 SoC in u-boot yet.
> Howver, this patch has been kept
On Mon, Nov 06, 2023 at 08:13:15AM +0900, Chanho Park wrote:
> Add JH7110_SYSCLK_WDT_APB and JH7110_SYSCLK_WDT_CORE clocks for JH7110
> watchdog device.
>
> Signed-off-by: Chanho Park
> ---
> drivers/clk/starfive/clk-jh7110.c | 9 +
> 1 file changed, 9 insertions(+)
Reviewed-by: Leo
Hi Tom,
The following changes since commit a803f87202aa48974bdff4d8100464a8288931e4:
Merge https://source.denx.de/u-boot/custodians/u-boot-mmc (2023-11-01
09:44:33 -0400)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch
On Wed, Nov 01, 2023 at 09:16:51PM +0900, Chanho Park wrote:
> Adds jh7110 trng device tree node.
>
> Signed-off-by: Chanho Park
> ---
> arch/riscv/dts/jh7110.dtsi | 10 ++
> 1 file changed, 10 insertions(+)
Reviewed-by: Leo Yu-Chi Liang
On Wed, Nov 01, 2023 at 09:16:50PM +0900, Chanho Park wrote:
> Adds to support JH7110 TRNG driver which is based on linux kernel's
> jh7110-trng.c. This can support to generate 256-bit random numbers and
> 128-bit but this makes 256-bit default for convenience.
>
> Signed-off-by: Chanho Park
>
On Wed, Nov 01, 2023 at 09:16:49PM +0900, Chanho Park wrote:
> Add STGCLK_SEC_HCLK and STGCLK_SEC_MISCAHB clocks for JH7110 TRNG
> device.
>
> Signed-off-by: Chanho Park
> ---
> drivers/clk/starfive/clk-jh7110.c | 10 ++
> 1 file changed, 10 insertions(+)
Reviewed-by: Leo Yu-Chi Liang
On Wed, Nov 01, 2023 at 09:16:48PM +0900, Chanho Park wrote:
> This imports mmio functions from Linux's arch/riscv/include/asm/mmio.h
> to use read/write[b|w|l|q]_relaxed functions.
>
> Signed-off-by: Chanho Park
> ---
> arch/riscv/include/asm/io.h | 45 +
>
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