73f7fc944cf6 ("ARM: stm32: Initialize TAMP_SMCR BKP..PROT fields on
> STM32MP15xx")
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: Tom Rini
> Cc: u-boot@lists.denx.de
> Cc: uboot-st...@st-md-mailman.stormreply.com
>
On 6/14/24 15:06, Marek Vasut wrote:
> On 6/14/24 2:00 PM, Patrice CHOTARD wrote:
>>
>>
>> On 4/20/24 00:03, Marek Vasut wrote:
>>> Make sure the OS would not get any spurious IWDG pretimeout IRQ
>>> right after the system wakes up. This may happen in c
livetree conversion on STM32MP15xx DHSOM
Patrice Chotard (2):
stm32mp1: spl: Fix compilation warnings
stm32mp1: spl: Update optee_get_reserved_memory() return value
arch/arm/mach-stm32mp/stm32mp1/spl.c| 4 ++--
board/dhelectronics/dh_stm32mp1/board.c | 15 +--
both
> software components are configured the same way.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: Simon Glass
> Cc: Tom Rini
> Cc: u-b...@dh-electronics.com
> Cc: u-boot@lists.denx.de
> Cc: uboot-st...@st-md-mail
On 5/17/24 01:47, Marek Vasut wrote:
> Add generic SoM compatible string into machine compatible string
> for all STM32MP15xx based DH electronics DHSOM. This way, common
> board code can match on this compatible. No functional change.
>
> Signed-off-by: Marek Vasut
>
On 4/28/24 16:24, Heesub Shin wrote:
> In Odyssey board, KSZ9031 is at the PHY address 0x7, not 0x0. This
> commit fixes it.
>
> Signed-off-by: Heesub Shin
> ---
> arch/arm/dts/stm32mp157c-odyssey.dts | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git
On 4/28/24 16:24, Heesub Shin wrote:
> In Odyssey board, KSZ9031 is at the PHY address 0x7, not 0x0. This
> commit fixes it.
>
> Signed-off-by: Heesub Shin
> ---
> arch/arm/dts/stm32mp157c-odyssey.dts | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git
On 4/28/24 16:24, Heesub Shin wrote:
> Odyssey board requires ETH_CLK of 125Mhz. This commit sets PLL4_P/Q/R to
> 125, 62.5 and 62.5Mhz in respectively.
>
> Signed-off-by: Heesub Shin
> ---
> arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2
On 4/28/24 16:24, Heesub Shin wrote:
> In Odyssey board, we should reset the PHY chipset, toggling G0 pin.
>
> Signed-off-by: Heesub Shin
> ---
> arch/arm/dts/stm32mp157c-odyssey.dts | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/dts/stm32mp157c-odyssey.dts
>
On 4/28/24 16:24, Heesub Shin wrote:
> This commit adds support for a property 'phy-reset-gpios' to reset PHY
> chipset.
>
> Signed-off-by: Heesub Shin
> ---
> drivers/net/dwc_eth_qos_stm32.c | 23 ++-
> 1 file changed, 22 insertions(+), 1 deletion(-)
>
> diff --git
On 6/6/24 16:37, Patrice CHOTARD wrote:
>
>
> On 4/28/24 16:24, Heesub Shin wrote:
>> In Odyssey board, we should use the internal clock from RCC as the
>> transmit clock, instead of the external clock from ETH_CLK125 pad. This
>> commit adds a p
- 512MB DDR3L memory
> - eMMC and SDIO WiFi module
>
> The DHSBC carrier board contains the following peripherals:
> - Two RGMII Ethernet ports
> - USB-A Host port, USB-C peripheral port, USB-C power supply plug
> - Expansion connector
>
> Reviewed-by: Patrice Chotard
>
gt; - PWM13 pins
> - PWM5 pins
> - QSPI pins
> - SAI1 pins
> - SDMMC2 D4..D7 pins
> - SPI2 pins
> - SPI3 pins
> - UART4 pins
> - UART7 pins
> - USART1 pins
> - USART2 pins
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
>
ard, but too late to be
> handled by the suspend main loop. In case either of the IWDG is
> enabled, ping it first and then return to the OS.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Igor Opaniuk
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: Simon Glass
> Cc:
ce than the IWDG pretimeout and the
>> pretimeout IRQ arrived immediately afterward, but too late to be
>> handled by the suspend main loop. In case either of the IWDG is
>> enabled, ping it first and then return to the OS.
>>
>> Signed-off-by: Marek Vasut
>> ---
>&
On 3/19/24 03:45, Marek Vasut wrote:
> This patch makes STM32 PWR regulators available on stm32mp13xx.
> This requires TFA to clear RCC_SECCFGR, is disabled by default
> on stm32mp13xx and can only be enabled on board config level.
>
> Signed-off-by: Marek Vasut
> ---
>
On 3/19/24 03:45, Marek Vasut wrote:
> This patch adds STM32 PWR regulators DT support on stm32mp131.
> This requires TFA to clear RCC_SECCFGR, is disabled by default
> and can only be enabled on board DT level.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice C
On 6/14/24 10:43, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/22/24 17:06, Patrice Chotard wrote:
>> Since commit 7b78d6438a2b3 ("efi_loader: Reserve unaccessible memory")
>> memory region above ram_top is tagged in EFI memory map as
>> EFI_BOOT_SERVICES_D
the KS8851 MAC, which also configures the FMC2 EBI as a dependency,
> so that the KS8851 MAC CCR register can be accessed over the FMC2 EBI bus
> and checked for EEPROM present bit.
>
> Fixes: 5a605b7c8615 ("board: dhelectronics: stm32mp1: convert to livetree")
> Signed-o
both
> software components are configured the same way.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: Simon Glass
> Cc: Tom Rini
> Cc: u-b...@dh-electronics.com
> Cc: u-boot@lists.denx.de
> Cc: uboot-st...@st-md-mail
the KS8851 MAC, which also configures the FMC2 EBI as a dependency,
> so that the KS8851 MAC CCR register can be accessed over the FMC2 EBI bus
> and checked for EEPROM present bit.
>
> Fixes: 5a605b7c8615 ("board: dhelectronics: stm32mp1: convert to livetree")
> Signed-o
On 6/14/24 09:59, Patrick DELAUNAY wrote:
> Hi Patrice,
>
> On 6/11/24 11:52, Patrice Chotard wrote:
>> Fix the following compilation warnings :
>>
>> ../arch/arm/mach-stm32mp/stm32mp1/spl.c: In function
>> 'stm32_init_tzc_for_optee':
>> ../arch/arm/mach
On 6/14/24 09:59, Patrick DELAUNAY wrote:
> Hi Patrice
>
> On 6/11/24 11:52, Patrice Chotard wrote:
>> In case node "/reserved-memory/optee" is not found, return -ENOENT
>> instead of 0.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
In case node "/reserved-memory/optee" is not found, return -ENOENT
instead of 0.
Signed-off-by: Patrice Chotard
---
arch/arm/mach-stm32mp/stm32mp1/spl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-stm32mp/stm32mp1/spl.c
b/arch/arm/mach-stm32m
e_base = 0, optee_size = 0, tee_shmem_base;
Signed-off-by: Patrice Chotard
---
arch/arm/mach-stm32mp/stm32mp1/spl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-stm32mp/stm32mp1/spl.c
b/arch/arm/mach-stm32mp/stm32mp1/spl.c
index 6c79259b2c8..10abbed87f0 100644
ard, but too late to be
> handled by the suspend main loop. In case either of the IWDG is
> enabled, ping it first and then return to the OS.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Igor Opaniuk
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: Simon Glass
> Cc:
0>;
> phy-handle = <>;
> + phy-reset-gpios = < 0 GPIO_ACTIVE_LOW>;
> st,ext-phyclk;
>
> mdio0 {
Reviewed-by: Patrice Chotard
Thanks
Patrice
2,7 +313,7 @@ static struct eqos_ops eqos_stm32_ops = {
> .eqos_probe_resources = eqos_probe_resources_stm32,
> .eqos_remove_resources = eqos_remove_resources_stm32,
> .eqos_stop_resets = eqos_null_ops,
> - .eqos_start_resets = eqos_null_ops,
> + .eqos_start_resets = eqos_start_resets_stm32,
> .eqos_stop_clks = eqos_stop_clks_stm32,
> .eqos_start_clks = eqos_start_clks_stm32,
> .eqos_calibrate_pads = eqos_null_ops,
Reviewed-by: Patrice Chotard
Thanks
Patrice
cells = <1>;
> #size-cells = <0>;
> compatible = "snps,dwmac-mdio";
> - phy0: ethernet-phy@0 {
> - reg = <0>;
> + phy0: ethernet-phy@7 {
> + reg = <7>;
> };
> };
> };
Reviewed-by: Patrice Chotard
Thanks
Patrice
m32mp157c-odyssey.dts
> +++ b/arch/arm/dts/stm32mp157c-odyssey.dts
> @@ -75,6 +75,7 @@
> phy-mode = "rgmii-id";
> max-speed = <1000>;
> phy-handle = <>;
> + st,ext-phyclk;
>
> mdio0 {
> #address-cells = <1>;
Reviewed-by: Patrice Chotard
Thanks
Patrice
m32mp1-pll";
> reg = <3>;
> - cfg = < 3 98 5 7 7 PQR(1,1,1) >;
> + cfg = < 3 124 5 9 9 PQR(1,1,1) >;
> bootph-all;
> };
> };
Reviewed-by: Patrice Chotard
Thanks
Patrice
gt; - PWM13 pins
> - PWM5 pins
> - QSPI pins
> - SAI1 pins
> - SDMMC2 D4..D7 pins
> - SPI2 pins
> - SPI3 pins
> - UART4 pins
> - UART7 pins
> - USART1 pins
> - USART2 pins
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
>
On 5/1/24 04:42, Tom Rini wrote:
> Remove from this board vendor directory and when needed
> add missing include files directly.
>
> Signed-off-by: Tom Rini
> ---
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
> Cc: Kamil Lulko
> Cc: Vikas Manocha
> Cc: Dillon
5xx-dhcor-som",
> + "st,stm32mp1xx";
> };
> diff --git a/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
> b/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
> index c9163e1c028..5fdd762ddbf 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
> +++ b/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
> @@ -9,7 +9,9 @@
>
> / {
> model = "DH electronics STM32MP15xx DHCOR Testbench";
> - compatible = "dh,stm32mp15xx-dhcor-testbench", "st,stm32mp1xx";
> + compatible = "dh,stm32mp15xx-dhcor-testbench",
> + "dh,stm32mp15xx-dhcor-som",
> + "st,stm32mp1xx";
>
> aliases {
> ethernet0 =
Reviewed-by: Patrice Chotard
Thanks
- 512MB DDR3L memory
> - eMMC and SDIO WiFi module
>
> The DHSBC carrier board contains the following peripherals:
> - Two RGMII Ethernet ports
> - USB-A Host port, USB-C peripheral port, USB-C power supply plug
> - Expansion connector
>
> Signed-off-by: Marek Vasut
> -
On 4/22/24 01:17, Marek Vasut wrote:
> Add another mux option for UART7 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:17, Marek Vasut wrote:
> Add another mux option for UART4 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:17, Marek Vasut wrote:
> Add another mux option for USART2 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:17, Marek Vasut wrote:
> Add another mux option for USART1 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:17, Marek Vasut wrote:
> Add another mux option for SPI3 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for SPI2 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for SDMMC2 D4..D7 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for SAI1 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for QSPI pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for PWM13 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for PWM5 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for MCAN2 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for MCAN1 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for I2C5 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for ETH2 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for ETH1 pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for ADC CC pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:16, Marek Vasut wrote:
> Add another mux option for ADC pins, this is used on
> DH electronics STM32MP13xx DHCOR DHSBC board.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
On 4/22/24 01:09, Marek Vasut wrote:
> From: Christophe Roullier
>
> Add both ethernet MACs based on GMAC SNPS IP on stm32mp13.
>
> Signed-off-by: Christophe Roullier
> ---
> Cc: Christophe Roullier
> Cc: Joe Hershberger
> Cc: Patrice Chotard
> Cc: Patri
On 3/19/24 03:45, Marek Vasut wrote:
> This patch makes STM32 PWR regulators available on stm32mp13xx.
> This requires TFA to clear RCC_SECCFGR, is disabled by default
> on stm32mp13xx and can only be enabled on board config level.
>
> Signed-off-by: Marek Vasut
> ---
>
On 3/19/24 03:45, Marek Vasut wrote:
> This patch adds STM32 PWR regulators DT support on stm32mp131.
> This requires TFA to clear RCC_SECCFGR, is disabled by default
> and can only be enabled on board DT level.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice C
On 4/21/24 22:27, Marek Vasut wrote:
> On 3/19/24 3:45 AM, Marek Vasut wrote:
>> This patch adds STM32 PWR regulators DT support on stm32mp131.
>> This requires TFA to clear RCC_SECCFGR, is disabled by default
>> and can only be enabled on board DT level.
>>
>> Signed-off-by: Marek Vasut
>
>
ldn't be used by EFI, so we need to mark
it as reserved.
Signed-off-by: Patrice Chotard
---
Changes in v2:
_ update commit message by adding information about memory area
dedicated for OPTEE for various STM32MP1/STM32MP13 boards.
arch/arm/mach-stm32mp/dram_init.c | 12
1 file changed, 12 i
On 4/19/24 09:44, Patrice CHOTARD wrote:
>
>
> On 4/17/24 09:45, Heinrich Schuchardt wrote:
>> On 17.04.24 09:25, Patrick DELAUNAY wrote:
>>> Hi,
>>>
>>> On 3/8/24 11:12, Patrice Chotard wrote:
>>>> Since commit 7b78d6438a2b3 ("e
On 4/17/24 11:00, Patrick DELAUNAY wrote:
> Hi,
>
> On 3/8/24 14:50, Patrice Chotard wrote:
>> Fix flash@0 partition node name with correct offset.
>>
>> Fixes: 90f992e6a58c ("arm: dts: stm32: Add partitions in flash0 and nand
>> node for stm32mp15xx-dhco
On 4/17/24 10:59, Patrick DELAUNAY wrote:
> Hi,
>
> On 3/8/24 14:50, Patrice Chotard wrote:
>> Fix flash@0 and nand@0 partition node name with correct offset.
>>
>> Fixes: e91d3c61767b ("arm: dts: stm32: Add partitions in flash0 and nand
>> node
On 4/17/24 11:00, Patrick DELAUNAY wrote:
> Hi
>
> On 3/8/24 14:50, Patrice Chotard wrote:
>> Fix flash@0 partition node name with correct offset.
>>
>> Fixes: 90f992e6a58c ("arm: dts: stm32: Add partitions in flash0 and nand
>> node for
>>
On 4/17/24 13:10, Jaehoon Chung wrote:
> Hi
>
>> -Original Message-
>> From: Patrick DELAUNAY
>> Sent: Wednesday, April 17, 2024 6:02 PM
>> To: Patrice Chotard ; u-boot@lists.denx.de
>> Cc: U-Boot STM32 ; Jaehoon Chung
>> ;
>> Peng Fan
On 4/17/24 13:11, Jaehoon Chung wrote:
>
>
>> -Original Message-
>> From: Patrick DELAUNAY
>> Sent: Wednesday, April 17, 2024 6:02 PM
>> To: Patrice Chotard ; u-boot@lists.denx.de
>> Cc: U-Boot STM32 ; Jaehoon Chung
>> ;
>> Peng Fan
On 4/17/24 11:28, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> The blue led is used to indicate U-Boot entering / exit indication
>> then Linux heartbeat.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>>
On 4/17/24 11:13, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> As indicated in kernel led dt-bindings, label is a deprecated
>> property, so remove it and use led node's name instead for
>> u-boot,error-led property.
>> Rena
On 4/17/24 11:13, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> red led and button dedicated to fastboot share the same gpio GPIOA13.
>> Led driver is probed early so the corresponding gpio is taken and
>> configured in output which fo
On 4/9/24 17:02, Patrice Chotard wrote:
> red led and button dedicated to fastboot share the same gpio GPIOA13.
> Led driver is probed early so the corresponding gpio is taken and
> configured in output which forbid fastboot and stm32prog button usage.
>
> To avoid this, remo
On 4/17/24 11:12, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> Add 2 gpio-keys :
>> _ button-user-1 for stm32prog mode activation.
>> _ button-user-2 for fastboot mode activation.
>>
>> Remove proprietary s
On 4/17/24 11:11, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> The blue led is used to indicate U-Boot entering / exit indication
>> then Linux heartbeat.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>
On 4/17/24 11:11, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> As indicated in kernel led dt-bindings, label is a deprecated
>> property, so remove it and use led node's name instead for
>> u-boot,error-led property.
>> Rena
On 4/17/24 11:11, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> red led and button dedicated to fastboot share the same gpio GPIOA13.
>> Led driver is probed early so the corresponding gpio is taken and
>> configured in output which fo
On 4/17/24 11:11, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> Add 2 gpio-keys :
>> _ button-user-1 for stm32prog mode activation.
>> _ button-user-2 for fastboot mode activation.
>>
>> Remove proprietary s
On 4/17/24 11:10, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> As indicated in kernel led dt-bindings, label is a deprecated
>> property, so remove it and use blue led node's name instead
>> for u-boot,boot-led property.
>>
On 4/17/24 11:10, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> As indicated in kernel led dt-bindings, label is a deprecated
>> property, so remove it and use red led node's name instead
>> for u-boot,error-led property.
>> Rena
On 4/17/24 11:09, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> red led and button dedicated to fastboot share the same gpio GPIOA13.
>> Led driver is probed early so the corresponding gpio is taken and
>> configured in output which fo
On 4/17/24 11:09, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> Instead of using "st,fastboot-gpios" and "st,stm32prog-gpios", declare
>> 2 gpio-keys.
>>
>> Signed-off-by: Patrice Chotard
>>
On 4/17/24 11:09, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> As indicated in kernel led dt-bindings, label is a deprecated
>> property, so remove it and use blue led node's name instead
>> for u-boot,boot-led property.
>>
On 4/17/24 11:08, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> As indicated in kernel led dt-bindings, label is a deprecated
>> property, so remove it and use red led node's name instead
>> for u-boot,error-led property.
>> Ren
On 4/17/24 11:07, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> red led and button dedicated to fastboot share the same gpio GPIOA13.
>> Led driver is probed early so the corresponding gpio is taken and
>> configured in output which fo
On 4/17/24 11:07, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:02, Patrice Chotard wrote:
>> Instead of using "st,fastboot-gpios" and "st,stm32prog-gpios", declare
>> 2 gpio-keys.
>>
>> Signed-off-by: Patrice Chotard
>> ---
On 4/17/24 11:07, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:01, Patrice Chotard wrote:
>> Remove "color" property from led-red node which is not supported
>> by U-Boot.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> arch
On 4/17/24 11:06, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:01, Patrice Chotard wrote:
>> led-red and button dedicated to fastboot share the same gpio GPIOA13.
>> led-blue and button dedicated to stm32prog share the same gpio GPIOA14.
>> Led driver is probed
On 4/17/24 11:05, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:01, Patrice Chotard wrote:
>> Instead of using gpio directly to detect key pressed on button
>> dedicated for fastboot and stm32mprog, make usage of BUTTON UCLASS.
>>
>> Signed-off-by: Patrice
On 4/17/24 11:06, Patrick DELAUNAY wrote:
> Hi
>
> On 4/9/24 17:01, Patrice Chotard wrote:
>> Add 2 gpio-keys :
>> _ button-user-1 for stm32prog mode activation.
>> _ update button-user's label (defined in kernel DT) to match label
>> requested in bo
On 4/18/24 13:48, Igor Opaniuk wrote:
> On Tue, Apr 9, 2024 at 5:05 PM Patrice Chotard
> wrote:
>>
>> Enable BUTTON_GPIO flag for STM32MP15.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> configs/stm32mp13_defconfig | 2 ++
>> 1 fi
On 4/17/24 11:04, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:01, Patrice Chotard wrote:
>> Enable BUTTON_GPIO flag for STM32MP15.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> configs/stm32mp15_basic_defconfig | 2 ++
>> 1 file
On 4/17/24 11:04, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:01, Patrice Chotard wrote:
>> Enable BUTTON_GPIO flag for STM32MP15.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> configs/stm32mp15_trusted_defconfig | 2 ++
>> 1 file
On 4/17/24 11:03, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/9/24 17:01, Patrice Chotard wrote:
>> Enable BUTTON_GPIO flag for STM32MP15.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> configs/stm32mp15_defconfig | 2 ++
>> 1 file
On 4/18/24 13:48, Igor Opaniuk wrote:
> On Tue, Apr 9, 2024 at 5:19 PM Patrice Chotard
> wrote:
>>
>> Enable FASTBOOT relative flags for stm32mp13_defconfig.
>>
>> Signed-off-by: Patrice Chotard
>>
>> ---
>>
>> configs/stm32mp13_defconfi
On 2/7/24 16:59, Igor Opaniuk wrote:
> On Wed, Feb 7, 2024 at 2:12 PM Patrick Delaunay
> wrote:
>>
>> This patch avoids compilation issue when CONFIG_USB_GADGET is deactivated
>> in defconfig, with undefined reference to run_usb_dnl_gadget and to
>> g_dnl_set_product.
>>
>> Signed-off-by:
On 3/4/24 19:25, Marek Vasut wrote:
> The OHCI HCD is mandatory for USB 1.1 FS/LS device support, enable it.
> This used to be enabled implicitly before, now that implicit dependency
> disappeared and this got disabled. Enable it manually.
>
> Signed-off-by: Marek Vasut
>
On 3/6/24 10:54, Christophe Kerello wrote:
> FMC2 IP supports up to 4 chip select. On MP1 SoC, only 2 of them are
> available when on MP25 SoC, the 4 chip select are available.
>
> Let's use a platform data structure for parameters that will differ.
>
> Signed-off-by: Christophe Kerello
>
On 3/6/24 10:50, Christophe Kerello wrote:
> The FMC2 revision 2 supports security and isolation compliant with
> the Resource Isolation Framework (RIF). From RIF point of view,
> the FMC2 is composed of several independent resources, listed below,
> which can be assigned to different security
On 3/6/24 10:50, Christophe Kerello wrote:
> Add the support of the revision 2 of FMC2 IP.
> - PCSCNTR register has been removed,
> - CFGR register has been added,
> - the bit used to enable the IP has moved from BCR1 to CFGR,
> - the timeout for CEx deassertion has moved
gt; /sys/power/suspend_stats/fail
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: u-b...@dh-electronics.com
> Cc: u-boot@lists.denx.de
> Cc: uboot-st...@st-md-mailman.stormreply.com
> ---
> V2: Rebase on u-boot/master
> ---
rch/arm/mach-stm32mp/Makefile .
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Igor Opaniuk
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: Simon Glass Cc: Simon Glass
> Cc: Tom Rini
> Cc: u-b...@dh-electronics.com
> Cc: uboot-st...@st-md-mailman.stormreply.com
> -
> Signed-off-by: Marek Vasut
> ---
> Cc: Igor Opaniuk
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> Cc: Simon Glass Cc: Simon Glass
> Cc: Tom Rini
> Cc: u-b...@dh-electronics.com
> Cc: uboot-st...@st-md-mailman.stormreply.com
> ---
> arch/arm/mach-s
On 4/8/24 17:52, Christophe ROULLIER wrote:
>> -Original Message-
>> From: Marek Vasut
>> Sent: Tuesday, March 26, 2024 1:08 PM
>> To:u-boot@lists.denx.de
>> Cc: Marek Vasut; Christophe
>> ROULLIER; Joe
>> Hershberger; Patrice CHOTARD -
&
On 4/8/24 17:50, Christophe ROULLIER wrote:
>> -Original Message-
>> From: Marek Vasut
>> Sent: Tuesday, March 26, 2024 1:08 PM
>> To:u-boot@lists.denx.de
>> Cc: Christophe ROULLIER; Marek
>> Vasut; Joe Hershberger; Patrice
>> CHOTARD
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