RE: [PATCH] ls1028a: fix EFI boot

Hello Yousaf > -Original Message- > From: U-Boot On Behalf Of Mian Yousaf > Kaukab > Sent: Tuesday, July 21, 2020 8:04 PM > To: u-boot@lists.denx.de; Rajesh Bhagat ; > harninder@nxp.com; sudhanshu.gu...@nxp.com > Cc: prabhakar.kushw...@nxp.com; Andy Tang ; Priyanka > Jain ; Mian

Re: [U-Boot] Boot Linux using EFI environment from u-boot

Thanks Bin, > -Original Message- > From: Bin Meng > Sent: Wednesday, July 10, 2019 9:43 AM > To: Poonam Aggrwal > Cc: Alexander Graf ; u-boot@lists.denx.de > Subject: Re: [U-Boot] Boot Linux using EFI environment from u-boot > > On Wed, Jul 10, 2019 at 12:09 PM

Re: [U-Boot] Boot Linux using EFI environment from u-boot

Corrected the email address of Alex. > -Original Message- > From: U-Boot On Behalf Of Poonam > Aggrwal > Sent: Wednesday, July 10, 2019 9:37 AM > To: Alexander Graf > Cc: u-boot@lists.denx.de > Subject: [U-Boot] Boot Linux using EFI environment from u-boot >

[U-Boot] Boot Linux using EFI environment from u-boot

Hello Alex I am not sure, but it seems it is possible to boot Linux from u-boot using EFI environment. So what I intend to do is that without using UEFI , if I can boot Linux and make EFI variables available for Linux. Can you please help me on how I can use this configuration. Many Thanks

Re: [U-Boot] [PATCH] armv8: lx2160a: Modify dspi1 controller intrrupts property

> -Original Message- > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Chuanhua > Han > Sent: Friday, November 23, 2018 2:08 PM > To: u-boot@lists.denx.de > Cc: Chuanhua Han > Subject: [U-Boot] [PATCH] armv8: lx2160a: Modify dspi1 controller intrrupts > property > >

Re: [U-Boot] [PATCH][v2] armv8: lx2160ardb : Add support for LX2160ARDB platform

> -Original Message- > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Priyanka > Jain > Sent: Monday, October 29, 2018 3:01 PM > To: u-boot@lists.denx.de; York Sun > Cc: Priyanka Jain ; Pankit Garg > ; Wasim Khan ; Sriram Dash > > Subject: [U-Boot] [PATCH][v2] armv8:

Re: [U-Boot] [PATCH 1/2] powerpc: t1040: Correct RCW MAC2_GMII_SEL value

Hello Bin, > -Original Message- > From: Bin Meng [mailto:bmeng...@gmail.com] > Sent: Monday, October 22, 2018 9:41 AM > To: Poonam Aggrwal > Cc: York Sun ; U-Boot Mailing List > Subject: Re: [PATCH 1/2] powerpc: t1040: Correct RCW MAC2_GMII_SEL value > > Hi Poo

Re: [U-Boot] [PATCH 1/2] powerpc: t1040: Correct RCW MAC2_GMII_SEL value

> -Original Message- > From: Bin Meng [mailto:bmeng...@gmail.com] > Sent: Monday, October 22, 2018 7:41 AM > To: York Sun > Cc: Poonam Aggrwal ; U-Boot Mailing List b...@lists.denx.de> > Subject: Re: [PATCH 1/2] powerpc: t1040: Correct RCW MAC2_GMII_SEL value >

Re: [U-Boot] [PATCH 7/9] armv8: fsl-lsch2: configure pfe's scfg & dcfg registers

Hello Calvin Please find few comments inline. Regards Poonam > -Original Message- > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Calvin > Johnson > Sent: Monday, October 09, 2017 2:42 PM > To: u-boot@lists.denx.de > Cc: joe.hershber...@ni.com; Anji Jagarlmudi

Re: [U-Boot] [PATCH 8/9] fsl: csu: enable ns access for PFE

Hello Calvin, Minor comments below. Regards Poonam > -Original Message- > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Calvin > Johnson > Sent: Monday, October 09, 2017 2:42 PM > To: u-boot@lists.denx.de > Cc: joe.hershber...@ni.com; Anji Jagarlmudi

Re: [U-Boot] [PATCH v2] board: freescale: ls1012a: LS1012A-2G5RDB board support

Hello Bhaskar Please find feedback below. Regards Poonam > -Original Message- > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Bhaskar > Upadhaya > Sent: Tuesday, November 21, 2017 2:56 PM > To: u-boot@lists.denx.de > Cc: Bhaskar Upadhaya >

Re: [U-Boot] [PATCH 1/1] board/ls2080ardb: Remove CONFIG_DISPLAY_BOARDINFO_LATE

-Original Message- From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Prabhakar Kushwaha Sent: Friday, August 18, 2017 3:53 PM To: Santan Kumar ; u-boot@lists.denx.de; York Sun Cc: Priyanka Jain Subject: Re:

Re: [U-Boot] [PATCH] ARMv8/sec_firmware : Update chosen/kaslr-seed

-Original Message- From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Ruchika Gupta Sent: Saturday, May 13, 2017 5:37 AM To: u-boot@lists.denx.de; sun.y...@nxp.com; Prabhakar Kushwaha Cc: Ruchika Gupta Subject: [U-Boot]

[U-Boot] ums command using dwc3

Hello Marek Vasut I am working on u-boot 2016.01. Using a platform with DWC3 USB 3.0 controller. My objective is to configure the USB in device mode and it gets exposed to an X86 as a USB mass storage. The memory exposed would be a SATA disk. Is it possible to do it via ums command? I gave it

[U-Boot] [PATCH]powerpc/B4420: Fixed incomplete handling for 0x9d serdes2

Crossbars and IDT were not getting configured for Serdes2 protocol 0x9d for B4420. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Shaveta Leekha shav...@freescale.com --- board/freescale/b4860qds/b4860qds.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions

[U-Boot] [PATCH] 85xx/b4860: Alternate serdes protocols for B4860/B4420

; the only difference being LC VCO rather than Ring VCO. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com --- arch/powerpc/cpu/mpc85xx/b4860_serdes.c | 29 + board/freescale/b4860qds/b4860qds.c |2

[U-Boot] [PATCH][v0] powerpc/mpc85xx: Update LIODNs for T1040

Removed LIODNs for RMAN, RIO, 10G. T1040 has 10 QMAN portals so assigned LIODNs accordingly. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- arch/powerpc/cpu/mpc85xx/t1040_ids.c | 36 -- 1 files changed, 0 insertions(+), 36 deletions(-) diff

[U-Boot] [PATCH 01/09] powerpc/mpc85xx: Few updates for B4860 cpu changes

...@freescale.com Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com Signed-off-by: Sandeep Singh sand...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- Changes in v2: Added Shaveta's, York's, Sandeep's and Prabhakar's signoff. arch/powerpc/cpu/mpc85xx/b4860_serdes.c | 15

[U-Boot] [PATCH 02/09] powerpc/mpc85xx:Add support of B4420 SoC

cores: 1 cluster with 2 e6500 cores 2. Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster. 3. Single DDRC 4. 2X 4 lane serdes 5. 3 SGMII interfaces 6. no sRIO 7. no 10G Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr

[U-Boot] [PATCH 03/09] board/freescale/common:Add support of QTAG register

-by: York Sun york...@freescale.com Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- board/freescale/common/qixis.c | 46 board/freescale/common/qixis.h |3 ++ 2 files changed, 49

[U-Boot] [PATCH 04/09] powerpc/mpc85xx:Fix Core cluster configuration loop

DCFG_CCSR_TP_CLUSTER register of orignal SoC which may not be valid for the personality. So add initiator type check to find valid cluster. Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- arch/powerpc/cpu/mpc85xx/cpu_init.c

[U-Boot] [PATCH 06/09] powerpc/qixis: enable qixis dump command and add switch dumping command

are available. Signed-off-by: York Sun york...@freescale.com Signed-off-by: Shaveta Leekha shav...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- board/freescale/common/qixis.c | 47 +-- board/freescale/common/qixis.h |1 + 2 files

[U-Boot] [PATCH 07/09] powerpc/b4860qds: Add support to dump switch settings on b4860qds board

From: Shaveta Leekha shav...@freescale.com This function is called by qixis_reset switch command and switch settings are calculated from FPGA/qixis registers. Signed-off-by: York Sun york...@freescale.com Signed-off-by: Shaveta Leekha shav...@freescale.com Signed-off-by: Poonam Aggrwal

[U-Boot] [PATCH 08/09] powerpc/t4240qds: Add support to dump switch settings on t4240qds board

From: Shaveta Leekha shav...@freescale.com This function is called by qixis_reset switch command and switch settings are calculated from qixis FPGA registers. Signed-off-by: York Sun york...@freescale.com Signed-off-by: Shaveta Leekha shav...@freescale.com Signed-off-by: Poonam Aggrwal

[U-Boot] [PATCH 09/09] powerpc/t4240qds: Print FPGA detail version

...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- board/freescale/t4qds/t4qds.c | 11 +-- 1 files changed, 9 insertions(+), 2 deletions(-) diff --git a/board/freescale/t4qds/t4qds.c b/board/freescale/t4qds/t4qds.c index ac1ce62..c2a4cef 100644 --- a/board/freescale

[U-Boot] [PATCH 01/09] powerpc/mpc85xx: Few updates for B4860 cpu changes

...@freescale.com Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com Signed-off-by: Sandeep Singh sand...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- Changes in v2: Added Shaveta's, York's, Sandeep's and Prabhakar's signoff. arch/powerpc/cpu/mpc85xx/b4860_serdes.c | 15

[U-Boot] [PATCH 03/09] board/freescale/common:Add support of QTAG register

-by: York Sun york...@freescale.com Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- board/freescale/common/qixis.c | 46 board/freescale/common/qixis.h |3 ++ 2 files changed, 49

[U-Boot] [PATCH 04/09] powerpc/mpc85xx:Fix Core cluster configuration loop

DCFG_CCSR_TP_CLUSTER register of orignal SoC which may not be valid for the personality. So add initiator type check to find valid cluster. Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- arch/powerpc/cpu/mpc85xx/cpu_init.c

[U-Boot] [PATCH 02/09] powerpc/mpc85xx:Add support of B4420 SoC

cores: 1 cluster with 2 e6500 cores 2. Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster. 3. Single DDRC 4. 2X 4 lane serdes 5. 3 SGMII interfaces 6. no sRIO 7. no 10G Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr

[U-Boot] [PATCH 06/09] powerpc/qixis: enable qixis dump command and add switch dumping command

are available. Signed-off-by: York Sun york...@freescale.com Signed-off-by: Shaveta Leekha shav...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- board/freescale/common/qixis.c | 47 +-- board/freescale/common/qixis.h |1 + 2 files

[U-Boot] [PATCH 07/09] powerpc/b4860qds: Add support to dump switch settings on b4860qds board

From: Shaveta Leekha shav...@freescale.com This function is called by qixis_reset switch command and switch settings are calculated from FPGA/qixis registers. Signed-off-by: York Sun york...@freescale.com Signed-off-by: Shaveta Leekha shav...@freescale.com Signed-off-by: Poonam Aggrwal

[U-Boot] [PATCH 08/09] powerpc/t4240qds: Add support to dump switch settings on t4240qds board

From: Shaveta Leekha shav...@freescale.com This function is called by qixis_reset switch command and switch settings are calculated from qixis FPGA registers. Signed-off-by: York Sun york...@freescale.com Signed-off-by: Shaveta Leekha shav...@freescale.com Signed-off-by: Poonam Aggrwal

[U-Boot] [PATCH 09/09] powerpc/t4240qds: Print FPGA detail version

...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- board/freescale/t4qds/t4qds.c | 11 +-- 1 files changed, 9 insertions(+), 2 deletions(-) diff --git a/board/freescale/t4qds/t4qds.c b/board/freescale/t4qds/t4qds.c index ac1ce62..c2a4cef 100644 --- a/board/freescale

[U-Boot] [PATCH] fsl_ifc:Fixed a bug in the erratum handling code for IFC_A003399

Wrong pointer was being used to copy code into L2SRAM. Also removed the unreferenced variable l2srbar. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- Thanks Wolfgang and Kumar for identifying the issue. arch/powerpc/cpu/mpc85xx/cpu_init_early.c |4 ++-- 1 files changed, 2

[U-Boot] [PATCH]powerpc/qoriq: Use BR_PHYS_ADDR macro to setup BRs on P1_P2_RDB

Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- Based of: git://git.am.freescale.net/mirrors/u-boot.git (branch, master) include/configs/P1_P2_RDB.h |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/include/configs/P1_P2_RDB.h b/include/configs

[U-Boot] [PATCH]fsl_ddr: Adds 16 bit DDR Data width option

Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Cc: York Sun york...@freescale.com --- P1014 processor supports maximum 16bit DDR data width. Based of: git://git.am.freescale.net/mirrors/u-boot.git (branch, master) arch/powerpc/cpu/mpc8xxx/ddr/util.c |4 +++- arch/powerpc

[U-Boot] [PATCH][updated][85xx/p1_p2_rdb] PCIe E1000 card support added.

Enables the Intel Pro/1000 PT Gb Ethernet PCI-E Network Adapter configuration support for P1/P2 RDB. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- include/configs/P1_P2_RDB.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/P1_P2_RDB.h b

[U-Boot] [PATCH] eSPI and Intel E1000 support for P1/P2 RDB

This patch enables the eSPI configuration to use the Spansion Flash on P1 and P2 RDB Platforms This also enables the Intel Pro/1000 PT Gb Ethernet PCI-E Network Adapter configuration support Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- include/configs/P1_P2_RDB.h | 15

[U-Boot] [PATCH] 85xx/p1_p2_rdb: enable hwconfig

Signed-off-by: Vivek Mahajan vivek.maha...@freescale.com --- include/configs/P1_P2_RDB.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 612c669..de8e60b 100644 --- a/include/configs/P1_P2_RDB.h +++

[U-Boot] [PATCH] [Bugfix] 85xx/p1_p2_rdb: not able to modify $bootfile environment variable

Because the variable was getting defined twice. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- include/configs/P1_P2_RDB.h |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 4f72f36..02e5281

[U-Boot] [PATCH][RESEND] 85xx/p1_p2_rdb: Added RevD board support.

- Removed RevB, as it was a development stage board. - From now only RevC and RevD will be supported. Signed-off-by: Dipen Dudhat dipen.dud...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- board/freescale/p1_p2_rdb/p1_p2_rdb.c | 25

[U-Boot] [PATCH] 85xx/p1_p2_rdb: Added RevD board support.

Signed-off-by: Dipen Dudhat dipen.dud...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- board/freescale/p1_p2_rdb/p1_p2_rdb.c | 25 - 1 files changed, 8 insertions(+), 17 deletions(-) diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b

[U-Boot] [PATCH][v1] 85xx/p1_p2_rdb: Added RevD board version support

- Also modified the code to use io accessors. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Dipen Dudhat dipen.dud...@freescale.com --- Incorporated Wolfgang's comments on earlier patch board/freescale/p1_p2_rdb/p1_p2_rdb.c | 16 +--- 1 files changed

[U-Boot] [PATCH]85xx/p1_p2rdb: Bug Fix: Crash while configuring 32 bit DDR i/f for P1020RDB.

The data being modified was in NOR flash which caused the crash. file-board/freescale/p1_p2_rdb/ddr.c function-fixed_sdram() Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- board/freescale/p1_p2_rdb/ddr.c | 16

[U-Boot] [PATCH]85xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data rate

Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- board/freescale/p1_p2_rdb/ddr.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/p1_p2_rdb/ddr.c b/board/freescale/p1_p2_rdb/ddr.c index

[U-Boot] [PATCH][v1] ppc/85xx: 32bit DDR changes for P1020/P1011

the hardcodings for platforms with onboard memories and try to use the FSL SPD code for DDR initialization. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- based of git://git.am.freescale.net/mirrors/u-boot.git board/freescale/p1_p2_rdb/ddr.c | 29 - 1

[U-Boot] [PATCH][v1] ppc/85xx/86xx: Bug fix: call to puts in probecpu() moved to checkcpu().

While in probecpu() UART is still not initialized. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Acked-by: Kumar Gala ga...@kernel.crashing.org --- applies on git.am.freescale.net/mirrors/u-boot.git cpu/mpc85xx/cpu.c |4 cpu/mpc86xx/cpu.c |6 ++ cpu/mpc8xxx/cpu.c

[U-Boot] [PATCH][v2] ppc/85xx,86xx: Handling Unknown SOC version

Incase the system is detected with Unknown SVR, let the system boot with a default value and a proper message. Now with dynamic detection of SOC properties from SVR, this is necessary to prevent a crash. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga

[U-Boot] [PATCH][v1] ppc/85x/86xxx: Device tree fixup for number of cores

-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- applies on git.am.freescale.net/mirrors/u-boot.git cpu/mpc85xx/fdt.c|2 + cpu/mpc86xx/fdt.c|3 ++ cpu/mpc8xxx/Makefile |1 + cpu/mpc8xxx/fdt.c| 55

[U-Boot] [PATCH][v1] ppc/85xx,86xx: Handling Unknown SOC version

Incase the system is detected with Unknown SVR, let the system boot with a default value and a proper message. Now with dynamic detection of SOC properties from SVR, this is necessary to prevent a crash. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga

[U-Boot] [PATCH] ppc/85xx: Added CONFIG_MAX_CPUS for P1020

Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- applies on http://git.denx.de/u-boot-mpc85xx.git branch-next include/asm-ppc/config.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/asm-ppc

[U-Boot] [PATCH] ppc/85xx: P1020RDB Support Added

Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- applies on http://git.denx.de/u-boot-mpc85xx.git branch-next Makefile |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/Makefile b/Makefile index f92ef30

[U-Boot] [PATCH] ppc/85xx: Added single core members of FSL P1 P2 processors series

P2010 - single core variant of P2020 P1011 - Single core variant of P1020 Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- - applies on git.denx.de/u-boot-mpc85xx.git branch-next cpu/mpc85xx/Makefile|2 ++ cpu

[U-Boot] [PATCH] ppc/85xx: Added support for P1011RDB and P2010RDB

P2010 and P1011 are single core variants of P2020 and P1010 respectively. The board(RDB) will be same. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- applies on http://git.denx.de/u-boot-mpc85xx.git branch-next Makefile | 10

[U-Boot] [PATCH] driver/fsl_pci: Added fsl_pci_init_port function to initialize a single PCIe port.

. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- - applies on git.denx.de/u-boot-mpc85xx.git branch-next drivers/pci/fsl_pci_init.c | 41 + include/asm-ppc/fsl_pci.h | 26

[U-Boot] [PATCH] ppc/85xx: Added PCIe support for P1 P2 RDB

* Added PCIe support for P1 P2 RDB * Calls the fsl_pci_init_port function to initialize all the PCIe ports on the board. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- - applies on git.denx.de/u-boot-mpc85xx.git branch-next

[U-Boot] [v2][PATCH] ppc/85xx: Added single core members of FSL P1 P2 processors series

P2010 - single core variant of P2020 P1011 - Single core variant of P1020 - Also made changes to keep the lists sorted. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- - applies on git.denx.de/u-boot-mpc85xx.git branch-next

[U-Boot] [PATCH 2/2] ppc/85xx: Added PCIe support for P1 P2 RDB

* Added PCIe support for P1 P2 RDB * Calls the fsl_pci_init_port function to initialize all the PCIe ports on the board. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- - applies on git.denx.de/u-boot-mpc85xx.git branch-next

[U-Boot] [PATCH 1/2] driver/fsl_pci: Added fsl_pci_init_port function to initialize a single PCIe port.

. * All the FSL 85xx boards can use it for PCIe initialization. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- - applies on git.denx.de/u-boot-mpc85xx.git branch-next - next patch following it makes use of this patch for PCIe

[U-Boot] [PATCH] P2020RDB Support Added

The code base adds P1 P2 RDB platforms support. The folder and file names can cater to future SOCs of P1/P2 family. P1 P2 processors are 85xx platforms, part of Freescale QorIQ series. Tested following on P2020RDB: 1. eTSECs 2. DDR, NAND, NOR, I2C. Signed-off-by: Poonam Aggrwal poonam.aggr

[U-Boot] [PATCH v2] P2020RDB Platform suppport added

the following on P2020RDB: 1. eTSECs(1/2/3) 2. DDR, NAND, NOR, I2C, PCIe, etc Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- -Based of u-boot version 2009.08-rc1 -Incorporated comments of Wolfgang and Kumar Gala. -get_mem_size has not been because the board has onboard fixed memory

[U-Boot] [v2][PATCH 1/2]Refactored common cpu specific code for 85xx/86xx into one file.

Removed same code pieces from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c and moved to cpu/mpc8xxx/cpu.c(new file) Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- - based of u-boot version 2009.08-rc1 - Changes over v1: Incorporated Wolfgang's comments Makefile |2

[U-Boot] [v2][PATCH 2/2] Removed CONFIG_NUM_CPUS from 85xx/86xx

messages. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- - based of 2009.08-rc1 - depends on the patch [PATCH 1/2] Refactored common cpu specific code for 85xx and 86xx into one file. - Changes over v1: Incorporated Wolfgang's comments common/cmd_mp.c |6

[U-Boot] [v2][PATCH] Added P1020 Processor Support.

capabilities. Also the SOC is pin compatible with P2020 Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- - based of 2009.08-rc1 - depends on the patch [PATCH 1/2] Refactored common cpu specific code for 85xx and 86xx into one file. - Changes over v1: Incorporated Wolfgang's comments

[U-Boot] [PATCH] Added P1020 Processor Support.

compatible with P2020 Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- - based of 2009.08-rc1 - depends on the patch [PATCH] Refactored common cpu specific code for 85xx and 86xx into one file. cpu/mpc85xx/Makefile|1 + cpu/mpc8xxx/cpu.c |2 ++ drivers/misc

[U-Boot] [PATCH 1/2]Refactored common cpu specific code for 85xx/86xx into one file.

Removed same code pieces from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c and moved to cpu/mpc8xxx/cpu.c(new file) Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- based on u-boot version 2009.06 Makefile |2 + cpu/mpc85xx/cpu.c| 70

[U-Boot] [PATCH 2/2]Removed CONFIG_NUM_CPUS for 85xx/86xx Freescale processors.

messages. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- changes over previous version: Incorporated Wolfgang's comments based on version 2009.06 common/cmd_mp.c |6 +- cpu/mpc85xx/cpu.c | 21 - cpu/mpc85xx/mp.c |6

[U-Boot] [PATCH 1/2] Removed CONFIG_NUM_CPUS for 85xx and 86xx Freescale processors.

Copyright messages. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- common/cmd_mp.c |6 +- cpu/mpc85xx/cpu.c | 111 ++--- cpu/mpc85xx/mp.c |6 +- cpu/mpc85xx/release.S | 25 +- cpu/mpc85xx

[U-Boot] [PATCH 1/5]P2020RDB Adds GPIO registers to MPC85xx Memory Map.

Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- include/asm-ppc/immap_85xx.h | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index db2bdf0..0efef05 100644 --- a/include/asm-ppc

[U-Boot] [PATCH 2/5]P2020RDB Second UART port added for MPC85xx, MPC83xx, MPC86xx processors

Defining the next two configs allows to switch the serial port from the console using the setenv stdin and stdout 1. #define CONFIG_SERIAL_MULTI 1 /* Enable both serial ports */ 2. #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */ Signed-off-by: Poonam Aggrwal

[U-Boot] [PATCH 3/5]P2020RDB Added support of Vitesse PHYs VSC8641(RGMII) and VSC8221(SGMII)

These PHYs are on P2020RDB platform. Also revamped Freescale copyright message in drivers/net/tsec.c. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com --- drivers/net/tsec.c | 52 +++- 1 files changed, 51 insertions(+), 1 deletions

[U-Boot] [PATCH 4/5]P2020RDB Removed CONFIG_NUM_CPUS for 85xx processor series.

Instead the num of cores is determined dynamically by reading the SVR values. This can help to use the same u-boot image across the platforms. Added CONFIG_MAX_CPUS value 8. Also revamped and corrected few Freescale Copyright messages. Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com

[U-Boot] [PATCH 5/5] P2020RDB Platform support added.

The code base is generic to add more P1_P2 RDB platforms support as and when required. The folder and file names are such that they can cater to future SOCs of P1/P2 family. Tested the following on P2020RDB: 1. eTSECs(1/2/3) 2. DDR, NAND, NOR, I2C etc Signed-off-by: Poonam Aggrwal poonam.aggr