From: Stefan Agner <stefan.ag...@toradex.com>
Remove legancy I2C config and code in favor of upcomming DM/DT
enable I2C support.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
board/toradex/colibri_imx7/colibri_imx7.c | 40 ---
inc
On 2016-10-04 06:02, Stefano Babic wrote:
> Hi Stefan,
>
> On 29/08/2016 02:00, Stefan Agner wrote:
>>>
>>> I have applied it, I just noted a slight drawback because this breaks
>>> boards that do not have CONFIG_FIT set.
>>
>> Hm, maybe due to
On 2016-10-05 08:53, Stephen Warren wrote:
> On 10/03/2016 02:27 PM, Stefan Agner wrote:
>> On 03.10.2016 10:28, Stephen Warren wrote:
>>> On 09/30/2016 04:00 AM, Marcel Ziswiler wrote:
>>>> On Wed, 2016-09-28 at 12:00 -0600, Stephen Warren wrote:
>>>>
Hi Stefano,
On 2016-08-26 06:25, Stefano Babic wrote:
> Hi Stefan,
>
> On 26/07/2016 08:22, Stefan Agner wrote:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> This patchset adds device tree support for Colibri iMX7S/iMX7D.
>> It is the first devic
On 03.10.2016 10:28, Stephen Warren wrote:
> On 09/30/2016 04:00 AM, Marcel Ziswiler wrote:
>> On Wed, 2016-09-28 at 12:00 -0600, Stephen Warren wrote:
>>> On 09/28/2016 03:35 AM, Marcel Ziswiler wrote:
Avoid a checkboard() name clash with our upcoming custom
implementation
On 28.09.2016 02:35, Marcel Ziswiler wrote:
> Add Toradex factory configuration block handling. The config block is a
> data structure which gets stored to flash during production testing. The
> structure holds such information as board resp. hardware revision,
> product ID and serial number
From: Stefan Agner <stefan.ag...@toradex.com>
Currently the bmode "usb" uses BOOT_CFG1 to 0x01, -which means
BOOT_CFG1[7:4] is set to b. According to Table 8-7 Boot
Device Selection this is NOR/OneNAND and not Reserved.
Use 0x10 which leads to b0001, which is a Rese
ed about the length of the buffer, but szwritebuf is forced to
be a multiple of the device block size, which is typically quite a bit
bigger than a cache line, so I think we are fine there.
Reviewed-by: Stefan Agner <stefan.ag...@toradex.com>
--
Stefan
___
U-Boot mailing list
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On 2016-08-26 07:10, Stefano Babic wrote:
> On 26/07/2016 08:22, Stefan Agner wrote:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> Support instatiation through device tree. Also parse the fsl,dte-mode
>> property to determine whether DTE mode shall be
On 2016-08-27 15:39, Clemens Gruber wrote:
> When using gzwrite to eMMC on an i.MX6Q board, the following warning
> occurs repeatedly:
> CACHE: Misaligned operation at range [4fd63318, 4fe63318]
>
> I tried to cache-line align the start and end parameter for
> flush_dcache_range in
On 2016-08-14 13:06, Tom Rini wrote:
> On Tue, Aug 02, 2016 at 12:20:28AM -0700, Stefan Agner wrote:
>
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> Flush loaded data cacheline aligned. This avoids warnings such as
>> CACHE: Misaligned operation at ran
From: Stefan Agner <stefan.ag...@toradex.com>
Add LPAE support for mmu_set_region_dcache_behaviour. The function
is in use in some LPAE capable board such TI DRA7xx or NXP i.MX 7.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
Changes in v5:
- Add this LPAE enab
From: Stefan Agner <stefan.ag...@toradex.com>
The page table is maintained by the CPU, hence it is safe to always
align cache flush to a whole cache line size. This allows to use
mmu_page_table_flush for a single page table, e.g. when configure
only small regions t
On 2016-08-14 13:01, Tom Rini wrote:
> On Mon, Aug 08, 2016 at 12:43:03AM -0700, Stefan Agner wrote:
>> On 2016-08-07 23:10, Lokesh Vutla wrote:
>> > Hi,
>> >
>> > On Sunday 07 August 2016 11:13 PM, Stefan Agner wrote:
>> >> From: Stefan Agner <s
Hi All,
Just learn the hard way that avoiding relocation (using
fdt_high=0x and initrd_high=0x) can be rather dangerous.
My setup: Linux Kernel, Device Tree plus SquashFS used via RAM block
device (BLK_DEV_RAM).
Downloading the files individually worked, so I knew my setup is
t see any value supporting unaligned environment, so FWIW:
Acked-by: Stefan Agner <stefan.ag...@toradex.com>
Small nit below:
>
> Signed-off-by: Andreas Fenkart <andreas.fenk...@digitalstrom.com>
> ---
> tools/env/fw_env.c | 12
> 1 file changed, 12 ins
On 2016-08-07 23:10, Lokesh Vutla wrote:
> Hi,
>
> On Sunday 07 August 2016 11:13 PM, Stefan Agner wrote:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> The page table is maintained by the CPU, hence it is safe to always
>> align cache flush to a wh
On 2016-08-07 23:15, maitysancha...@gmail.com wrote:
> Hello,
>
> On 16-08-03 17:13:11, Marek Vasut wrote:
>> On 08/03/2016 01:58 PM, Sanchayan Maity wrote:
>> > Add driver model support for Vybrid USB driver.
>> >
>> > Signed-off-by: Sanchayan Maity
>>
>> CCing Lukasz.
From: Stefan Agner <stefan.ag...@toradex.com>
The page table is maintained by the CPU, hence it is safe to always
align cache flush to a whole cache line size. This allows to use
mmu_page_table_flush for a single page table, e.g. when configure
only small regions t
On 2016-08-04 10:46, Tom Rini wrote:
> On Wed, Aug 03, 2016 at 07:43:24PM -0700, Stefan Agner wrote:
>> On 2016-08-03 16:18, Joe Hershberger wrote:
>> > On Tue, Aug 2, 2016 at 2:20 AM, Stefan Agner <ste...@agner.ch> wrote:
>> >> From: Stefan Agner <stef
On 2016-08-07 10:29, Andreas Färber wrote:
> Am 07.08.2016 um 19:17 schrieb Stefan Agner:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> The page table is maintained by the CPU, hence it is safe to always
>> align cache flush to a whole ca
From: Stefan Agner <stefan.ag...@toradex.com>
The page table is maintained by the CPU, hence it is safe to always
align cache flush to a whole cache line size. This allows to use
mmu_page_table_flush for a single page table, e.g. when configure
only small regions t
On 2016-08-04 09:14, Joe Hershberger wrote:
> Hi Simon,
>
> On Wed, Aug 3, 2016 at 8:17 PM, Simon Glass <s...@chromium.org> wrote:
>> Hi Joe,
>>
>> On 3 August 2016 at 17:18, Joe Hershberger <joe.hershber...@gmail.com> wrote:
>>> On Tue, Aug 2
From: Stefan Agner <stefan.ag...@toradex.com>
The page table is maintained by the CPU, hence it is safe to always
align cache flush to a whole cache line size. This allows to use
mmu_page_table_flush for a single page table, e.g. when configure
only small regions t
On 2016-08-03 16:18, Joe Hershberger wrote:
> On Tue, Aug 2, 2016 at 2:20 AM, Stefan Agner <ste...@agner.ch> wrote:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> Flush loaded data cacheline aligned. This avoids warnings such as
>> CACHE: Misaligned
On 2016-08-03 18:22, Simon Glass wrote:
> Hi,
>
> On 3 August 2016 at 10:32, Fabio Estevam <feste...@gmail.com> wrote:
>> On Tue, Aug 2, 2016 at 4:07 AM, Stefan Agner <ste...@agner.ch> wrote:
>>> From: Stefan Agner <stefan.ag...@toradex.com>
>>>
From: Stefan Agner <stefan.ag...@toradex.com>
Flush operations need to be cacheline aligned to take effect, make
sure to flush always complete cachelines. This avoids messages such
as:
CACHE: Misaligned operation at range [0090, 009004d9]
Signed-off-by: Stefan Agner <stefan.ag...@to
On 2016-08-03 12:08, Simon Glass wrote:
> Hi Fabio,
>
> On 3 August 2016 at 12:44, Fabio Estevam wrote:
>> Hi Simon,
>>
>> On Wed, Aug 3, 2016 at 3:35 PM, Simon Glass wrote:
>>
>>> Actually I think these are bugs and should be fixed. In this case,
>>> from
On 2016-08-03 11:44, Fabio Estevam wrote:
> Hi Simon,
>
> On Wed, Aug 3, 2016 at 3:35 PM, Simon Glass wrote:
>
>> Actually I think these are bugs and should be fixed. In this case,
I am completely with you Simon!
check_cache_range return 0, which actually leads to the cache
On 2016-08-03 06:51, Fabio Estevam wrote:
> On Tue, Aug 2, 2016 at 3:55 AM, Stefan Agner <ste...@agner.ch> wrote:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> Currently the command buffer gets allocated with a size of 32 bytes.
>> This causes warni
On 2016-08-02 10:55, Marek Vasut wrote:
> On 08/02/2016 07:01 PM, Stefan Agner wrote:
>> On 2016-08-02 08:56, Marek Vasut wrote:
>>> On 08/02/2016 05:47 PM, Stefan Agner wrote:
>>>> On 2016-08-02 02:38, Marek Vasut wrote:
>>>>> On 08/02/2016 09:07 AM,
On 2016-08-02 08:56, Marek Vasut wrote:
> On 08/02/2016 05:47 PM, Stefan Agner wrote:
>> On 2016-08-02 02:38, Marek Vasut wrote:
>>> On 08/02/2016 09:07 AM, Stefan Agner wrote:
>>>> From: Stefan Agner <stefan.ag...@toradex.com>
>>>>
>>>&g
On 2016-08-02 02:38, Marek Vasut wrote:
> On 08/02/2016 09:07 AM, Stefan Agner wrote:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> The page table is maintained by the CPU, hence it is safe to always
>> align cache flush to a whole ca
From: Stefan Agner <stefan.ag...@toradex.com>
Flush loaded data cacheline aligned. This avoids warnings such as
CACHE: Misaligned operation at range [8100, 816d0fa8]
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
Why do we actually have to flush caches after lo
From: Stefan Agner <stefan.ag...@toradex.com>
The page table is maintained by the CPU, hence it is safe to always
align cache flush to a whole cache line size. This allows to use
mmu_page_table_flush for a single page table, e.g. when configure
only small regions t
From: Stefan Agner <stefan.ag...@toradex.com>
Currently the command buffer gets allocated with a size of 32 bytes.
This causes warning messages on systems with cache lines bigger than
32 bytes:
CACHE: Misaligned operation at range [9df17a00, 9df17a20]
Define command buffer to be at le
From: Stefan Agner <stefan.ag...@toradex.com>
This patchset adds device tree support for Colibri iMX7S/iMX7D.
It is the first device tree enabled board for any i.MX 7 SoC
hence the patchset adds some common infrastructure:
- Add device tree support for serial_mxc.
- imx7.dtsi - I de
From: Stefan Agner <stefan.ag...@toradex.com>
Add pinctrl defines for NXP i.MX 7Solo/7Dual SoC. The pinctrl format
is compatible to the Linux kernel, hence this file is a simple copy
from the Linux kernel (commit 97f5c1817b7e).
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
From: Stefan Agner <stefan.ag...@toradex.com>
Use the external PMIC Ricoh RN5T567 to reliably restart the system.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
board/toradex/colibri_imx7/colibri_imx7.c | 42 +++
1 file changed, 42 inserti
From: Stefan Agner <stefan.ag...@toradex.com>
Enable device tree configuration and specify default device tree
for Toradex Colibri iMX7. Also configure CONFIG_CUSTOM_BOARDINFO
to avoid that board info get printed twice (once from the device
tree and one from the runtime detection in
From: Stefan Agner <stefan.ag...@toradex.com>
Add base device for NXP i.MX 7Solo/7Dual. The two SoC are very
similar and hence can share the same device tree for boot loaders
purpose.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
Reviewed-by: Simon Glass <s...@chromium.
From: Stefan Agner <stefan.ag...@toradex.com>
Add device tree node for Ricoh RN5T567. Currently we do not need
the individual DC/DC converters or LDO's (and they are also not
yet supported by the driver).
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
arch/arm/dts/imx7
From: Stefan Agner <stefan.ag...@toradex.com>
Add device model enabled PMIC driver for Ricoh RN5T567 PMIC used
on Colibri iMX7.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---
doc/device-tree-bindings/pmic/rn5t567.txt |
From: Stefan Agner <stefan.ag...@toradex.com>
Remove legancy I2C config and code in favor of upcomming DM/DT
enable I2C support.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
board/toradex/colibri_imx7/colibri_imx7.c | 40 ---
inc
From: Stefan Agner <stefan.ag...@toradex.com>
We now use device tree to provide SoC data to the UART driver, there
is no need for the legancy UART platform data.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
board/toradex/colibri_imx7/colibri_imx7.c | 10 --
1
From: Stefan Agner <stefan.ag...@toradex.com>
It is not usual that drivers announce when they have been initialized.
use dev_dbg to announce device initialization.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---
d
From: Stefan Agner <stefan.ag...@toradex.com>
Support instatiation through device tree. Also parse the fsl,dte-mode
property to determine whether DTE mode shall be used.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---
Hi Simon,
On 2016-07-31 18:01, Simon Glass wrote:
> On 26 July 2016 at 00:22, Stefan Agner <ste...@agner.ch> wrote:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> Support instatiation through device tree. Also parse the fsl,dte-mode
>> property to d
Hi Max,
On 2016-07-26 02:31, Max Krummenacher wrote:
> Hi Stefan
>
>> From: Stefan Agner [mailto:ste...@agner.ch]
>> Sent: Dienstag, 26. Juli 2016 07:58
>>
>> Use CONFIG_TIMER_CLK_FREQ to let the non-secure init code initialize the
>> generic timer o
From: Stefan Agner <stefan.ag...@toradex.com>
This patchset adds device tree support for Colibri iMX7S/iMX7D.
It is the first device tree enabled board for any i.MX 7 SoC
hence the patchset adds some common infrastructure:
- Add device tree support for serial_mxc.
- imx7.dtsi - I de
From: Stefan Agner <stefan.ag...@toradex.com>
Add pinctrl defines for NXP i.MX 7Solo/7Dual SoC. The pinctrl format
is compatible to the Linux kernel, hence this file is a simple copy
from the Linux kernel.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
arch/arm/dts/imx
From: Stefan Agner <stefan.ag...@toradex.com>
Enable device tree configuration and specify default device tree
for Toradex Colibri iMX7. Also configure CONFIG_CUSTOM_BOARDINFO
to avoid that board info get printed twice (once from the device
tree and one from the runtime detection in
From: Stefan Agner <stefan.ag...@toradex.com>
Use the external PMIC Ricoh RN5T567 to reliably restart the system.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
board/toradex/colibri_imx7/colibri_imx7.c | 42 +++
1 file changed, 42 inserti
From: Stefan Agner <stefan.ag...@toradex.com>
Add device model enabled PMIC driver for Ricoh RN5T567 PMIC used
on Colibri iMX7.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
doc/device-tree-bindings/pmic/rn5t567.txt | 17 +
drivers/power/pmic/Kconfig
From: Stefan Agner <stefan.ag...@toradex.com>
Add device tree node for Ricoh RN5T567. Currently we do not need
the individual DC/DC converters or LDO's (and they are also not
yet supported by the driver).
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
arch/arm/dts/imx7
From: Stefan Agner <stefan.ag...@toradex.com>
Remove legancy I2C config and code in favor of upcomming DM/DT
enable I2C support.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
board/toradex/colibri_imx7/colibri_imx7.c | 40 ---
inc
From: Stefan Agner <stefan.ag...@toradex.com>
We now use device tree to provide SoC data to the UART driver, there
is no need for the legancy UART platform data.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
board/toradex/colibri_imx7/colibri_imx7.c | 10 --
1
From: Stefan Agner <stefan.ag...@toradex.com>
Support instatiation through device tree. Also parse the fsl,dte-mode
property to determine whether DTE mode shall be used.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
The kernel uses fsl,imx21-uart as "base"
From: Stefan Agner <stefan.ag...@toradex.com>
Add base device for NXP i.MX 7Solo/7Dual. The two SoC are very
similar and hence can share the same device tree for boot loaders
purpose.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
arch/arm/dts/Makefile | 2 +
From: Stefan Agner <stefan.ag...@toradex.com>
It is not usual that drivers announce when they have been initialized.
use dev_dbg to announce device initialization.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
drivers/pinctrl/nxp/pinctrl-imx.c | 2 +-
1 file changed,
From: Stefan Agner <stefan.ag...@toradex.com>
Use CONFIG_TIMER_CLK_FREQ to let the non-secure init code initialize
the generic timer on all CPU's. This allows to make use of the timer
freuquency register also on other CPU than the start CPU which is
important for KVM.
Signed-off-by: Stefan
Hi Stefano,
On 2016-07-20 21:27, Stefan Agner wrote:
> From: Stefan Agner <stefan.ag...@toradex.com>
>
> This commit adds support for the Toradex Computer on Modules
> Colibri iMX7S/iMX7D. The two modules/SoC's are very similar hence
> can be easily supported by one board. T
Hi Fabio,
On 22.07.2016 07:06, Fabio Estevam wrote:
> Commit be1a17ff689 ("mx7_common: use Kconfig for ARMv7 non-secure mode")
> breaks the boot of a NXP 4.1.15 kernel using
> mx7dsabresd_secure_defconfig target.
>
> This problem happens because after this commit
> non-secure mode is always
g a 4.1.15 NXP kernel with mx7dsabresd_secure_defconfig
> target.
>
> Signed-off-by: Fabio Estevam <fabio.este...@nxp.com>
Looks good to me:
Acked-by: Stefan Agner <stefan.ag...@toradex.com>
> ---
> arch/arm/imx-common/Kconfig | 9 -
> configs/mx7dsabresd_secure_defc
_DCEDTE
> unconditionally for the non-dm case.
Uh yes, that wasn't intentionally and slipped through review! I meant to
add DTE support only in the dm case. Sorry about that.
Acked-by: Stefan Agner <stefan.ag...@toradex.com>
>
> So keep the original behavior by removing UFCR_DCEDTE
From: Stefan Agner <stefan.ag...@toradex.com>
This commit adds support for the Toradex Computer on Modules
Colibri iMX7S/iMX7D. The two modules/SoC's are very similar hence
can be easily supported by one board. The board code detects RAM
size at runtime which is one of the differences b
On 2016-07-19 07:18, stefano wrote:
> Hi Stefan,
>
> On 18/07/2016 22:59, Stefan Agner wrote:
>> On 2016-07-13 00:25, Stefan Agner wrote:
>>> From: Stefan Agner <stefan.ag...@toradex.com>
>>>
>>> This patchset adds support for the Toradex i.MX 7Solo
On 2016-07-19 07:14, Stefano Babic wrote:
> Hi Stefan,
>
>
> just a couple of minor things:
>
>
> On 13/07/2016 09:25, Stefan Agner wrote:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> This commit adds support for the Toradex Computer on Mo
On 2016-07-18 17:36, Tom Rini wrote:
> On Mon, Jul 18, 2016 at 03:21:39PM -0700, Stefan Agner wrote:
>> On 2016-07-18 15:19, Fabio Estevam wrote:
>> > On Wed, Jul 13, 2016 at 4:25 AM, Stefan Agner <ste...@agner.ch> wrote:
>> >> From: Stefan Agner <stefan.
On 2016-07-13 00:25, Stefan Agner wrote:
> From: Stefan Agner <stefan.ag...@toradex.com>
>
> This patchset adds support for the Toradex i.MX 7Solo and 7Dual
> based computer on modules Colibri iMX7S/iMX7D.
>
> It also brings several smaller i.MX 7 related fixes/clea
On 2016-07-18 15:19, Fabio Estevam wrote:
> On Wed, Jul 13, 2016 at 4:25 AM, Stefan Agner <ste...@agner.ch> wrote:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> This can be useful if the same U-Boot binary is used for boards
>> available with a i.MX
On 2016-07-17 06:37, Andreas Fenkart wrote:
> Hi,
>
> 2016-07-14 2:14 GMT+02:00 Stefan Agner <ste...@agner.ch>:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> A negative value for the offset is treated as a backwards offset for
>> from the
Hi Simon,
On 2016-07-14 20:19, Simon Glass wrote:
> Hi Stefan,
>
> On 13 July 2016 at 00:10, Stefan Agner <ste...@agner.ch> wrote:
>> On 2016-07-03 16:18, Simon Glass wrote:
>>> Hi,
>>>
>>> On 3 July 2016 at 13:33, Stefan Agner <ste...@
From: Stefan Agner <stefan.ag...@toradex.com>
This patchset adds support for the Toradex i.MX 7Solo and 7Dual
based computer on modules Colibri iMX7S/iMX7D.
It also brings several smaller i.MX 7 related fixes/cleanups.
Changes since v1:
- Dropped Ricoh RN5T567 PMIC support (for now)
From: Stefan Agner <stefan.ag...@toradex.com>
Currently flash_read completes a crucial part of the environment
device configuration, the device type (mtd_type). This is rather
confusing as flash_io calls flash_read conditionally, and one might
think flash_write, which also makes use of mt
From: Stefan Agner <stefan.ag...@toradex.com>
A negative value for the offset is treated as a backwards offset for
from the end of the device/partition for block devices. This aligns
the behavior of the config file with the syntax of CONFIG_ENV_OFFSET
where the functionality has been intr
On 2016-07-13 05:11, Otavio Salvador wrote:
> On Wed, Jul 13, 2016 at 4:25 AM, Stefan Agner <ste...@agner.ch> wrote:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the
>> OTG Power Pin to
From: Stefan Agner <stefan.ag...@toradex.com>
Use existing Kconfig symbols to let the user configure whether to
build a U-Boot with non-secure mode support or not. This also allows
to enable virtualization extension easily.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
--
From: Stefan Agner <stefan.ag...@toradex.com>
This commit adds support for the Toradex Computer on Modules
Colibri iMX7S/iMX7D. The two modules/SoC's are very similar hence
can be easily supported by one board. The board code detects RAM
size at runtime which is one of the differences b
This allows to overwrite reset_cpu function in case a board level
reset is preferred (e.g. through PMIC).
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
drivers/watchdog/imx_watchdog.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/wa
From: Stefan Agner <stefan.ag...@toradex.com>
This can be useful if the same U-Boot binary is used for boards
available with a i.MX 7Solo and i.MX 7Dual.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---
arch/arm/cpu/ar
CONFIG_DISPLAY_BOARDINFO should not be placed in mx7_common
because some boards might need a different config such as
CONFIG_DISPLAY_BOARDINFO_LATE. Move it to the board file
instead.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
include/configs/mx7_common.h | 1 -
include/c
From: Stefan Agner <stefan.ag...@toradex.com>
USBNC_n_CTRL1 bit 9 actually controls the power pin polarity.
Rename UCTRL_PM to align reference manual and set the bit in
the appropriate callback usb_power_config.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
drivers/u
From: Stefan Agner <stefan.ag...@toradex.com>
The MXC UART IP can be run in DTE or DCE mode. This depends on the
board wiring and the pinmux used and hence is board specific. This
extends platform data with a new field to choose wheather DTE
mode shall be used.
Signed-off-by: Stefan
From: Stefan Agner <stefan.ag...@toradex.com>
Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the
OTG Power Pin to be high active. Low active is the reset value
of the affected configuration register, hence the config option
is named by the non-reset configuration.
Sign
From: Stefan Agner <stefan.ag...@toradex.com>
Create an entry for "config USB_EHCI_MX7" in Kconfig and
switch over to it for all boards.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
configs/mx7dsabresd_defconfig | 1 +
configs/warp7_defconfig |
On 2016-07-03 16:18, Simon Glass wrote:
> Hi,
>
> On 3 July 2016 at 13:33, Stefan Agner <ste...@agner.ch> wrote:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> Add power driver for Ricoh PMIC used on Colibri iMX7.
>>
>> Signed-off-b
On 2016-07-05 13:56, Fabio Estevam wrote:
> On Tue, Jul 5, 2016 at 5:47 PM, Stefan Agner <ste...@agner.ch> wrote:
>
>> Sounds sensible. Would be the first use of
>> CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG in arch/arm/, but I guess that is
>> fine.
>
> T
On 2016-07-03 20:21, Max Filippov wrote:
> On Sun, Jul 3, 2016 at 9:53 PM, Stefan Agner <ste...@agner.ch> wrote:
>> On 2016-07-02 19:27, Max Filippov wrote:
>>> I'm getting the following build errors when I'm trying to build U-Boot
>>> for a board with UBIFS in i
On 2016-07-04 05:27, Fabio Estevam wrote:
> Hi Stefan,
>
> On Sun, Jul 3, 2016 at 4:33 PM, Stefan Agner <ste...@agner.ch> wrote:
>
>> +#ifdef CONFIG_ARCH_MISC_INIT
>> +int arch_misc_init(void)
>> +{
>> + if (is_mx7d())
>> +
On 2016-07-03 15:33, Marek Vasut wrote:
> On 07/03/2016 09:33 PM, Stefan Agner wrote:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the
>> OTG Power Pin to be high active. Low active is t
On 2016-07-03 15:32, Marek Vasut wrote:
> On 07/03/2016 09:33 PM, Stefan Agner wrote:
>> From: Stefan Agner <stefan.ag...@toradex.com>
>>
>> USBNC_n_CTRL1 bit 9 actually controls the power pin polarity.
>> Rename UCTRL_PM to align reference manual and set the b
From: Stefan Agner <stefan.ag...@toradex.com>
This patchset adds support for the Toradex i.MX 7Solo and 7Dual
based computer on modules Colibri iMX7S/iMX7D. Beside the board
support it adds support for the Ricoh RN5T567 PMIC which is used
on this board.
It also brings several smaller
From: Stefan Agner <stefan.ag...@toradex.com>
This commit adds support for the Toradex Computer on Modules
Colibri iMX7S/iMX7D. The two modules/SoC's are very similar hence
can be easily supported by one board. The board code detects RAM
size at runtime which is one of the differences b
CONFIG_DISPLAY_BOARDINFO should not be placed in mx7_common
because some boards might need a different config such as
CONFIG_DISPLAY_BOARDINFO_LATE. Move it to the board file
instead.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
include/configs/mx7_common.h | 1 -
include/c
From: Stefan Agner <stefan.ag...@toradex.com>
Add power driver for Ricoh PMIC used on Colibri iMX7.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswi...@toradex.com>
---
drivers/power/pmic/Makefile | 1 +
drivers/power/p
From: Stefan Agner <stefan.ag...@toradex.com>
Use existing Kconfig symbols to let the user configure whether to
build a U-Boot with non-secure mode support or not. This also allows
to enable virtualization extension easily.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
--
From: Stefan Agner <stefan.ag...@toradex.com>
USBNC_n_CTRL1 bit 9 actually controls the power pin polarity.
Rename UCTRL_PM to align reference manual and set the bit in
the appropriate callback usb_power_config.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
drivers/u
This allows to overwrite reset_cpu function in case a board level
reset is preferred (e.g. through PMIC).
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
---
drivers/watchdog/imx_watchdog.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/wa
From: Stefan Agner <stefan.ag...@toradex.com>
Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the
OTG Power Pin to be high active. Low active is the reset value
of the affected configuration register, hence the config option
is named by the non-reset configuration.
Sign
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