On 5/11/21 10:21 AM, Lokesh Vutla wrote:
>
>
> On 10/05/21 10:54 pm, Vignesh Raghavendra wrote:
>> R5 SPL needs access to cfg space of Rings and UDMAP, therefore add RING
>> CFG, TCHAN CFG and RCHAN CFG address ranges.
>>
>> Signed-off-by: Vignesh Raghavendra
On 5/11/21 10:12 AM, Lokesh Vutla wrote:
>
>
> On 10/05/21 10:54 pm, Vignesh Raghavendra wrote:
>> In case of R5 SPL, GET_RANGE API service is not available (as DM
>> services are not yet up), therefore service such calls locally using
>> per SoC static data.
&
Parse MAC addresses from EEPROM and set them in the env. This is needed
to get MAC address for additional ethernet ports on the EVM.
Signed-off-by: Vignesh Raghavendra
---
board/ti/am64x/evm.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/board/ti/am64x/evm.c b/board/ti/am64x
but setting
up of cfg registers is handled locally.
U-Boot specific code is in a separate file included in main driver so
as to maintain similarity with kernel driver in order to ease porting of
code in future.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-udma-u-boot.c | 177
is in a separate file included in main driver so
as to maintain similarity with kernel driver in order to ease porting of
code in future.
Signed-off-by: Vignesh Raghavendra
---
drivers/soc/ti/k3-navss-ringacc-u-boot.c | 61
drivers/soc/ti/k3-navss-ringacc.c| 36
R5 SPL needs access to cfg space of Rings and UDMAP, therefore add RING
CFG, TCHAN CFG and RCHAN CFG address ranges.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 14 ++
.../k3-j7200-common-proc-board-u-boot.dtsi| 26
Add DM firmware node which will provide DM services during R5 SPL stage.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-j7200-r5-common-proc-board.dts | 17 +
arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 18 ++
2 files changed, 35 insertions(+)
diff
will have to directly interact with TIFS using DM to DMSC
channels to request RM resources.
Therefore add DT binding and driver for the same. This driver will
handle Resource Management services at R5 SPL stage.
Signed-off-by: Vignesh Raghavendra
---
.../firmware/ti,j721e-dm-sci.txt
In case of R5 SPL, GET_RANGE API service is not available (as DM
services are not yet up), therefore service such calls locally using
per SoC static data.
Signed-off-by: Vignesh Raghavendra
---
drivers/firmware/ti_sci.c | 36 +++
drivers/firmware/ti_sci_static_data.h | 92
R5 SPL would need to talk to DMSC using DM to DMSC sec-proxy threads.
Mark these as valid threads in the driver.
Signed-off-by: Vignesh Raghavendra
---
drivers/mailbox/k3-sec-proxy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mailbox/k3-sec-proxy.c b/drivers
This series add DMA support for R5 SPL on J721e/J7200 SoCs post HSM
Rearch.
Depends on Tero's base HSM rearch support series.
Vignesh Raghavendra (7):
mailbox: k3-sec-proxy: Add DM to DMSC communication thread
firmware: ti_sci: Implement GET_RANGE with static data
firmware: ti_sci: Add
Add a new compatible to support AM64 SoC
Signed-off-by: Vignesh Raghavendra
---
drivers/net/ti/am65-cpsw-nuss.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 3534a6d807..3ab6a30828 100644
--- a/drivers/net/ti/am65
AM64 as CPSW3G IP with 2 external ports. Add DT entries for the same
(based on kernel DT).
Disable second port as its by default set to ICSS usage on EVM.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am64-main.dtsi| 74 +
arch/arm/dts/k3-am64.dtsi
Add CPSW related nodes for AM642 SK. There are two CPSW ports on the
board but U-Boot supports only the first port.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am642-sk-u-boot.dtsi | 16 +++
arch/arm/dts/k3-am642-sk.dts | 62
2 files changed
Currently driver may end up caching disabled port ID as active
interface. Fix this by bailing out earlier in case port is marked
disabled in the DT.
Signed-off-by: Vignesh Raghavendra
---
drivers/net/ti/am65-cpsw-nuss.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers
Sync BCDMA and PKTDMA support from Kernel for AM64 SoC
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-udma.c | 1003 +++---
1 file changed, 939 insertions(+), 64 deletions(-)
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index
CPSW NUSS IP on K3 SoCs can have more than one external port (upto 8)
Therefore increase AM65_CPSW_CPSWNU_MAX_PORTS to 9 (8 ext + 1 Root port)
as preparation to allow any one of the 8 ports to be used as ethernet
interface in U-Boot.
Signed-off-by: Vignesh Raghavendra
---
drivers/net/ti/am65
Add AM64 SoC specific channel mapping and endpoint data.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/Makefile | 1 +
drivers/dma/ti/k3-psil-am64.c | 156 ++
drivers/dma/ti/k3-psil-priv.h | 1 +
drivers/dma/ti/k3-psil.c | 2 +
4 files
Extend PSIL EP data to include AM64 DMA specific information
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-psil.h | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/dma/ti/k3-psil.h b/drivers/dma/ti/k3-psil.h
index 53c61b4595..1e0fe06c0a 100644
ICSSG Ethernet driver uses two src threads per port (one per slice).
Similarly CPSW uses one src thread.
Drop PSIL EP static data for other src threads in order to reduce
R5 SPL footprint. This makes AM65x board bootable again.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-psil
This series add ethernet and DMA support for AM64x SoC.
Vignesh Raghavendra (12):
firmware: ti_sci: Update ti_sci_cmd_rm_udmap_tx_ch_cfg() API to the
latest
soc: ti: k3-navss-ringacc: Add AM64 ringacc support
soc: ti: k3-navss-ringacc: Remove unused ring modes
dma: ti: k3-psil-am654
with this change for am65x_evm_r5_defconfig.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/soc/ti/k3-navss-ringacc.c | 311 +---
include/linux/soc/ti/k3-navss-ringacc.h | 7 +-
2 files changed, 8 insertions(+), 310 deletions(-)
diff --git
Update struct ti_sci_msg_rm_udmap_tx_ch_cfg_req to latest ABI to support
AM64x BCDMA Block copy channels.
Signed-off-by: Vignesh Raghavendra
---
drivers/firmware/ti_sci.c | 3 +++
drivers/firmware/ti_sci.h | 18 ++
include/linux/soc/ti
ring must always be initialized/configured. After this any
other Ringacc APIs can be used without any callers changes.
Signed-off-by: Vignesh Raghavendra
---
drivers/soc/ti/k3-navss-ringacc.c | 273 +++-
include/linux/soc/ti/k3-navss-ringacc.h | 15 ++
2 files changed
On 5/10/21 1:48 PM, Tero Kristo wrote:
> On 09/05/2021 08:54, Vignesh Raghavendra wrote:
>>
>>
>> On 5/5/21 11:25 PM, Tero Kristo wrote:
>>> From: Tero Kristo
>>>
>>> If the raw PM support is built in, we are operating in the split
&g
On 5/5/21 11:25 PM, Tero Kristo wrote:
> From: Tero Kristo
>
> If the raw PM support is built in, we are operating in the split
> firmware approach mode where RM and PM support is not available. In this
> case, skip the board config for these two.
>
> Signed-off-by: Tero Kristo
>
Hi,
On 5/6/21 4:44 PM, Lokesh Vutla wrote:
> Add support for AM64 SoC identification.
>
> Signed-off-by: Lokesh Vutla
> ---
> drivers/soc/soc_ti_k3.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c
> index ecc3278cb4..9abed7d490
On 5/6/21 11:24 PM, Vignesh Raghavendra wrote:
>
>
> On 4/23/21 9:57 PM, Dave Gerlach wrote:
>> Add initial A53 defconfig support for AM64x SoCs.
>>
>> Signed-off-by: Dave Gerlach
>> ---
>> configs/am64x_evm_a53_defconfig | 96 +
evice API")
Signed-off-by: Vignesh Raghavendra
---
drivers/pinctrl/pinctrl-single.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index ebb7602dde..7af6c5f0b0 100644
--- a/drivers/pinct
On 4/23/21 9:57 PM, Dave Gerlach wrote:
> Add initial A53 defconfig support for AM64x SoCs.
>
> Signed-off-by: Dave Gerlach
> ---
> configs/am64x_evm_a53_defconfig | 96 +
> 1 file changed, 96 insertions(+)
> create mode 100644 configs/am64x_evm_a53_defconfig
Dave,
On 5/4/21 8:22 AM, Dave Gerlach wrote:
> static void k3_lpddr4_ack_freq_upd_req(void)
> {
> - if (infotype == LPDDR4_DRV_SOC_PLL_UPDATE) {
> - j721e_lpddr4_ack_freq_upd_req();
> + u32 dram_class;
> +
> + debug("--->>> LPDDR4 Initialization is in progress ...
in -u-boot-dtsi just like its done for other
K3 platforms.
Fixes: 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot")
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm
+Miquel,
On 11/29/20 12:53 PM, Vignesh Raghavendra wrote:
> McSPI IP provides per CS specific speed and mode selection. Therefore it
> is possible to apply these settings only after CS is known. But
> set_speed and set_mode can be called without bus being claimed, this
> would lead d
and set_mode only if bus is already claimed.
Signed-off-by: Vignesh Raghavendra
---
drivers/spi/omap3_spi.c | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index 56cb217486..fe73362945 100644
--- a/drivers/spi
On 11/18/20 8:44 PM, Aswath Govindraju wrote:
> Hi Simon,
>
> On 18/11/20 8:07 pm, Simon Glass wrote:
>> Hi Aswath,
>>
>> On Mon, 16 Nov 2020 at 07:29, Aswath Govindraju wrote:
>>>
>>> While assigning the sequence number to subsystem instances by reading the
>>> aliases property, only DT
"ti,dis-chg-det-quirk" property is not part of Linux kernel DT binding
documentation. Therefore drop this and instead use soc_device_match()
to distinguish b/w AM654 SR1.0 and SR2.0 devices similar to Linux kernel
driver.
Signed-off-by: Vignesh Raghavendra
---
drivers/phy/omap-usb2-
Hi Stefan
On 9/17/20 4:53 PM, Vignesh Raghavendra wrote:
> This series adds DMA support to read from memory mapped CFI flashes
>
> First patch reduces noise from DMA APIs
> Second patch adds DMA support for cfi_mtd.
>
> Tested on J721e that has CFI compliant HyperFlash
>
Reset the channel completely during channel release in order to clear
teardown bit before handing over to next user or jumping to Linux.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-udma.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/ti/k3
When possible use DMA for reading from CFI flash, this provides upto 5x
improvement in read performance with high speed CFI compliant flashes
like HyperFlash.
Code will gracefully fallback to CPU copy when DMA is unavailable.
Signed-off-by: Vignesh Raghavendra
---
drivers/mtd/cfi_mtd.c | 4
This series adds DMA support to read from memory mapped CFI flashes
First patch reduces noise from DMA APIs
Second patch adds DMA support for cfi_mtd.
Tested on J721e that has CFI compliant HyperFlash
Vignesh Raghavendra (2):
dma: Reduce error level when DMA channel type does not exist
mtd
Caller would need gracefully handle failures of dma_get_device(),
therefore reduce pr_err() to pr_debug() when DMA device is not found.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/dma-uclass.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/dma
Update detect_enable_hyperflash() to look for "ti,am654-ospi" compatible
to match the upstream DT node.
Signed-off-by: Vignesh Raghavendra
---
board/ti/j721e/evm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index
This enables applying DTBOs at U-Boot prompt before booting to kernel.
Signed-off-by: Vignesh Raghavendra
---
configs/am335x_evm_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 0d814530d4..a44ed286cf 100644
Hi,
On 9/7/20 4:02 PM, Faiz Abbas wrote:
> Hi Vignesh,
>
> On 07/09/20 1:48 pm, Vignesh Raghavendra wrote:
>>
>>
>> On 9/7/20 12:36 PM, Faiz Abbas wrote:
>>> Hi Lokesh,
>>>
>>> On 07/09/20 12:08 pm, Lokesh Vutla wrote:
>>>&g
On 9/2/20 4:48 PM, Faiz Abbas wrote:
> Add an ofdata_to_platdata() callback to access dts in U-boot and
> access all platform data in it. This prepares the driver for supporting
> both device tree as well as static platform data structures in SPL.
>
> Signed-off-by: Faiz Abbas
> ---
>
On 9/2/20 4:48 PM, Faiz Abbas wrote:
> Add an ofdata_to_platdata() callback to access dts in U-boot and
> access all platform data in it. This prepares the driver for supporting
> both device tree as well as static platform data structures in SPL.
>
> Signed-off-by: Faiz Abbas
> ---
>
On 9/7/20 12:36 PM, Faiz Abbas wrote:
> Hi Lokesh,
>
> On 07/09/20 12:08 pm, Lokesh Vutla wrote:
>>
>>
>> On 02/09/20 4:48 pm, Faiz Abbas wrote:
>>> Add platform data and a device structure for the spi device
>>> present on am335x-icev2. This requires moving all omap3_spi
>>> platform data
Add memory mapped address location of U-Boot images in HyperFlash boot
mode.
Signed-off-by: Vignesh Raghavendra
---
include/configs/j721e_evm.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index c8a76037ff..a570893378 100644
Enable configs required to support HyperFlash boot and detection of
onboard mux switch for HyperFlash selection
Signed-off-by: Vignesh Raghavendra
---
configs/j7200_evm_a72_defconfig | 3 +++
configs/j7200_evm_r5_defconfig | 13 +
2 files changed, 16 insertions(+)
diff --git
Enable HyperBus and HyperFlash to support HyperFlash boot.
Signed-off-by: Vignesh Raghavendra
---
.../k3-j7200-common-proc-board-u-boot.dtsi| 28 +
.../arm/dts/k3-j7200-r5-common-proc-board.dts | 40 +++
2 files changed, 68 insertions(+)
diff --git a/arch/arm
HBMC controller on TI K3 SoC provides MMIO access to HyperFlash similar
to legacy Parallel CFI NOR flashes. Therefore alias HyperFlash bootmode
to NOR boot to enable SPL to load next stage using NOR boot flow.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/mach-k3/include/mach/j721e_spl.h | 1
Add support to boot from HyperFlash on J7200 SoC
Vignesh Raghavendra (5):
arm: mach-k3: Add HyperFlash boot mode support
board: ti: j721e: Add support for HyperFlash detection
ARM: dts: k3-j7200-r5-common-proc-board: Enable HyperFlash
configs: j7200_evm_*_defconfig: Enable HyperFlash boot
and fixup the DT
nodes to select OSPI vs HyperFlash
Signed-off-by: Vignesh Raghavendra
---
board/ti/j721e/evm.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index ebaa6faa93..7925b76ab7 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e
J7200 SoM has Cypress HyperFlash connected to HyperBus interface, add DT
entries for the same.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 27 ++
arch/arm/dts/k3-j7200-som-p0.dtsi | 33 +++
arch/arm/dts/k3-j7200
Add MCU NAVSS, UDMA and CPSW2G DT nodes.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 116 ++
1 file changed, 116 insertions(+)
diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
index 8ea25dea88
Enable CPSW2G port to support networking in U-Boot
Signed-off-by: Vignesh Raghavendra
---
.../k3-j7200-common-proc-board-u-boot.dtsi| 15 +++
arch/arm/dts/k3-j7200-common-proc-board.dts | 43 +++
2 files changed, 58 insertions(+)
diff --git a/arch/arm/dts/k3-j7200
Add USB related DT entries to enable USB device mode.
Signed-off-by: Vignesh Raghavendra
---
.../k3-j7200-common-proc-board-u-boot.dtsi| 14 +
arch/arm/dts/k3-j7200-common-proc-board.dts | 18 +++
arch/arm/dts/k3-j7200-main.dtsi | 30
Add wkup_gpio0 node required for detecting whether board mux is set
HyperFlash.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-j7200-common-proc-board.dts | 11 +++
arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 12
2 files changed, 23 insertions(+)
diff --git
Enable USB, HyperFlasha and CPSW on J7200 SoC
Based on top of https://patchwork.ozlabs.org/project/uboot/list/?series=194305
Vignesh Raghavendra (6):
arm: dts: k3-j7200: Add USB related DT entries
board: ti: j721e: Add support for HyperFlash detection
ARM: dts: k3-j7200: Add wkup gpio node
and fixup the DT
nodes to select OSPI0 vs HyperFlash
Signed-off-by: Vignesh Raghavendra
---
board/ti/j721e/evm.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index 87cdbf9798..66ed3750e3 100644
--- a/board/ti/j721e
On 05/08/20 10:44 pm, Lokesh Vutla wrote:
> +CONFIG_USB_CDNS3_GADGET=y
> +CONFIG_SPL_USB_CDNS3_GADGET=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
> +CONFIG_USB_GADGET_VENDOR_NUM=0x0451
> +CONFIG_USB_GADGET_PRODUCT_NUM=0x6163
You missed updating ID here (19/19
Hi,
On 05/08/20 3:48 pm, Chee Hong Ang wrote:
If the QSPI clock is not set (read as 0), QSPI driver probe shall fail
and prevent further QSPI access.
Signed-off-by: Chee Hong Ang
---
drivers/spi/cadence_qspi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
Hi
On 27/07/20 3:15 pm, Lokesh Vutla wrote:
> j7200-evm has minor differences with j721e-evm based on the IPs
> available in the SoC. Introduce separate build targets for j7200-evm
> to incorporate the differences.
>
> Signed-off-by: Lokesh Vutla
> ---
> board/ti/j721e/Kconfig | 53
On 27/07/20 3:15 pm, Lokesh Vutla wrote:
Add initial A72 defconfig support.
Signed-off-by: Lokesh Vutla
---
configs/j7200_evm_a72_defconfig | 172
1 file changed, 172 insertions(+)
create mode 100644 configs/j7200_evm_a72_defconfig
diff --git
Hi Lokesh,
On 27/07/20 3:15 pm, Lokesh Vutla wrote:
> Add the basic a72 dts for j7200. Following nodes were supported:
> - UART
> - MMC SD
> - I2C
> - TISCI communication
>
> Signed-off-by: Lokesh Vutla
> Signed-off-by: Vignesh Raghavendra
> Signed-off-by: Vi
Hi,
On 26/07/20 8:24 pm, Simon Glass wrote:
Hi Vignesh,
On Mon, 20 Jul 2020 at 00:26, Vignesh Raghavendra wrote:
Hi Simon,
On 19/07/20 9:45 pm, Simon Glass wrote:
The -ENODEV error value in spi_nor_read_id() is incorrect since there
clearly is a device - it just cannot be supported
Hi Simon,
On 19/07/20 9:45 pm, Simon Glass wrote:
> The -ENODEV error value in spi_nor_read_id() is incorrect since there
> clearly is a device - it just cannot be supported.
Description 's not entirely accurate... If there is no flash on the SPI
bus, then read ID would return all 0s or 0xFFs
On 09/07/20 4:47 pm, Jagan Teki wrote:
[...]
On 09/07/20 4:47 pm, Jagan Teki wrote:
> diff --git a/arch/x86/cpu/apollolake/spl.c b/arch/x86/cpu/apollolake/spl.c
> index e1ee1e0624..9c80440bbb 100644
> --- a/arch/x86/cpu/apollolake/spl.c
> +++ b/arch/x86/cpu/apollolake/spl.c
> @@ -10,6 +10,7 @@
Hi Jagan,
$subject: s/redundent/redundant
On 09/07/20 4:47 pm, Jagan Teki wrote:
> ---
[...]
> index b09046fec3..44cdb3151d 100644
> --- a/drivers/mtd/spi/sf-uclass.c
> +++ b/drivers/mtd/spi/sf-uclass.c
> @@ -122,7 +122,7 @@ static int spi_flash_std_erase(struct udevice *dev, u32
> offset,
On 08/07/20 5:26 pm, Jagan Teki wrote:
> On Fri, Jun 5, 2020 at 6:16 PM Pratyush Yadav wrote:
>>
>> Since this flash doesn't have a Profile 1.0 table, the Octal DTR
>> capabilities are enabled in the post SFDP fixup, along with the 8D-8D-8D
>> fast read settings.
>>
>> Enable Octal DTR mode
On 09/07/20 1:43 pm, Jagan Teki wrote:
> On Tue, Jul 7, 2020 at 7:00 PM Vignesh Raghavendra wrote:
>>
>> Hi Jagan,
>>
>> On 15/06/20 9:21 pm, Pratyush Yadav wrote:
>>> On 05/06/20 06:14PM, Pratyush Yadav wrote:
>>>> Hi,
>>>>
>&g
On 07/07/20 7:19 pm, Grygorii Strashko wrote:
>
>
> On 06/07/2020 11:06, Vignesh Raghavendra wrote:
>> Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.
>>
>> Signed-off-by: Vignesh Raghavendra
>> ---
>> .../k3-j721
Hi Jagan,
On 15/06/20 9:21 pm, Pratyush Yadav wrote:
> On 05/06/20 06:14PM, Pratyush Yadav wrote:
>> Hi,
>>
>> This series adds support for octal DTR flashes in the spi-nor framework,
>> and then adds hooks for the Cypress Semper flash which is an xSPI
>> compliant Octal DTR flash.
>>
>> The
Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi
files.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
arch/arm/dts/k3-am65-mcu.dtsi | 44 +++
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 121 ++
.../k3-j721e
with updated driver.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/Kconfig | 1 +
drivers/dma/ti/k3-udma.c | 145 +++
2 files changed, 103 insertions(+), 43 deletions(-)
diff --git a/drivers/dma/ti/Kconfig b/drivers
Much of PSIL endpoint configuration for a given SoC can be known at
compile time, therefore pass them for platform specific data instead of
DT.
Add per SoC's specific PSIL endpoint data. This is to bring driver in
sync with upstream DT.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii
.
v2:
Collect R-by
Update patch 2/3 to note about DT incompatibility
Vignesh Raghavendra (3):
dma: ti: Add static PSIL endpoint information
dma: ti: k3-udma: Update driver to use static endpoint Data
arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT
arch/arm/dts/k3-am65-mcu.dtsi
Sync CPSW DT node from kernel and move it out of -u-boot.dtsi file.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am65-mcu.dtsi| 84
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 54 +
2 files changed, 85 insertions(+), 53 deletions
Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.
Signed-off-by: Vignesh Raghavendra
---
.../k3-j721e-common-proc-board-u-boot.dtsi| 74 +--
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 74 +++
2 files changed, 75 insertions(+), 73
Force default thread to be used for RX as ALE is anyways set to Bypass
mode.
Signed-off-by: Vignesh Raghavendra
---
drivers/net/ti/am65-cpsw-nuss.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index e8fe875e70
MDIO node is not referenced further, therefore drop the dead code.
Signed-off-by: Vignesh Raghavendra
---
drivers/net/ti/am65-cpsw-nuss.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 85f3e49c05..e8fe875e70
Kernel DT has CPSW ports under ethernet-ports subnode. Update the driver
to look for the same.
Signed-off-by: Vignesh Raghavendra
---
drivers/net/ti/am65-cpsw-nuss.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw
Make necessary driver changes to sync DT nodes from kernel.
Depends on [1]
Due to the dependencies, I would like this entire series to be merged via TI
tree.
Tested on AM654 and J721e boards
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=186589
Vignesh Raghavendra (5):
net: ti
API users.
Signed-off-by: Vignesh Raghavendra
---
drivers/soc/ti/k3-navss-ringacc.c | 23 +++
include/linux/soc/ti/k3-navss-ringacc.h | 4
2 files changed, 27 insertions(+)
diff --git a/drivers/soc/ti/k3-navss-ringacc.c
b/drivers/soc/ti/k3-navss-ringacc.c
index
We only request ring pairs via K3 DMA driver, switch to use the new
k3_ringacc_request_rings_pair() to simplify the code.
As a good side effect, all boot stages now use exposed RING mode which
avoid maintaining proxy mode for 32 bit R5 core.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma
In preparation of adding more K3 SoCs, separate soc specific
initialization add a SoC specific initialization hook.
Signed-off-by: Vignesh Raghavendra
---
drivers/soc/ti/k3-navss-ringacc.c | 49 +--
1 file changed, 40 insertions(+), 9 deletions(-)
diff --git
In K3 UDMA architecture, RX rings are associated with RX flows rather
than RX channels, therefore move the ring pointers to udma_rflow struct
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-udma.c | 52 +---
1 file changed, 28 insertions(+), 24
Encapsulate channel configuration in a separate struct so as to ease
resetting of these fields with memset() and also to increase readability
of the code.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-udma.c | 197 +--
1 file changed, 108
Move the free, occ, windex and rinfex under a struct.
We can use memset to zero them and it will allow a cleaner way to extend
the variables for duplex rings.
Signed-off-by: Vignesh Raghavendra
---
drivers/soc/ti/k3-navss-ringacc.c | 89 ---
1 file changed, 46
Align Ringacc and UDMA driver with kernel updates.
Depends on [1]
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=186589
Vignesh Raghavendra (6):
soc: ti: k3-ringacc: Move state tracking variables under a struct
soc: ti: k3-ringacc: Add an API to request pair of rings
soc: ti
Hi,
On 02/07/20 1:32 pm, Faiz Abbas wrote:
[...]
> int am6_spl_early_init(void)
Can this be static or do you intend to use this outside of this func file?
> +{
> + int ret;
> +#if CONFIG_VAL(SYS_MALLOC_F_LEN)
> +#ifdef CONFIG_MALLOC_F_ADDR
> + gd->malloc_base = CONFIG_MALLOC_F_ADDR;
>
Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi
files.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
arch/arm/dts/k3-am65-mcu.dtsi | 44 +++
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 121 ++
.../k3-j721e
Much of PSIL endpoint configuration for a given SoC can be known at
compile time, therefore pass them for platform specific data instead of
DT.
Add per SoC's specific PSIL endpoint data. This is to bring driver in
sync with upstream DT.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii
UDMA DT bindings have deviated from kernel's DT for AM654 and J721e.
This series updates UDMA driver and sync DT bindings
Tested OSPI and CPSW on AM654 and J721e after the changes
v2:
Collect R-by
Update patch 2/3 to note about DT incompatibility
Vignesh Raghavendra (3):
dma: ti: Add static
with updated driver.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/Kconfig | 1 +
drivers/dma/ti/k3-udma.c | 145 +++
2 files changed, 103 insertions(+), 43 deletions(-)
diff --git a/drivers/dma/ti/Kconfig b/drivers
harder to review. Feel free to squash them
while merging or I can repost with 2/3 and 3/3 squashed
Vignesh Raghavendra (3):
dma: ti: Add static PSIL endpoint information
dma: ti: k3-udma: Update driver to use static endpoint Data
arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT
Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi
files.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am65-mcu.dtsi | 44 +++
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 121 ++
.../k3-j721e-common-proc-board-u-boot.dtsi
Much of PSIL endpoint configuration for a given SoC can be known at
compile time, therefore pass them for platform specific data instead of
DT.
Add per SoC's specific PSIL endpoint data. This is to bring driver in
sync with upstream DT.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti
Update driver to use static PSIL endpoint Data instead of DT. This will
allow DT bindings to be in sync with kernel's DT.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/Kconfig | 1 +
drivers/dma/ti/k3-udma.c | 145 +++
2 files changed, 103
On 15/06/20 11:49 am, Tero Kristo wrote:
> On 14/06/2020 16:49, Lokesh Vutla wrote:
>> Hi Tero,
>>
>> On 02/06/20 4:49 pm, Tero Kristo wrote:
>>> Hi,
>>>
>>> As there is looming death to OMAP4 Panda board u-boot support, I decided
>>> to take a shot and convert it to device model myself. With
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