Hi Maxime
On Wed, Feb 13, 2019 at 9:44 AM Maxime Ripard wrote:
>
> On Tue, Feb 12, 2019 at 05:57:07PM +0100, Michael Trimarchi wrote:
> > Change the size create a glitch in the clke signal on second
> > bank.
>
> Which glitch?
>
> > The glitch can generate problem in memory initialiazation
>
>
Hi Maxime
On Wed, Feb 13, 2019 at 9:49 AM Michael Nazzareno Trimarchi
wrote:
>
> Hi Maxime
>
> On Wed, Feb 13, 2019 at 9:44 AM Maxime Ripard
> wrote:
> >
> > On Tue, Feb 12, 2019 at 05:57:07PM +0100, Michael Trimarchi wrote:
> > > Change the size create a glitch in the clke signal on second
>
On Tue, Feb 12, 2019 at 05:57:07PM +0100, Michael Trimarchi wrote:
> Change the size create a glitch in the clke signal on second
> bank.
Which glitch?
> The glitch can generate problem in memory initialiazation
Which problem? on which board? How do we reproduce it?
Maxime
--
Maxime Ripard,
Change the size create a glitch in the clke signal on second
bank. The glitch can generate problem in memory initialiazation
Signed-off-by: Michael Trimarchi
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arch/arm/mach-sunxi/dram_sun8i_a33.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/mach-sunxi/dram_sun8i_a33.c
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