On 2010/08/12 3:14 PM, Reinhard Meyer wrote:
> It is mostly likely a 8/16 bit wide device in 8 bit mode on an 8 bit
> external bus. Then all CFI data appears twice.
Yes, this is exactly what I was seeing.
> Reason: the chip presents CFI data correctly (from the flash point of view)
> in 16 bit m
Stefan Roese wrote:
> Hi Rogan,
>
> On Thursday 12 August 2010 14:07:03 Rogan Dawes wrote:
>> I found the following configuration snippet for OpenOCD for the DNS323
>> at http://wiki.dns323.info/hardware:jtag:
>>
>> # driver addr size chip_width bus_width options
>> flash ba
Hi Rogan,
On Thursday 12 August 2010 14:07:03 Rogan Dawes wrote:
> I found the following configuration snippet for OpenOCD for the DNS323
> at http://wiki.dns323.info/hardware:jtag:
>
> # driver addr size chip_width bus_width options
> flash bank cfi 0xff80 0x8
On 2010/07/20 9:58 AM, Stefan Roese wrote:
>
> OK, so the width is definitely 8 bit and not 16 bit:
>
> static struct physmap_flash_data dns323_nor_flash_data = {
> .width = 1,
> ...
>
> But the base address is listed here as 0xf400:
>
> #define DNS323_NOR_BOOT_BASE 0xf400
>
Le 20/07/2010 13:01, Rogan Dawes a écrit :
> On 2010/07/20 12:53 PM, Reinhard Meyer (-VC) wrote:
>> Rogan Dawes schrieb:
>>> You're not tempted to try to fix the CFI driver for your board anyway, I
>>> suppose? :-)
>>
>> Tempted: YES !
>>
>> Time available: (currently) NONE
>>
>> Being on the wish/
On 2010/07/20 12:53 PM, Reinhard Meyer (-VC) wrote:
> Rogan Dawes schrieb:
>> You're not tempted to try to fix the CFI driver for your board anyway, I
>> suppose? :-)
>
> Tempted: YES !
>
> Time available: (currently) NONE
>
> Being on the wish/todo list: since years :)
>
> (and I might have to add
Rogan Dawes schrieb:
> You're not tempted to try to fix the CFI driver for your board anyway, I
> suppose? :-)
Tempted: YES !
Time available: (currently) NONE
Being on the wish/todo list: since years :)
(and I might have to add some board specifig #ifdefs because of the
16 MB mapping)
BTW.. a
On 2010/07/20 12:22 PM, Reinhard Meyer (-VC) wrote:
> Rogan Dawes schrieb:
>> Unfortunately, but understandably, it makes no difference whatsoever to
>> the behaviour of the flash chip. I can still put it into QRY mode, where
>> I get the doubled QQRRYY response, but the flash is not detected any
>
Rogan Dawes schrieb:
> Unfortunately, but understandably, it makes no difference whatsoever to
> the behaviour of the flash chip. I can still put it into QRY mode, where
> I get the doubled QQRRYY response, but the flash is not detected any
> better than it was previously.
OOPS:
On our system (
Rogan Dawes schrieb:
> Unfortunately, but understandably, it makes no difference whatsoever to
> the behaviour of the flash chip. I can still put it into QRY mode, where
> I get the doubled QQRRYY response, but the flash is not detected any
> better than it was previously.
Might it be that the
On 2010/07/20 10:38 AM, I wrote:
>> But the base address is listed here as 0xf400:
>>
>> #define DNS323_NOR_BOOT_BASE 0xf400
>
> Hmmm, maybe I must try changing that, then. That might be the answer to
> all the confusion.
>
> Although it is definitely an 8MB flash, and I thought it was supp
On 2010/07/20 9:58 AM, Stefan Roese wrote:
> Hi Rogan,
>
> OK, so the width is definitely 8 bit and not 16 bit:
>
> static struct physmap_flash_data dns323_nor_flash_data = {
> .width = 1,
> ...
>
> But the base address is listed here as 0xf400:
>
> #define DNS323_NOR_BOOT_BASE 0
Hi Rogan,
On Monday 19 July 2010 16:37:08 Rogan Dawes wrote:
> On 2010/07/19 3:33 PM, Stefan Roese wrote:
> > Not really. I find it odd, that writing 0x9800 works and 0x0098 doesn't.
> > Perhaps the chip is connected in byte-mode after all? Not sure.
> >
> > Do you know if and how the Linux MTD d
On 2010/07/19 3:33 PM, Stefan Roese wrote:
>
> Not really. I find it odd, that writing 0x9800 works and 0x0098 doesn't.
> Perhaps the chip is connected in byte-mode after all? Not sure.
>
> Do you know if and how the Linux MTD driver handles the NOR FLASH?
>
> Cheers,
> Stefan
Here is the setup co
On Monday 19 July 2010 14:18:37 Rogan Dawes wrote:
> DNS323B1> mw.w ff800aaa 00aa
> DNS323B1> mw.w ff800554 0055
> DNS323B1> mw.w ff800aaa 0090
> DNS323B1> md.w ff80
> ff80:
> ff800010: ..
On 2010/07/19 1:50 PM, Stefan Roese wrote:
>> This is quite odd, though.
>>
>> DNS323B1> mw.w 0xff800555 00aa
>>
>> .. never returns. It seems to hang up the board for some reason.
>
> Ahh, unaligned 16bit access on ARM.
>
> Please give these commands another try:
>
> => mw.w ff800aaa 00aa
> =>
On Monday 19 July 2010 13:05:09 Rogan Dawes wrote:
> >> If I do a normal md over the rest of the flash, I do see expected
> >> strings from the U-Boot "partition", and the kernel and ramdisk
> >> partitions. i.e. not duplicated or anything like that. Not sure if that
> >> answers your question at a
On 2010/07/19 12:49 PM, Stefan Roese wrote:
> Hi Rogan,
>
> On Monday 19 July 2010 12:18:45 Rogan Dawes wrote:
>>> How is your FLASH chip connected to your CPU? In 16bit wide mode (which
>>> is more common)?
>>
>> I have no idea. Do you have any suggestions how I can find out?
>
> I don't suppose y
Hi Rogan,
On Monday 19 July 2010 12:18:45 Rogan Dawes wrote:
> > How is your FLASH chip connected to your CPU? In 16bit wide mode (which
> > is more common)?
>
> I have no idea. Do you have any suggestions how I can find out?
I don't suppose you have the schematics for this board?
> If I do a
On 2010/07/19 11:34 AM, Stefan Roese wrote:
> Hi Rogan,
Hi Stefan,
Thanks for responding.
> On Tuesday 13 July 2010 22:00:37 Rogan Dawes wrote:
>> I'm trying to add support for my D-Link DNS323 (Orion5x-based) to
>> U-Boot, building on the efforts of Albert Aribaud.
>>
>> One place where I am st
Hi Rogan,
On Tuesday 13 July 2010 22:00:37 Rogan Dawes wrote:
> I'm trying to add support for my D-Link DNS323 (Orion5x-based) to
> U-Boot, building on the efforts of Albert Aribaud.
>
> One place where I am struggling is with the detection of the flash chip.
>
> The flash part is a 8 MB Spansio
Hi Stefan,
I'm trying to add support for my D-Link DNS323 (Orion5x-based) to
U-Boot, building on the efforts of Albert Aribaud.
One place where I am struggling is with the detection of the flash chip.
The flash part is a 8 MB Spansion S29GL064M90TFIR4, and the data sheet
can be found at:
http:
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