Am 2023-01-18 14:08, schrieb Marek Vasut:
On 1/18/23 13:43, Michael Walle wrote:
Am 2023-01-18 13:18, schrieb Marek Vasut:
On 1/18/23 13:12, Michael Walle wrote:
[...]
@@ -411,12 +405,11 @@ static int __maybe_unused
pinctrl_post_bind(struct udevice *dev
>> If it is right or wrong to use that as an MTD is a matter of opinion.
>
> I am still hoping the MTD maintainer would provide input here.
I might be missing something, but what is the reasoning here, to add this
to the mtd subsystem? One is saving space, but I agree with Marek, this
isn't a
If the use of MTD is restricted to passive serial, this is OK with me.
Yeah, but that is not how upstream things work. You need to also think
of any other use cases.
These are the things I want to achieve.
* transfer data using the SPI driver and not use board files.
For that, the FPGA
Am 2023-02-21 11:42, schrieb Ulf Samuelsson:
Den 2023-02-21 kl. 10:08, skrev Michael Walle:
If it is right or wrong to use that as an MTD is a matter of
opinion.
I am still hoping the MTD maintainer would provide input here.
I might be missing something, but what is the reasoning here, to add
Sorry, I didn't follow this too closely. Do you have some pointers?
I just saw your latest mail. Thanks.
-michael
Honestly, not really? Some good number of SoCs will start the
watchdog
in ROM and these are also the ones that don't allow you to turn it
off.
I hope not, that sounds really risky. How would you debug such a
platform?
_Every single_ custom piece of industrial (as opposed to
consumer-grade)
>>> Honestly, not really? Some good number of SoCs will start the watchdog
>>> in ROM and these are also the ones that don't allow you to turn it off.
>>
>> I hope not, that sounds really risky. How would you debug such a platform?
>
> _Every single_ custom piece of industrial (as opposed to
Basically I want the following:
(1) board boots with watchdog enabled
(2) u-boot services watchdog
(3a) booting embedded linux with booti (watchdog enabled) or
(3b) booting generic OS with bootefi (watchdog disabled)
The missing case is booting an embedded linux with bootefi, which
would be
Am 2023-02-13 09:43, schrieb Stefan Roese:
On 2/10/23 22:08, Tony Dinh wrote:
When DM_SERIAL is enabled, the device-tree tag u-boot,dm-pre-reloc is
required for this board to boot over UART with kwboot. Enable this in
kirkwood-pogoplug-series-4-u-boot.dtsi.
Signed-off-by: Tony Dinh
Am 2023-02-08 08:38, schrieb Oliver Graute:
if the rtc button cell is on low voltage this can result in a permanent
bootloop in u-boot because V2F Register is permanent set.
### Warning: temperature compensation has stopped
### Warning: Voltage low, data is invalid
resetting ...
With this
Am 2023-02-08 12:29, schrieb Oliver Graute:
Am 08.02.2023 um 09:32 schrieb Michael Walle :
Am 2023-02-08 08:38, schrieb Oliver Graute:
if the rtc button cell is on low voltage this can result in a
permanent
bootloop in u-boot because V2F Register is permanent set.
### Warning: temperature
Hi Tony,
Am 2023-02-01 02:11, schrieb Tony Dinh:
When DM_SERIAL is enabled, the device-tree property dm-pre-reloc is
required to boot over UART with kwboot. Enable this in a Kirkwood
common u-boot dtsi.
My (dev) board unfortunately, have a bootloader which can't boot over
serial. Could you
> When DM_SERIAL is enabled, the device-tree property dm-pre-reloc is
> required to boot over UART with kwboot. Enable this in a Kirkwood
> common u-boot dtsi.
My (dev) board unfortunately, have a bootloader which can't boot over
serial.
This is feature of Marvell BootROM and does not require
Hi,
> + printf("Disabling WDT\n");
> + writel(0, 0x10007000);
Please don't use magic numbers. Also, I guess this should be a
real watchdog driver and u-boot will take care of disabling it
if the user wants to.
> +
> + printf("Enabling SCP SRAM\n");
> + for (unsigned int val =
Hi Heinrich,
> Any runtime device drivers for variable storage should not be in the
> U-Boot runtime but live in the secure world (e.g. OP-TEE) FF-A is the
> new ARM protocol for talking to the secure world and hence fits into
> the picture.
What if I just want a simple embedded boot stack where
>> This is simply awesome, but I see one possible issue -- the need to have
>> proper environment variables defined for a particular board or device,
>> to make the buttons work as expected. Obviously, those environment
>> variables can be absent or can become missing for numerous reasons.
>
>
Hi,
Using CONFIG_EXTRA_ENV_SETTINGS should be good enough to provide
the fallback defaults. However, the users can still mess the things
up,
but again, they can do that already in many places.
I disagree. In my case that is a last resort recovery. And it should
work in any case. Even if
Using CONFIG_EXTRA_ENV_SETTINGS should be good enough to provide
the fallback defaults. However, the users can still mess the things
up,
but again, they can do that already in many places.
I disagree. In my case that is a last resort recovery. And it should
work in any case. Even if the user
Hi Mark,
> Any runtime device drivers for variable storage should not be in the
> U-Boot runtime but live in the secure world (e.g. OP-TEE) FF-A is the
> new ARM protocol for talking to the secure world and hence fits into
> the picture.
What if I just want a simple embedded boot stack where I
Hi,
+static int do_mtd_otp_write(struct cmd_tbl *cmdtp, int flag, int
argc,
+ char *const argv[])
+{
..
+ printf("Caution! OTP data bits can't be erased! Continue
(y/n)?\n");
Please note, that with current SPI-NOR flashes this is not true and
there is usually some kind
+static int do_mtd_otp_write(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
..
+ printf("Caution! OTP data bits can't be erased! Continue (y/n)?\n");
Please note, that with current SPI-NOR flashes this is not true and
there is usually some
Hi,
On Fri Apr 12, 2024 at 5:03 AM CEST, Neha Malcom Francis wrote:
> On 05/04/24 13:12, Michael Walle wrote:
> > On Thu Apr 4, 2024 at 11:10 AM CEST, Neha Malcom Francis wrote:
> >> But again in the interest of time... this would mean this cleaning up
> >> effort be
&
Hi,
On Thu Apr 25, 2024 at 8:19 AM CEST, Ilias Apalodimas wrote:
> I've cc'ed all the people I could find in board specific MAINTAINER files.
> Can you respond to Richard with the proper company name & board name
> so we can bind the following GUIDs to a vendor properly?
> Richard any guidance on
On Wed Mar 6, 2024 at 5:19 PM CET, Michael Walle wrote:
> Use the new device devicetree files in dts/upstream/ and delete the old
> ones. Still keep the -u-boot.dtsi with all u-boot specifics around.
>
> There is one catch and that is fsl-ls1028a-kontron-sl28-var3.dts which
> i
On Wed May 1, 2024 at 4:41 AM CEST, Tom Rini wrote:
> Remove from this board vendor directory and when needed
> add missing include files directly.
>
> Signed-off-by: Tom Rini
Acked-by: Michael Walle
On Wed May 1, 2024 at 4:42 AM CEST, Tom Rini wrote:
> Remove from this board vendor directory and when needed
> add missing include files directly.
>
> Signed-off-by: Tom Rini
Acked-by: Michael Walle
The V3s is identical regarding register layout, clocks and resets to
the sun6i variants. Therefore, we can just add the MACH_SUN8I_V3S to
the sun6i compatible ones.
SPI boot was tested on a custom board with a Gigadevice GD25Q64 8MiB
SPI flash.
Signed-off-by: Michael Walle
---
arch/arm/mach
Add the compatible string for the emac found on the V3s SoC. The SoC
only supports the internal PHY. There are no (R)MII signals on any pins.
Signed-off-by: Michael Walle
---
drivers/net/sun8i_emac.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/net/sun8i_emac.c b/drivers
Add the clock gate registers as well as the reset register bits for the
EMAC and EPHY for the V3s. These are needed by the sun8i network driver.
Signed-off-by: Michael Walle
---
drivers/clk/sunxi/clk_v3s.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/sunxi/clk_v3s.c b
on a custom board.
Michael Walle (2):
clk: sunxi: add EMAC and EPHY clocks and resets for the V3s SoC
net: sun8i_emac: add support for the V3s
drivers/clk/sunxi/clk_v3s.c | 6 ++
drivers/net/sun8i_emac.c| 7 +++
2 files changed, 13 insertions(+)
--
2.39.2
Hi,
On Wed Mar 6, 2024 at 3:56 AM CET, Marek Vasut wrote:
> > I'd argue if one wants to use the locking at all, you have to set
> > UNLOCK_ALL=n. Otherwise, the bootloader might come alone and just
> > clear your locking bits again. Clearing the WPS bit there is just
> > one more thing which IMHO
as this only differ in the compatible and the (human readable)
model name.
Signed-off-by: Michael Walle
---
I'll send a patch to linux to add the var3.dts, then I'll add the
correct var3 dts again.
---
.../arm/dts/fsl-ls1028a-kontron-sl28-var1.dts | 59
.../arm/dts/fsl-ls1028a-kontron-sl28-var2
On Tue Mar 5, 2024 at 7:54 PM CET, Marek Vasut wrote:
> On 3/5/24 5:55 PM, Michael Walle wrote:
>
> [...]
>
> >>>>>> Clearing this SR3 WPS bit fixes that problem, both in U-Boot and in
> >>>>>> Linux, since Linux that is booted afterwa
rom arch/arm/dts/ directory.
Thanks for taking care.
> Signed-off-by: Tony Dinh
Tested-by: Michael Walle # on lschlv2
lsxl should work too as it is just different in memory and cpu
frequency settings.
> ---
>
> arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi | 6 --
> ar
such
> file or directory
...
Are you sure you want to have all this text in the commit log?
You seem to have forgotten my tag:
Tested-by: Michael Walle # on lschv2
size.
Fixes: 38922b1f4acc ("net: ti: am65-cpsw: Add support for multi port
independent MAC mode")
Signed-off-by: Michael Walle
---
drivers/net/ti/am65-cpsw-nuss.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti
Hi,
> > > > > And on top of that, it will just be a base board and there will
> > > > > likely be some carrier device trees (overlay? I'm not sure yet).
> > > > >
> > > > > As far as I can tell, you've put the memory configuration into the
> > > > > device tree, so I'll probably need to switch
On Thu Mar 28, 2024 at 4:09 PM CET, Tom Rini wrote:
> On Mon, Jan 01, 2024 at 10:07:47PM +0100, Marek Vasut wrote:
>
> > Configure LEDs on BCM54210E so they would blink on activity
> > and indicate link speed. Without this the LEDs are always on
> > if cable is plugged in.
> >
> > Signed-off-by:
Hi,
On Thu Apr 4, 2024 at 11:10 AM CEST, Neha Malcom Francis wrote:
> But again in the interest of time... this would mean this cleaning up effort
> be
> kept on hold. If we can agree to move to using the generator later as the
> final
> solution, can we pick up this series for now?
Agreed.
Hi,
On Thu Mar 28, 2024 at 12:18 PM CET, Neha Malcom Francis wrote:
> On 27-Mar-24 8:03 PM, Michael Walle wrote:
> > On Wed Mar 27, 2024 at 8:01 AM CET, Neha Malcom Francis wrote:
> >> On 26/03/24 19:18, Michael Walle wrote:
> >>> On Fri Mar 22, 2024 at 2:10 PM
Hi,
On Wed Mar 27, 2024 at 8:01 AM CET, Neha Malcom Francis wrote:
> On 26/03/24 19:18, Michael Walle wrote:
> > On Fri Mar 22, 2024 at 2:10 PM CET, Neha Malcom Francis wrote:
> >> Clean up templatized boot binaries for all K3 boards. This includes
> >> modifyin
.
Signed-off-by: Michael Walle
---
tools/binman/etype/ti_board_config.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/binman/etype/ti_board_config.py
b/tools/binman/etype/ti_board_config.py
index 2c3bb8f7b56..c10d66edcb1 100644
--- a/tools/binman/etype
Hi,
On Fri Mar 22, 2024 at 2:10 PM CET, Neha Malcom Francis wrote:
> Clean up templatized boot binaries for all K3 boards. This includes
> modifying the k3-binman.dtsi to use SPL_BOARD_DTB, BOARD_DESCRIPTION and
> UBOOT_BOARD_DESCRIPTION from the files that include it to further reuse
> code.
>
>
[+ linux-mtd ]
Hi Marek,
On Mon Mar 4, 2024 at 5:16 PM CET, Marek Vasut wrote:
> Some Winbond SPI NORs have special SR3 register which is
> used among other things to control whether non-standard
> "Individual Block/Sector Write Protection" (WPS bit)
> locking scheme is activated. This
On Tue Mar 5, 2024 at 4:37 PM CET, Marek Vasut wrote:
> On 3/5/24 1:50 PM, Michael Walle wrote:
> > Hi Marek,
>
> Hi,
>
> > On Tue Mar 5, 2024 at 1:31 PM CET, Marek Vasut wrote:
> >> On 3/5/24 9:55 AM, Michael Walle wrote:
> >>> On Mon Mar 4, 2024 a
On Tue Mar 5, 2024 at 5:28 PM CET, Marek Vasut wrote:
> On 3/5/24 4:53 PM, Michael Walle wrote:
> > On Tue Mar 5, 2024 at 4:37 PM CET, Marek Vasut wrote:
> >> On 3/5/24 1:50 PM, Michael Walle wrote:
> >>> On Tue Mar 5, 2024 at 1:31 PM CET, Marek Vasut wrote:
> >
Hi Marek,
On Tue Mar 5, 2024 at 1:31 PM CET, Marek Vasut wrote:
> On 3/5/24 9:55 AM, Michael Walle wrote:
> > On Mon Mar 4, 2024 at 5:16 PM CET, Marek Vasut wrote:
> >> Some Winbond SPI NORs have special SR3 register which is
> >> used among other things to c
On Tue Jun 4, 2024 at 9:47 AM CEST, Christian Loehle wrote:
> On 6/3/24 22:28, Tim Harvey wrote:
> > On Mon, Jun 3, 2024 at 1:18 AM Christian Loehle
> > wrote:
> >>
> >> On 5/31/24 21:47, Tim Harvey wrote:
> >>> Greetings,
> >>>
> >>> I'm seeing an issue on an imx8mm board (imx8mm-venice-gw73xx)
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