Re: [USRP-users] Processor requirements for full-rate streaming on N320

2019-09-06 Thread Marcus D. Leech via USRP-users
On 09/06/2019 09:53 PM, Lundberg, Daniel via USRP-users wrote: Thank you all, I will look into DPDK (didn't know about it until now!) and investigate what is available with those processors. Marcus, all we need to do is generate samples from a set of pre-canned files, record a loopback to file

Re: [USRP-users] USRP N310 Cannot ping or connect

2019-09-06 Thread Marcus D. Leech via USRP-users
On 09/06/2019 07:49 PM, Austin Adam wrote: Hi Marcus, We have been using the same adapter since even before we sent out the device, and it always worked without fail. It makes sense what you are saying, but because we had it working before, I feel like the issue is deeper than that. I cannot

Re: [USRP-users] Processor requirements for full-rate streaming on N320

2019-09-06 Thread Lundberg, Daniel via USRP-users
Thank you all, I will look into DPDK (didn't know about it until now!) and investigate what is available with those processors. Marcus, all we need to do is generate samples from a set of pre-canned files, record a loopback to file, and also Tx to another system, which sends samples back that w

Re: [USRP-users] Addsub HLS Block Error

2019-09-06 Thread d.des via USRP-users
Thanks! I saw a noc_block_rfnoc_adder.xml in gr_ettus which looks as though it's all set to control such a selectable add-or-subtract block, but I never found the block. On Fri, 2019-09-06 at 15:26 -0700, Nick Foster wrote: > Here's a modified add-only block. You'll have to make a matching .xml >

Re: [USRP-users] USRP N310 Cannot ping or connect

2019-09-06 Thread Austin Adam via USRP-users
Hi Marcus, We have been using the same adapter since even before we sent out the device, and it always worked without fail. It makes sense what you are saying, but because we had it working before, I feel like the issue is deeper than that. I cannot ping the device in the current state. If I don'

Re: [USRP-users] USRP N310 Cannot ping or connect

2019-09-06 Thread Marcus D. Leech via USRP-users
On 09/06/2019 07:22 PM, Austin Adam via USRP-users wrote: Update: I updated my host computer to UHD version 3.14.1.0 and then afterwards, wrote that same version to the SD card. When I put the SD card back in the USRP and ran the 'uhd_find_devices' command, it actually showed up! Finally! But

Re: [USRP-users] USRP N310 Cannot ping or connect

2019-09-06 Thread Austin Adam via USRP-users
Update: I updated my host computer to UHD version 3.14.1.0 and then afterwards, wrote that same version to the SD card. When I put the SD card back in the USRP and ran the 'uhd_find_devices' command, it actually showed up! Finally! But then, upon restarting the USRP by running "shutdown -h now" via

Re: [USRP-users] Processor requirements for full-rate streaming on N320

2019-09-06 Thread Marcus D. Leech via USRP-users
On 09/06/2019 05:53 PM, Lundberg, Daniel via USRP-users wrote: Does anyone have a known good hardware configuration to support full (or at least close to full) 200 MS/s streaming from the N320? Preferably with 1 Tx and 2 Rx channels. As a data point, a recent i3 (4 cores) seems to be chokin

Re: [USRP-users] Processor requirements for full-rate streaming on N320

2019-09-06 Thread Nate Temple via USRP-users
Hi Daniel, As Marcus mentioned, an i3 is not ideal for streaming at such high rates. For 200 MS/s of usable bandwidth, you'll need to stream at 250 MS/s per channel. A colleague has ran 2x2 @ 250 MS/s using an Intel Xeon E5-1620 v3 @ 3.50GHz, and I've ran at those rates with an i9-9900x @ 4.4 G

Re: [USRP-users] Addsub HLS Block Error

2019-09-06 Thread Nick Foster via USRP-users
Here's a modified add-only block. You'll have to make a matching .xml descriptor and GRC block (if you're using gr-ettus). Probably it would be a super useful thing to have an add/sub block, instead of an addsub block. A register-controlled mux to select which operation you want. I'll think about

Re: [USRP-users] Processor requirements for full-rate streaming on N320

2019-09-06 Thread Marcus Müller via USRP-users
Hi Daniel, i3 doesn't sound like the processor family of choice here; a few more cores can't hurt. Basically, assume one CPU core per stream for the wire- to CPU-format conversion, plus a bit of demand for someone handling OS/network card interrupts. What're you doing with the samples afterwards?

Re: [USRP-users] Addsub HLS Block Error

2019-09-06 Thread d.des via USRP-users
Nick- Could you share the tricks to remove one of the output ports? I don't I'm having similar issues with my modified addsub block and don't have enough room on the e310 fpga for extra fifos. It's not obvious from the noc_block_addsub code, the use of splitstream and dummy variables is very confus

Re: [USRP-users] Using DmaFIFO for receive on X310

2019-09-06 Thread Rob Kossler via USRP-users
Hi Nate, I'm using UHD 3.14.0.1. I am not using DPDK. Regarding the tuning, I think I was not clear in my email. I have no trouble streaming to RAM disk using the standard Radio->DDC->host graph. I mentioned that I was running 2x50MS/s, but I can go up to 2x200MS/s with success. My issue is th

[USRP-users] Processor requirements for full-rate streaming on N320

2019-09-06 Thread Lundberg, Daniel via USRP-users
Does anyone have a known good hardware configuration to support full (or at least close to full) 200 MS/s streaming from the N320? Preferably with 1 Tx and 2 Rx channels. As a data point, a recent i3 (4 cores) seems to be choking above 62.5 MS/s. This is over dual SFP+ ports. At higher sampli

Re: [USRP-users] RFNoC SVD Block

2019-09-06 Thread Marcus Müller via USRP-users
Hello Adnan, I'm currently not aware of anyone doing that. However, since one of the typical applications of beefier FPGAs is math accelerators for linear algebra problems, it's more than likely someone did in fact implement an SVD before, and you might just need to connect it to a nocshell to ma

[USRP-users] E310 RFNoC frequency change breaks channel time alignment

2019-09-06 Thread d.des via USRP-users
I have a two-channel signal conditioning block based on noc_block_addsub between the radio and a DDC. The entire flowgraph is radio(2 channels out)->addsub(2 channels in and out)-> two separate ZMQ Push Sinks. I'm using the DDC as an integrator/decimator because a pair of FIRs or moving average blo

[USRP-users] RFNoC SVD Block

2019-09-06 Thread Quadri,Adnan via USRP-users
Hello, We are trying to perform singular vector decomposition. The idea is to work on an RFNoC block that takes in summation of samples from the Radio source and will perform SVD. Is anybody working on something similar? Currently, the RFNoC OFDM synchronizer block has timing constraint issues

Re: [USRP-users] USRP N310 Cannot ping or connect

2019-09-06 Thread Austin Adam via USRP-users
I am assuming that when I run 'uhd_find_devices' it shows the current version in the output, so if that is the case, then my host is on version *UHD_3.14.0.HEAD-0-g6875d061*, and the USRP is on version *UHD_3.14.0.0-0-g6875d061. *Just based on the output here: *root@ni-n3xx-3177E63:~# uhd_find_de

Re: [USRP-users] sc16 - complex to numpy float

2019-09-06 Thread GhostOp14 via USRP-users
Here's a way in Python you can pull in SC16 and recover the FC32 from a file. It'll scale the values from the INT16_MAX back to -1.0 to 1.0 too in one shot. import numpy file="somefile.iq" dat = numpy.fromfile(file, dtype=numpy.int16) data = dat[0::2]/32767.0 + 1j*dat[1::2]/32767.0 # ::02 says e

Re: [USRP-users] Using DmaFIFO for receive on X310

2019-09-06 Thread Ettus Research Support via USRP-users
Hi Rob, What version of UHD are you using? 2x RX 50 MS/s streams should work without much issue with a fast enough host, especially to a ram disk. Are you using DPDK? DPDK support for X3xx was recently added to UHD and will reduce the overhead on the host side, which can help quite a bit. Some a

Re: [USRP-users] N320: set_rx_bw() does not change the actual BW

2019-09-06 Thread Nate Temple via USRP-users
Hi David, The N320 has a discrete component daughterboard and does not support setting a bandwidth filter. The RFIC based USRPs such as the B2xx, E31x, E320 (AD9361) and N300/N310 (AD9371) support the set_rx_bandwidth API call. Regards, Nate Temple On Fri, Sep 6, 2019 at 4:55 AM Truan David via

Re: [USRP-users] (no subject)

2019-09-06 Thread Michael Dickens via USRP-users
Hi Rajesh - The block "OFDM Sync Short" is part of the GR out-of-tree (OOT) module "gr-ieee802-11" ... as are many of the other blocks in the image you provided. If that OOT is not installed already, it shouldn't be difficult to do so. Hope this is useful! - MLD On Fri, Sep 6, 2019 at 5:10 AM Dr.

Re: [USRP-users] sc16 - complex to numpy float

2019-09-06 Thread Michael Dickens via USRP-users
Hi Joel - IIRC UHD takes and provides std::complex values that are in (-1.0,+1.0), meaning that the minimum (most negative) value is -1.0+epsilon and the maximum (most positive) value is 1.0-epsilon, where "epsilon" is the smallest positive 32-bit float value (approximately 1.17549e-38). If you're

[USRP-users] Using DmaFIFO for receive on X310

2019-09-06 Thread Rob Kossler via USRP-users
Hi, As part of an effort to improve capability to store incoming receive chain samples to files on my SSD without errors ('O' or 'D'), I decided to wire an X310 noc graph to include the DmaFIFO. My thought was that the DmaFIFO could better tolerate varying rates of sample consumption at the OS. Be

Re: [USRP-users] sc16 - complex to numpy float

2019-09-06 Thread J Subash via USRP-users
Hi Imad, Thanks very much for your reply. Unfortunately that solution does not work. Because if it reads 4 bytes (two int16_t in C/C++ parlance; world) which for argument sake holds 15, 16 (which are integers). These are then cast as floats which makes them 15.0 and 16.0 and then when viewed

[USRP-users] N320: set_rx_bw() does not change the actual BW

2019-09-06 Thread Truan David via USRP-users
Hi, We received our N320 and started doing some basic RX tests on it and everything seems ok. We were able to get an emitted chirp and display it using GQRX. However, when calling the set_rx_bandwidth() UHD function and then reading the actual RX bandwidth, it always read back 250MHz. Using rx_

Re: [USRP-users] sc16 - complex to numpy float

2019-09-06 Thread Imad-Eddine Srairi via USRP-users
Hi Joeal, You may try something along the lines of: import numpy as np def read_from_file(file_name, count=-1):     dt = np.dtype('    samples = np.fromfile(file_name, dt, count).astype(np.float32).view(np.complex64)     return samples So this reads samples as two-byte integers (assuming

Re: [USRP-users] RFNoC packet sizes

2019-09-06 Thread Jonathon Pendlum via USRP-users
Hi Sebastian, Try also setting the spp via the stream args with stream_args.args["spp"]. You can see an example in rfnoc_rx_to_file.cpp around line 403. Jonathon On Fri, Sep 6, 2019 at 3:54 PM Sebastian Bräuer wrote: > Hi Jonathon, > > thanks for the quick response. It is a UHD application and