Re: [USRP-users] simulation error with uhd 4.0

2020-11-22 Thread Dario Pennisi via USRP-users
Hi Jonathon, thanks for your reply. unfortunately the issue seems to be with complex_multiplier ip generated by vivado. if i bypass that (my instantiating wires that connect input to output instead of the IP) everything works. i noticed the IP generates a vhdl file and the aggregate association er

Re: [USRP-users] B200 PPS signal question

2020-11-22 Thread Aaron Holtzman via USRP-users
On the b200mini, the 1pps actually *does* steer the internal reference. Which is different behaviour then the rest of the entire Ettus lineup I believe. For details on how it works, see uhd/fpga/usrp3/top/b2xxmini/b205_ref_pll.v. It autodetects the external reference type and applies the appropria

Re: [USRP-users] ILA in UHD 4

2020-11-22 Thread Wade Fife via USRP-users
Hi Dario, I'm not sure why you're getting that error. Your initial command doesn't look right ("GUI=1 make n310_rfnoc_image_core") but maybe that's just a typo. Did you perhaps make changes to the clocking or constraints in the design? I wouldn't expect building with the ILA to cause this problem.

Re: [USRP-users] simulation error with uhd 4.0

2020-11-22 Thread Dario Pennisi via USRP-users
i did some step forward. it looks like in the build directory there's a file called complex_multiplier_sim_netlist.v that allows simulation however when calling the simulation from an OOT directory the IP is rebuilt under that directory and that file is not created. unfortunately the sim/complex_mu

[USRP-users] Poor Data Rates with the USRP E312

2020-11-22 Thread Joe Crossen via USRP-users
Hi all, I'm attempting to use the USRP E312 as a wifi node using the gr-ieee802.11 module... though for now I'm testing basic USRP functionality with a couple of simple GNU graphs. Here's my setup: - the host is an Ubuntu 18.04 virtual machine with a bridged adaptor. Firewall disabled. - the USR

Re: [USRP-users] Poor Data Rates with the USRP E312

2020-11-22 Thread Marcus D Leech via USRP-users
The E31x series really are intended for applications where all the high sample rate stuff happens in the FPGA. The ARM cpu is only dual core and runs at under 1Ghz. The scenario you describe is a lot like what we used to call “network mode” for the E31x, and it was never recommended for that

Re: [USRP-users] B200 PPS signal question

2020-11-22 Thread 翁偉吾 via USRP-users
So there is a some difference regarding the clock between b200 and b200mini. At first I thought they are pretty much alike. Anyway, now I understood. Thanks Aaron. On Mon, 23 Nov 2020, 02:42 Aaron Holtzman via USRP-users, < usrp-users@lists.ettus.com> wrote: > On the b200mini, the 1pps actually