We can't speed up Vivado, unfortunately. Maybe if we design an RFNoC
block that does place and route
So, there's not much you can do. You might be able to use design
checkpoints, but that's an advanced Vivado feature and we don't have
support out of the box for that. You need to know what
I am not an FPGA or Vivado expert, but I tried to do the same thing. I
believe Vivado is limited to 4 cores, so sadly, it seems like your best bet
is to get a quad-core with the fastest clock you can find. I think AWS just
released a "frequency-optimized" instance family. Maybe take a look at
I know Vivado build times are dependent on how optimized you want things and
how utilized the FPGA is, but is there a way to speed up the build times?
I started doing my builds on a server thinking it would be a huge boost from my
PC, but I am not really seeing a difference. It has 64 cores
