On 17.11.2011 17:11, Kurt Van Dijck wrote: > On Thu, Nov 17, 2011 at 07:58:09PM +0400, Yuriy Kiselev wrote: >> 2011/11/15 Heinz-Jürgen Oertel <[email protected]> >> >>> >>>> -----Original Message----- >>>> From: [email protected] [mailto:socketcan-users- >>>> [email protected]] On Behalf Of Kurt Van Dijck >>>> Sent: Tuesday, November 15, 2011 9:22 AM >>>> To: Yuriy Kiselev >>>> Cc: [email protected]; [email protected] >>>> Subject: Re: [Socketcan-users] sja1000 BasicCAN mode >>>> >>>> On Mon, Nov 14, 2011 at 09:08:29PM +0400, Yuriy Kiselev wrote: >>>>> Hello! >>>>> Implementation of BasicCAN mode for SJA1000 is in attachment. >>>>> Now SJA1000_PELICAN_MODE macros in sja1000.h is used for definition >>>> PeliCAN >>>>> or BasicCAN mode. It would be nice to create some menuconfig-wrapper, I >>>>> think. >>>>> I use this code for a few weeks and it looks stable. >>>> I see no reason to use BasicCAN mode instead of PeliCAN mode. >>>> Instead, I do see reasons to use PeliCAN mode: >>>> >>>> * no problems when 29bit frames appear on the bus >>>> * rx queue of 64 byte. >>>> >>>> What is your motivation not to use PeliCAN mode? >>>> >>>> Kurt >>> >>> Kurt is correct. For my understanding, the so-called basic CAN mode of the >>> SJA1000 is a compatibility mode for the 82c200. It makes no sense to >>> support it any more with SJA1000 devices. >>> >>> Heinz >>> >> >> Yes, BasicCAN mode is for specific designed devices. My device has only >> 5-bits address bus and I can't use PeliCAN mode. > Still, properly attached SJA1000 is better used in PELICAN mode. I'm sure > you agree. > > But I see your point. > Must your hardware be supported by SJA1000? > Or by a completely seperate 82c200 driver? > You probably can start from the SJA1000.
AFAIK the SJA1000 driver only uses 32 byte of address space - so 5 bit are ok! Even if the address space of the SJA1000 can be 128 bytes in PeliCAN mode, these addresses beyond register 31 are usually not in use. Registers 32 - 127 only contain a view into the internal registers and FIFOs nobody is using, as the FIFO is also implemented in the standard RX/TX frame registers. Please check the SJA1000 spec, page 21/22 (PeliCAN address space layout) Regards, Oliver _______________________________________________ Socketcan-users mailing list [email protected] https://lists.berlios.de/mailman/listinfo/socketcan-users
