Module Name: src
Committed By: msaitoh
Date: Fri Jan 14 15:45:53 UTC 2022
Modified Files:
src/sys/arch/x86/include: specialreg.h
Log Message:
Both Intel and AMD says the name of CPUID 0x01 %edx bit 19 is "CLFSH".
To generate a diff of this commit:
cvs rdiff -u -r1.180 -r1.181 src/sys/arch/x86/include/specialreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/specialreg.h
diff -u src/sys/arch/x86/include/specialreg.h:1.180 src/sys/arch/x86/include/specialreg.h:1.181
--- src/sys/arch/x86/include/specialreg.h:1.180 Thu Jan 13 16:03:38 2022
+++ src/sys/arch/x86/include/specialreg.h Fri Jan 14 15:45:53 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.180 2022/01/13 16:03:38 msaitoh Exp $ */
+/* $NetBSD: specialreg.h,v 1.181 2022/01/14 15:45:53 msaitoh Exp $ */
/*
* Copyright (c) 2014-2020 The NetBSD Foundation, Inc.
@@ -211,7 +211,7 @@
"\5" "TSC" "\6" "MSR" "\7" "PAE" "\10" "MCE" \
"\11" "CX8" "\12" "APIC" "\13" "B10" "\14" "SEP" \
"\15" "MTRR" "\16" "PGE" "\17" "MCA" "\20" "CMOV" \
- "\21" "PAT" "\22" "PSE36" "\23" "PN" "\24" "CLFLUSH" \
+ "\21" "PAT" "\22" "PSE36" "\23" "PN" "\24" "CLFSH" \
"\25" "B20" "\26" "DS" "\27" "ACPI" "\30" "MMX" \
"\31" "FXSR" "\32" "SSE" "\33" "SSE2" "\34" "SS" \
"\35" "HTT" "\36" "TM" "\37" "IA64" "\40" "PBE"
